staging: comedi: rti800: prefer using the BIT macro

Use the BIT macro to define the register bits.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/rti800.c b/drivers/staging/comedi/drivers/rti800.c
index 340ac776e951a6c406584cb8df3498e80cfe6a13..528e0697c9c7ae038b6a2d0d9e0b521252855493 100644 (file)
--- a/drivers/staging/comedi/drivers/rti800.c
+++ b/drivers/staging/comedi/drivers/rti800.c
@@ -57,14 +57,14 @@
  * Register map
  */
 #define RTI800_CSR             0x00
-#define RTI800_CSR_BUSY                (1 << 7)
-#define RTI800_CSR_DONE                (1 << 6)
-#define RTI800_CSR_OVERRUN     (1 << 5)
-#define RTI800_CSR_TCR         (1 << 4)
-#define RTI800_CSR_DMA_ENAB    (1 << 3)
-#define RTI800_CSR_INTR_TC     (1 << 2)
-#define RTI800_CSR_INTR_EC     (1 << 1)
-#define RTI800_CSR_INTR_OVRN   (1 << 0)
+#define RTI800_CSR_BUSY                BIT(7)
+#define RTI800_CSR_DONE                BIT(6)
+#define RTI800_CSR_OVERRUN     BIT(5)
+#define RTI800_CSR_TCR         BIT(4)
+#define RTI800_CSR_DMA_ENAB    BIT(3)
+#define RTI800_CSR_INTR_TC     BIT(2)
+#define RTI800_CSR_INTR_EC     BIT(1)
+#define RTI800_CSR_INTR_OVRN   BIT(0)
 #define RTI800_MUXGAIN         0x01
 #define RTI800_CONVERT         0x02
 #define RTI800_ADCLO           0x03