+++ /dev/null
-CONFIG_405EP=y
-CONFIG_405EX=y
-CONFIG_40x=y
-# CONFIG_44x is not set
-CONFIG_4xx=y
-CONFIG_4xx_SOC=y
-# CONFIG_6xx is not set
-# CONFIG_8139TOO is not set
-# CONFIG_ACADIA is not set
-# CONFIG_ADVANCED_OPTIONS is not set
-# CONFIG_AGP is not set
-CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
-CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
-CONFIG_ARCH_HAS_ILOG2_U32=y
-CONFIG_ARCH_HAS_WALK_MEMORY=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
-# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
-CONFIG_ARCH_POPULATES_NODE_MAP=y
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-CONFIG_ARCH_SUPPORTS_MSI=y
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_AUDIT_ARCH=y
-CONFIG_BASE_SMALL=0
-CONFIG_BITREVERSE=y
-# CONFIG_BOOKE_WDT is not set
-CONFIG_BOUNCE=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_CLASSIC_RCU=y
-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd"
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_CONSISTENT_START=0xff100000
-# CONFIG_CPU_FREQ is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEFAULT_UIMAGE is not set
-CONFIG_DEVPORT=y
-# CONFIG_E200 is not set
-CONFIG_EARLY_PRINTK=y
-# CONFIG_EDAC is not set
-# CONFIG_EP405 is not set
-CONFIG_EXTRA_TARGETS="uImage"
-CONFIG_FORCE_MAX_ZONEORDER=11
-# CONFIG_FSL_ULI1575 is not set
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_GPIO=y
-# CONFIG_GENERIC_IOMAP is not set
-CONFIG_GENERIC_NVRAM=y
-# CONFIG_GENERIC_TBSYNC is not set
-CONFIG_GENERIC_TIME_VSYSCALL=y
-# CONFIG_GEN_RTC is not set
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-# CONFIG_HAS_RAPIDIO is not set
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IOREMAP_PROT=y
-CONFIG_HAVE_KPROBES=y
-CONFIG_HAVE_KRETPROBES=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_LMB=y
-CONFIG_HAVE_OPROFILE=y
-# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
-# CONFIG_HCU4 is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_HW_RANDOM=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_I2C is not set
-CONFIG_IBM_NEW_EMAC=y
-# CONFIG_IBM_NEW_EMAC_DEBUG is not set
-CONFIG_IBM_NEW_EMAC_EMAC4=y
-CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
-CONFIG_IBM_NEW_EMAC_RGMII=y
-CONFIG_IBM_NEW_EMAC_RXB=256
-CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
-CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
-CONFIG_IBM_NEW_EMAC_TXB=256
-# CONFIG_IDE is not set
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_IOMMU_HELPER is not set
-# CONFIG_IPIC is not set
-# CONFIG_IRQSTACKS is not set
-CONFIG_IRQ_PER_CPU=y
-CONFIG_ISA_DMA_API=y
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_KILAUEA=y
-# CONFIG_LEDS_GPIO is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-# CONFIG_MACINTOSH_DRIVERS is not set
-CONFIG_MAGICBOXV1=y
-CONFIG_MAGICBOXV2=y
-# CONFIG_MAKALU is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_MMIO_NVRAM is not set
-# CONFIG_MPIC is not set
-# CONFIG_MPIC_WEIRD is not set
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-CONFIG_MTD_OF_PARTS=y
-CONFIG_MTD_PHYSMAP_OF=y
-# CONFIG_NATSEMI is not set
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_NVRAM is not set
-CONFIG_OF=y
-CONFIG_OF_DEVICE=y
-CONFIG_OF_GPIO=y
-CONFIG_OPENRB_LIGHT=y
-CONFIG_OPENRB_MEDIUM=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_PAGE_OFFSET=0xc0000000
-CONFIG_PCI=y
-CONFIG_PCIEAER=y
-# CONFIG_PCIEASPM is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_MSI=y
-CONFIG_PCI_SYSCALL=y
-CONFIG_PHYSICAL_START=0x00000000
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_PPC40x_SIMPLE=y
-CONFIG_PPC4xx_PCI_EXPRESS=y
-# CONFIG_PPC64 is not set
-# CONFIG_PPC_85xx is not set
-# CONFIG_PPC_8xx is not set
-# CONFIG_PPC_970_NAP is not set
-# CONFIG_PPC_CELL is not set
-# CONFIG_PPC_CELL_NATIVE is not set
-# CONFIG_PPC_CLOCK is not set
-CONFIG_PPC_DCR=y
-# CONFIG_PPC_DCR_MMIO is not set
-CONFIG_PPC_DCR_NATIVE=y
-# CONFIG_PPC_EARLY_DEBUG is not set
-# CONFIG_PPC_I8259 is not set
-# CONFIG_PPC_INDIRECT_IO is not set
-CONFIG_PPC_INDIRECT_PCI=y
-# CONFIG_PPC_MM_SLICES is not set
-# CONFIG_PPC_MPC106 is not set
-CONFIG_PPC_OF=y
-CONFIG_PPC_PCI_CHOICE=y
-# CONFIG_PPC_RTAS is not set
-CONFIG_PPC_UDBG_16550=y
-# CONFIG_PQ2ADS is not set
-CONFIG_PROC_DEVICETREE=y
-# CONFIG_R6040 is not set
-CONFIG_RESOURCES_64BIT=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_SCHED_HRTICK=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-# CONFIG_SERIAL_8250_RSA is not set
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_SLAB is not set
-CONFIG_SLUB=y
-CONFIG_TASK_SIZE=0xc0000000
-CONFIG_TICK_ONESHOT=y
-# CONFIG_VGASTATE is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_WALNUT is not set
-CONFIG_WORD_SIZE=32
-# CONFIG_XILINX_SYSACE is not set
-# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set
+++ /dev/null
---- a/arch/powerpc/boot/dts/kilauea.dts
-+++ b/arch/powerpc/boot/dts/kilauea.dts
-@@ -140,15 +140,15 @@
- #size-cells = <1>;
- partition@0 {
- label = "kernel";
-- reg = <0x00000000 0x00200000>;
-+ reg = <0x00000000 0x001e0000>;
- };
-- partition@200000 {
-- label = "root";
-- reg = <0x00200000 0x00200000>;
-+ partition@1e0000 {
-+ label = "device-tree";
-+ reg = <0x001e0000 0x0020000>;
- };
-- partition@400000 {
-- label = "user";
-- reg = <0x00400000 0x03b60000>;
-+ partition@200000 {
-+ label = "rootfs";
-+ reg = <0x00200000 0x03d60000>;
- };
- partition@3f60000 {
- label = "env";
+++ /dev/null
---- a/arch/powerpc/platforms/40x/kilauea.c
-+++ b/arch/powerpc/platforms/40x/kilauea.c
-@@ -21,6 +21,8 @@
- #include <asm/uic.h>
- #include <asm/pci-bridge.h>
- #include <asm/ppc4xx.h>
-+#include <asm/dcr.h>
-+#include <asm/dcr-regs.h>
-
- static __initdata struct of_device_id kilauea_of_bus[] = {
- { .compatible = "ibm,plb4", },
-@@ -46,6 +48,13 @@ static int __init kilauea_probe(void)
-
- ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
-
-+ /*
-+ * 405EX(r) has SDR0_MFR[E0CS/E1CS] set after reset. This selects
-+ * the internal loopback mode. Clear these bits so that both EMACs
-+ * don't use loopback mode as deafult.
-+ */
-+ mtdcri(SDR0, SDR0_MFR, mfdcri(SDR0, SDR0_MFR) & ~0x0c000000);
-+
- return 1;
- }
-
+++ /dev/null
---- a/arch/powerpc/boot/dcr.h
-+++ b/arch/powerpc/boot/dcr.h
-@@ -57,6 +57,9 @@ static const unsigned long sdram_bxcr[]
- #define EBC_BXCR_BU_WO 0x00010000
- #define EBC_BXCR_BU_RW 0x00018000
- #define EBC_BXCR_BW 0x00006000
-+#define EBC_BXCR_BW_8 0x00000000
-+#define EBC_BXCR_BW_16 0x00002000
-+#define EBC_BXCR_BW_32 0x00006000
- #define EBC_B0AP 0x10
- #define EBC_B1AP 0x11
- #define EBC_B2AP 0x12
+++ /dev/null
---- /dev/null
-+++ b/arch/powerpc/boot/cuboot-magicboxv1.c
-@@ -0,0 +1,40 @@
-+/*
-+ * Old U-boot compatibility for Magicbox v1
-+ *
-+ * Author: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include "ops.h"
-+#include "io.h"
-+#include "dcr.h"
-+#include "stdio.h"
-+#include "4xx.h"
-+#include "44x.h"
-+#include "cuboot.h"
-+
-+#define TARGET_4xx
-+#define TARGET_405EP
-+#include "ppcboot.h"
-+
-+static bd_t bd;
-+
-+static void magicboxv1_fixups(void)
-+{
-+ ibm405ep_fixup_clocks(25000000);
-+ ibm4xx_sdram_fixup_memsize();
-+ dt_fixup_mac_addresses(&bd.bi_enetaddr);
-+}
-+
-+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-+ unsigned long r6, unsigned long r7)
-+{
-+ CUBOOT_INIT();
-+ platform_ops.fixups = magicboxv1_fixups;
-+ platform_ops.exit = ibm40x_dbcr_reset;
-+ fdt_init(_dtb_start);
-+ serial_console_init();
-+}
---- /dev/null
-+++ b/arch/powerpc/boot/dts/magicboxv1.dts
-@@ -0,0 +1,217 @@
-+/*
-+ * Device Tree Source for Magicbox v1
-+ *
-+ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * Based on walnut.dts
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2. This program is licensed "as is" without
-+ * any warranty of any kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+
-+/ {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ model = "magicboxv1";
-+ compatible = "magicboxv1";
-+ dcr-parent = <&{/cpus/cpu@0}>;
-+
-+ aliases {
-+ ethernet0 = &EMAC;
-+ serial0 = &UART;
-+ };
-+
-+ cpus {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ cpu@0 {
-+ device_type = "cpu";
-+ model = "PowerPC,405EP";
-+ reg = <0x00000000>;
-+ clock-frequency = <0xbebc200>; /* Filled in by zImage */
-+ timebase-frequency = <0>; /* Filled in by zImage */
-+ i-cache-line-size = <20>;
-+ d-cache-line-size = <20>;
-+ i-cache-size = <4000>;
-+ d-cache-size = <4000>;
-+ dcr-controller;
-+ dcr-access-method = "native";
-+ };
-+ };
-+
-+ memory {
-+ device_type = "memory";
-+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
-+ };
-+
-+ UIC0: interrupt-controller {
-+ compatible = "ibm,uic";
-+ interrupt-controller;
-+ cell-index = <0>;
-+ dcr-reg = <0x0c0 0x009>;
-+ #address-cells = <0>;
-+ #size-cells = <0>;
-+ #interrupt-cells = <2>;
-+ };
-+
-+ plb {
-+ compatible = "ibm,plb3";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ SDRAM0: memory-controller {
-+ compatible = "ibm,sdram-405ep";
-+ dcr-reg = <0x010 0x002>;
-+ };
-+
-+ MAL: mcmal {
-+ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
-+ dcr-reg = <0x180 0x062>;
-+ num-tx-chans = <4>;
-+ num-rx-chans = <2>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0xb 0x4 /* TXEOB */
-+ 0xc 0x4 /* RXEOB */
-+ 0xa 0x4 /* SERR */
-+ 0xd 0x4 /* TXDE */
-+ 0xe 0x4 /* RXDE */>;
-+ };
-+
-+ POB0: opb {
-+ compatible = "ibm,opb-405ep", "ibm,opb";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges = <0xef600000 0xef600000 0x00a00000>;
-+ dcr-reg = <0x0a0 0x005>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ UART: serial@ef600300 {
-+ device_type = "serial";
-+ compatible = "ns16550";
-+ reg = <0xef600300 0x00000008>;
-+ virtual-reg = <0xef600300>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+ current-speed = <115200>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x0 0x4>;
-+ };
-+
-+ IIC: i2c@ef600500 {
-+ compatible = "ibm,iic-405ep", "ibm,iic";
-+ reg = <0xef600500 0x00000011>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x2 0x4>;
-+ };
-+
-+ GPIO: gpio@ef600700 {
-+ compatible = "ibm,gpio-405ep";
-+ reg = <0xef600700 0x00000020>;
-+ };
-+
-+ EMAC: ethernet@ef600800 {
-+ linux,network-index = <0x0>;
-+ device_type = "network";
-+ compatible = "ibm,emac-405ep", "ibm,emac";
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0xf 0x4 /* Ethernet */
-+ 0x9 0x4 /* Ethernet Wake Up */>;
-+ local-mac-address = [000000000000]; /* Filled in by zImage */
-+ reg = <0xef600800 0x00000070>;
-+ mal-device = <&MAL>;
-+ mal-tx-channel = <0>;
-+ mal-rx-channel = <0>;
-+ cell-index = <0>;
-+ max-frame-size = <0x5dc>;
-+ rx-fifo-size = <0x1000>;
-+ tx-fifo-size = <0x800>;
-+ phy-mode = "mii";
-+ phy-map = <0x00000000>;
-+ };
-+
-+ };
-+
-+ EBC0: ebc {
-+ compatible = "ibm,ebc-405ep", "ibm,ebc";
-+ dcr-reg = <0x012 0x002>;
-+ #address-cells = <2>;
-+ #size-cells = <1>;
-+ /* The ranges property is supplied by the bootwrapper
-+ * and is based on the firmware's configuration of the
-+ * EBC bridge
-+ */
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ nor_flash@ffc00000 {
-+ compatible = "cfi-flash";
-+ bank-width = <2>;
-+ reg = <0x00000000 0xffc00000 0x00400000>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ partition@0 {
-+ label = "linux";
-+ reg = <0x0 0x120000>;
-+ };
-+ partition@120000 {
-+ label = "rootfs";
-+ reg = <0x120000 0x2a0000>;
-+ };
-+ partition@3c0000 {
-+ label = "u-boot";
-+ reg = <0x3c0000 0x30000>;
-+ read-only;
-+ };
-+ };
-+ };
-+
-+ PCI0: pci@ec000000 {
-+ device_type = "pci";
-+ #interrupt-cells = <1>;
-+ #size-cells = <2>;
-+ #address-cells = <3>;
-+ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
-+ primary;
-+ reg = <0xeec00000 0x00000008 /* Config space access */
-+ 0xeed80000 0x00000004 /* IACK */
-+ 0xeed80000 0x00000004 /* Special cycle */
-+ 0xef480000 0x00000040>; /* Internal registers */
-+
-+ /* Outbound ranges, one memory and one IO,
-+ * later cannot be changed. Chip supports a second
-+ * IO range but we don't use it for now
-+ */
-+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
-+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
-+
-+ /* Inbound 2GB range starting at 0 */
-+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
-+
-+ /* Magicbox v1 has all 4 IRQ pins tied together per slot */
-+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
-+ interrupt-map = <
-+ /* IDSEL 1 */
-+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
-+
-+ /* IDSEL 2 */
-+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
-+
-+ /* IDSEL 3 */
-+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
-+
-+ /* IDSEL 4 */
-+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
-+ >;
-+ };
-+ };
-+
-+ chosen {
-+ linux,stdout-path = "/plb/opb/serial@ef600300";
-+ };
-+};
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -70,7 +70,7 @@ src-plat := of.c cuboot-52xx.c cuboot-82
- cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
- cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
- virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
-- cuboot-acadia.c
-+ cuboot-acadia.c cuboot-magicboxv1.c
- src-boot := $(src-wlib) $(src-plat) empty.c
-
- src-boot := $(addprefix $(obj)/, $(src-boot))
-@@ -214,6 +214,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImag
- image-$(CONFIG_EP405) += dtbImage.ep405
- image-$(CONFIG_WALNUT) += treeImage.walnut
- image-$(CONFIG_ACADIA) += cuImage.acadia
-+image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
-
- # Board ports in arch/powerpc/platform/44x/Kconfig
- image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
---- a/arch/powerpc/platforms/40x/Kconfig
-+++ b/arch/powerpc/platforms/40x/Kconfig
-@@ -49,6 +49,16 @@ config KILAUEA
- help
- This option enables support for the AMCC PPC405EX evaluation board.
-
-+config MAGICBOXV1
-+ bool "Magicbox v1"
-+ depends on 40x
-+ default n
-+ select PPC40x_SIMPLE
-+ select 405EP
-+ select PCI
-+ help
-+ This option enables support for the Magicbox v1 board.
-+
- config MAKALU
- bool "Makalu"
- depends on 40x
---- a/arch/powerpc/platforms/40x/ppc40x_simple.c
-+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
-@@ -51,7 +51,8 @@ machine_device_initcall(ppc40x_simple, p
- * board.c file for it rather than adding it to this list.
- */
- static char *board[] __initdata = {
-- "amcc,acadia"
-+ "amcc,acadia",
-+ "magicboxv1"
- };
-
- static int __init ppc40x_probe(void)
+++ /dev/null
---- /dev/null
-+++ b/arch/powerpc/boot/cuboot-magicboxv2.c
-@@ -0,0 +1,69 @@
-+/*
-+ * Old U-boot compatibility for Magicbox v2
-+ *
-+ * Author: Imre Kaloz <kaloz@openwrt.org>
-+ * Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include "ops.h"
-+#include "io.h"
-+#include "dcr.h"
-+#include "stdio.h"
-+#include "4xx.h"
-+#include "44x.h"
-+#include "cuboot.h"
-+
-+#define TARGET_4xx
-+#define TARGET_405EP
-+#include "ppcboot.h"
-+
-+static bd_t bd;
-+
-+static void fixup_cf_card(void)
-+{
-+#define DCRN_CPC0_PCI_BASE 0xf9
-+#define CF_CS0_BASE 0xff100000
-+#define CF_CS1_BASE 0xff200000
-+
-+ /* Turn on PerWE instead of PCIsomething */
-+ mtdcr(DCRN_CPC0_PCI_BASE,
-+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
-+
-+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
-+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
-+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
-+
-+ /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
-+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
-+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
-+
-+#undef DCRN_CPC0_PCI_BASE
-+#undef CF_CS0_BASE
-+#undef CF_CS1_BASE
-+}
-+
-+static void magicboxv2_fixups(void)
-+{
-+ fixup_cf_card();
-+ ibm405ep_fixup_clocks(25000000);
-+ ibm4xx_sdram_fixup_memsize();
-+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
-+}
-+
-+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-+ unsigned long r6, unsigned long r7)
-+{
-+ CUBOOT_INIT();
-+ platform_ops.fixups = magicboxv2_fixups;
-+ platform_ops.exit = ibm40x_dbcr_reset;
-+ fdt_init(_dtb_start);
-+ serial_console_init();
-+}
---- /dev/null
-+++ b/arch/powerpc/boot/dts/magicboxv2.dts
-@@ -0,0 +1,281 @@
-+/*
-+ * Device Tree Source for Magicbox v2
-+ *
-+ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * Based on walnut.dts
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2. This program is licensed "as is" without
-+ * any warranty of any kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+
-+/ {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ model = "magicboxv2";
-+ compatible = "magicboxv2";
-+ dcr-parent = <&{/cpus/cpu@0}>;
-+
-+ aliases {
-+ ethernet0 = &EMAC0;
-+ ethernet1 = &EMAC1;
-+ serial0 = &UART0;
-+ serial1 = &UART1;
-+ };
-+
-+ cpus {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ cpu@0 {
-+ device_type = "cpu";
-+ model = "PowerPC,405EP";
-+ reg = <0x00000000>;
-+ clock-frequency = <0xbebc200>; /* Filled in by zImage */
-+ timebase-frequency = <0>; /* Filled in by zImage */
-+ i-cache-line-size = <20>;
-+ d-cache-line-size = <20>;
-+ i-cache-size = <4000>;
-+ d-cache-size = <4000>;
-+ dcr-controller;
-+ dcr-access-method = "native";
-+ };
-+ };
-+
-+ memory {
-+ device_type = "memory";
-+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
-+ };
-+
-+ UIC0: interrupt-controller {
-+ compatible = "ibm,uic";
-+ interrupt-controller;
-+ cell-index = <0>;
-+ dcr-reg = <0x0c0 0x009>;
-+ #address-cells = <0>;
-+ #size-cells = <0>;
-+ #interrupt-cells = <2>;
-+ };
-+
-+ plb {
-+ compatible = "ibm,plb3";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ SDRAM0: memory-controller {
-+ compatible = "ibm,sdram-405ep";
-+ dcr-reg = <0x010 0x002>;
-+ };
-+
-+ MAL: mcmal {
-+ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
-+ dcr-reg = <0x180 0x062>;
-+ num-tx-chans = <4>;
-+ num-rx-chans = <2>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0xb 0x4 /* TXEOB */
-+ 0xc 0x4 /* RXEOB */
-+ 0xa 0x4 /* SERR */
-+ 0xd 0x4 /* TXDE */
-+ 0xe 0x4 /* RXDE */>;
-+ };
-+
-+ POB0: opb {
-+ compatible = "ibm,opb-405ep", "ibm,opb";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges = <0xef600000 0xef600000 0x00a00000>;
-+ dcr-reg = <0x0a0 0x005>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ UART0: serial@ef600300 {
-+ device_type = "serial";
-+ compatible = "ns16550";
-+ reg = <0xef600300 0x00000008>;
-+ virtual-reg = <0xef600300>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+ current-speed = <115200>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x0 0x4>;
-+ };
-+
-+ UART1: serial@ef600400 {
-+ device_type = "serial";
-+ compatible = "ns16550";
-+ reg = <0xef600400 0x00000008>;
-+ virtual-reg = <0xef600400>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+ current-speed = <115200>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x1 0x4>;
-+ };
-+
-+ IIC: i2c@ef600500 {
-+ compatible = "ibm,iic-405ep", "ibm,iic";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0xef600500 0x00000011>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x2 0x4>;
-+
-+ dtt@48 {
-+ compatible = "national,lm75";
-+ reg = <0x48>;
-+ };
-+
-+ eeprom@50 {
-+ compatible = "at24,24c16";
-+ reg = <0x50>;
-+ };
-+ };
-+
-+ GPIO0: gpio-controller@ef600700 {
-+ compatible = "ibm,ppc4xx-gpio";
-+ reg = <0xef600700 0x00000020>;
-+ #gpio-cells = <2>;
-+ gpio-controller;
-+ };
-+
-+ EMAC0: ethernet@ef600800 {
-+ linux,network-index = <0x0>;
-+ device_type = "network";
-+ compatible = "ibm,emac-405ep", "ibm,emac";
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0xf 0x4 /* Ethernet */
-+ 0x9 0x4 /* Ethernet Wake Up */>;
-+ local-mac-address = [000000000000]; /* Filled in by zImage */
-+ reg = <0xef600800 0x00000070>;
-+ mal-device = <&MAL>;
-+ mal-tx-channel = <0>;
-+ mal-rx-channel = <0>;
-+ cell-index = <0>;
-+ max-frame-size = <0x5dc>;
-+ rx-fifo-size = <0x1000>;
-+ tx-fifo-size = <0x800>;
-+ phy-mode = "mii";
-+ phy-map = <0x00000000>;
-+ };
-+
-+ EMAC1: ethernet@ef600900 {
-+ linux,network-index = <0x1>;
-+ device_type = "network";
-+ compatible = "ibm,emac-405ep", "ibm,emac";
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0x11 0x4 /* Ethernet */
-+ 0x09 0x4 /* Ethernet Wake Up */>;
-+ local-mac-address = [000000000000]; /* Filled in by zImage */
-+ reg = <0xef600900 0x00000070>;
-+ mal-device = <&MAL>;
-+ mal-tx-channel = <2>;
-+ mal-rx-channel = <1>;
-+ cell-index = <1>;
-+ max-frame-size = <0x5dc>;
-+ rx-fifo-size = <0x1000>;
-+ tx-fifo-size = <0x800>;
-+ mdio-device = <&EMAC0>;
-+ phy-mode = "mii";
-+ phy-map = <0x00000001>;
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+ user {
-+ label = "magicbox:red:user";
-+ gpios = <&GPIO0 2 1>;
-+ };
-+ };
-+ };
-+
-+ EBC0: ebc {
-+ compatible = "ibm,ebc-405ep", "ibm,ebc";
-+ dcr-reg = <0x012 0x002>;
-+ #address-cells = <2>;
-+ #size-cells = <1>;
-+ /* The ranges property is supplied by the bootwrapper
-+ * and is based on the firmware's configuration of the
-+ * EBC bridge
-+ */
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ cf_card@ff100000 {
-+ compatible = "magicbox-cf", "pata-magicbox-cf";
-+ reg = <0x00000000 0xff100000 0x00001000
-+ 0x00000000 0xff200000 0x00001000>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
-+ };
-+
-+ nor_flash@ffc00000 {
-+ compatible = "cfi-flash";
-+ bank-width = <2>;
-+ reg = <0x00000000 0xffc00000 0x00400000>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ partition@0 {
-+ label = "linux";
-+ reg = <0x0 0x120000>;
-+ };
-+ partition@120000 {
-+ label = "rootfs";
-+ reg = <0x120000 0x2a0000>;
-+ };
-+ partition@3c0000 {
-+ label = "u-boot";
-+ reg = <0x3c0000 0x30000>;
-+ read-only;
-+ };
-+ };
-+ };
-+
-+ PCI0: pci@ec000000 {
-+ device_type = "pci";
-+ #interrupt-cells = <1>;
-+ #size-cells = <2>;
-+ #address-cells = <3>;
-+ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
-+ primary;
-+ reg = <0xeec00000 0x00000008 /* Config space access */
-+ 0xeed80000 0x00000004 /* IACK */
-+ 0xeed80000 0x00000004 /* Special cycle */
-+ 0xef480000 0x00000040>; /* Internal registers */
-+
-+ /* Outbound ranges, one memory and one IO,
-+ * later cannot be changed. Chip supports a second
-+ * IO range but we don't use it for now
-+ */
-+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
-+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
-+
-+ /* Inbound 2GB range starting at 0 */
-+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
-+
-+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
-+ interrupt-map = <
-+ /* IDSEL 1 */
-+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
-+
-+ /* IDSEL 2 */
-+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
-+
-+ /* IDSEL 3 */
-+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
-+
-+ /* IDSEL 4 */
-+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
-+ >;
-+ };
-+ };
-+
-+ chosen {
-+ linux,stdout-path = "/plb/opb/serial@ef600300";
-+ };
-+};
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -70,7 +70,7 @@ src-plat := of.c cuboot-52xx.c cuboot-82
- cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
- cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
- virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
-- cuboot-acadia.c cuboot-magicboxv1.c
-+ cuboot-acadia.c cuboot-magicboxv1.c cuboot-magicboxv2.c
- src-boot := $(src-wlib) $(src-plat) empty.c
-
- src-boot := $(addprefix $(obj)/, $(src-boot))
-@@ -215,6 +215,7 @@ image-$(CONFIG_EP405) += dtbImage.ep40
- image-$(CONFIG_WALNUT) += treeImage.walnut
- image-$(CONFIG_ACADIA) += cuImage.acadia
- image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
-+image-$(CONFIG_MAGICBOXV2) += cuImage.magicboxv2
-
- # Board ports in arch/powerpc/platform/44x/Kconfig
- image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
---- a/arch/powerpc/platforms/40x/Kconfig
-+++ b/arch/powerpc/platforms/40x/Kconfig
-@@ -59,6 +59,16 @@ config MAGICBOXV1
- help
- This option enables support for the Magicbox v1 board.
-
-+config MAGICBOXV2
-+ bool "Magicbox v2"
-+ depends on 40x
-+ default n
-+ select PPC40x_SIMPLE
-+ select 405EP
-+ select PCI
-+ help
-+ This option enables support for the Magicbox v2 board.
-+
- config MAKALU
- bool "Makalu"
- depends on 40x
---- a/arch/powerpc/platforms/40x/ppc40x_simple.c
-+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
-@@ -52,7 +52,8 @@ machine_device_initcall(ppc40x_simple, p
- */
- static char *board[] __initdata = {
- "amcc,acadia",
-- "magicboxv1"
-+ "magicboxv1",
-+ "magicboxv2",
- };
-
- static int __init ppc40x_probe(void)
+++ /dev/null
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -70,7 +70,8 @@ src-plat := of.c cuboot-52xx.c cuboot-82
- cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
- cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
- virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
-- cuboot-acadia.c cuboot-magicboxv1.c cuboot-magicboxv2.c
-+ cuboot-acadia.c cuboot-magicboxv1.c cuboot-magicboxv2.c \
-+ cuboot-openrb-light.c
- src-boot := $(src-wlib) $(src-plat) empty.c
-
- src-boot := $(addprefix $(obj)/, $(src-boot))
-@@ -216,6 +217,7 @@ image-$(CONFIG_WALNUT) += treeImage.wa
- image-$(CONFIG_ACADIA) += cuImage.acadia
- image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
- image-$(CONFIG_MAGICBOXV2) += cuImage.magicboxv2
-+image-$(CONFIG_OPENRB_LIGHT) += cuImage.openrb-light
-
- # Board ports in arch/powerpc/platform/44x/Kconfig
- image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
---- a/arch/powerpc/platforms/40x/Kconfig
-+++ b/arch/powerpc/platforms/40x/Kconfig
-@@ -79,6 +79,16 @@ config MAKALU
- help
- This option enables support for the AMCC PPC405EX board.
-
-+config OPENRB_LIGHT
-+ bool "OpenRB Light"
-+ depends on 40x
-+ default n
-+ select PPC40x_SIMPLE
-+ select 405EP
-+ select PCI
-+ help
-+ This option enables support for the OpenRB Light board.
-+
- #config REDWOOD_5
- # bool "Redwood-5"
- # depends on 40x
---- a/arch/powerpc/platforms/40x/ppc40x_simple.c
-+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
-@@ -54,6 +54,7 @@ static char *board[] __initdata = {
- "amcc,acadia",
- "magicboxv1",
- "magicboxv2",
-+ "openrb,light",
- };
-
- static int __init ppc40x_probe(void)
---- /dev/null
-+++ b/arch/powerpc/boot/cuboot-openrb-light.c
-@@ -0,0 +1,69 @@
-+/*
-+ * Old U-boot compatibility for OpenRB Light board
-+ *
-+ * Author: Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include "ops.h"
-+#include "io.h"
-+#include "dcr.h"
-+#include "stdio.h"
-+#include "4xx.h"
-+#include "44x.h"
-+#include "cuboot.h"
-+
-+#define TARGET_4xx
-+#define TARGET_405EP
-+#include "ppcboot.h"
-+
-+static bd_t bd;
-+
-+static void fixup_cf_card(void)
-+{
-+#define DCRN_CPC0_PCI_BASE 0xf9
-+#define CF_CS0_BASE 0xff100000
-+#define CF_CS1_BASE 0xff200000
-+
-+ /* Turn on PerWE instead of PCIsomething */
-+ mtdcr(DCRN_CPC0_PCI_BASE,
-+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
-+
-+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
-+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
-+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
-+
-+ /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
-+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
-+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
-+
-+#undef DCRN_CPC0_PCI_BASE
-+#undef CF_CS0_BASE
-+#undef CF_CS1_BASE
-+}
-+
-+static void openrb_light_fixups(void)
-+{
-+ fixup_cf_card();
-+ ibm405ep_fixup_clocks(33333000);
-+ ibm4xx_sdram_fixup_memsize();
-+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
-+}
-+
-+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-+ unsigned long r6, unsigned long r7)
-+{
-+ CUBOOT_INIT();
-+ platform_ops.fixups = openrb_light_fixups;
-+ platform_ops.exit = ibm40x_dbcr_reset;
-+ fdt_init(_dtb_start);
-+ serial_console_init();
-+}
-+
---- /dev/null
-+++ b/arch/powerpc/boot/dts/openrb-light.dts
-@@ -0,0 +1,252 @@
-+/*
-+ * Device Tree Source for OpenRB Light board
-+ *
-+ * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * Based on magicboxv2.dts
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2. This program is licensed "as is" without
-+ * any warranty of any kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+
-+/ {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ model = "openrb,light";
-+ compatible = "openrb,light";
-+ dcr-parent = <&{/cpus/cpu@0}>;
-+
-+ aliases {
-+ ethernet0 = &EMAC0;
-+ serial0 = &UART0;
-+ serial1 = &UART1;
-+ };
-+
-+ cpus {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ cpu@0 {
-+ device_type = "cpu";
-+ model = "PowerPC,405EP";
-+ reg = <0x00000000>;
-+ clock-frequency = <0xbebc200>; /* Filled in by zImage */
-+ timebase-frequency = <0>; /* Filled in by zImage */
-+ i-cache-line-size = <20>;
-+ d-cache-line-size = <20>;
-+ i-cache-size = <4000>;
-+ d-cache-size = <4000>;
-+ dcr-controller;
-+ dcr-access-method = "native";
-+ };
-+ };
-+
-+ memory {
-+ device_type = "memory";
-+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
-+ };
-+
-+ UIC0: interrupt-controller {
-+ compatible = "ibm,uic";
-+ interrupt-controller;
-+ cell-index = <0>;
-+ dcr-reg = <0x0c0 0x009>;
-+ #address-cells = <0>;
-+ #size-cells = <0>;
-+ #interrupt-cells = <2>;
-+ };
-+
-+ plb {
-+ compatible = "ibm,plb3";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ SDRAM0: memory-controller {
-+ compatible = "ibm,sdram-405ep";
-+ dcr-reg = <0x010 0x002>;
-+ };
-+
-+ MAL: mcmal {
-+ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
-+ dcr-reg = <0x180 0x062>;
-+ num-tx-chans = <4>;
-+ num-rx-chans = <2>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0xb 0x4 /* TXEOB */
-+ 0xc 0x4 /* RXEOB */
-+ 0xa 0x4 /* SERR */
-+ 0xd 0x4 /* TXDE */
-+ 0xe 0x4 /* RXDE */>;
-+ };
-+
-+ OPB0: opb {
-+ compatible = "ibm,opb-405ep", "ibm,opb";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges = <0xef600000 0xef600000 0x00a00000>;
-+ dcr-reg = <0x0a0 0x005>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ UART0: serial@ef600300 {
-+ device_type = "serial";
-+ compatible = "ns16550";
-+ reg = <0xef600300 0x00000008>;
-+ virtual-reg = <0xef600300>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+ current-speed = <115200>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x0 0x4>;
-+ };
-+
-+ UART1: serial@ef600400 {
-+ device_type = "serial";
-+ compatible = "ns16550";
-+ reg = <0xef600400 0x00000008>;
-+ virtual-reg = <0xef600400>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+ current-speed = <115200>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x1 0x4>;
-+ };
-+
-+ IIC: i2c@ef600500 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "ibm,iic-405ep", "ibm,iic";
-+ reg = <0xef600500 0x00000011>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x2 0x4>;
-+
-+ eeprom@50 {
-+ compatible = "at24,24c16";
-+ reg = <0x50>;
-+ };
-+ };
-+
-+ GPIO0: gpio-controller@ef600700 {
-+ compatible = "ibm,ppc4xx-gpio";
-+ reg = <0xef600700 0x00000020>;
-+ #gpio-cells = <2>;
-+ gpio-controller;
-+ };
-+
-+ EMAC0: ethernet@ef600800 {
-+ linux,network-index = <0x0>;
-+ device_type = "network";
-+ compatible = "ibm,emac-405ep", "ibm,emac";
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0xf 0x4 /* Ethernet */
-+ 0x9 0x4 /* Ethernet Wake Up */>;
-+ local-mac-address = [000000000000]; /* Filled in by zImage */
-+ reg = <0xef600800 0x00000070>;
-+ mal-device = <&MAL>;
-+ mal-tx-channel = <0>;
-+ mal-rx-channel = <0>;
-+ cell-index = <0>;
-+ max-frame-size = <0x5dc>;
-+ rx-fifo-size = <0x1000>;
-+ tx-fifo-size = <0x800>;
-+ phy-mode = "mii";
-+ phy-map = <0x00000000>;
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+ user {
-+ label = "openrb:green:user";
-+ gpios = <&GPIO0 2 1>;
-+ };
-+ };
-+ };
-+
-+ EBC0: ebc {
-+ compatible = "ibm,ebc-405ep", "ibm,ebc";
-+ dcr-reg = <0x012 0x002>;
-+ #address-cells = <2>;
-+ #size-cells = <1>;
-+ /* The ranges property is supplied by the bootwrapper
-+ * and is based on the firmware's configuration of the
-+ * EBC bridge
-+ */
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ cf_card@ff100000 {
-+ compatible = "magicbox-cf", "pata-magicbox-cf";
-+ reg = <0x00000000 0xff100000 0x00001000
-+ 0x00000000 0xff200000 0x00001000>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
-+ };
-+
-+ nor_flash@ff800000 {
-+ compatible = "cfi-flash";
-+ bank-width = <2>;
-+ reg = <0x00000000 0xff800000 0x00800000>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ partition@0 {
-+ label = "linux";
-+ reg = <0x0 0x120000>;
-+ };
-+ partition@120000 {
-+ label = "rootfs";
-+ reg = <0x120000 0x6a0000>;
-+ };
-+ partition@7c0000 {
-+ label = "u-boot";
-+ reg = <0x7c0000 0x30000>;
-+ read-only;
-+ };
-+ };
-+ };
-+
-+ PCI0: pci@ec000000 {
-+ device_type = "pci";
-+ #interrupt-cells = <1>;
-+ #size-cells = <2>;
-+ #address-cells = <3>;
-+ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
-+ primary;
-+ reg = <0xeec00000 0x00000008 /* Config space access */
-+ 0xeed80000 0x00000004 /* IACK */
-+ 0xeed80000 0x00000004 /* Special cycle */
-+ 0xef480000 0x00000040>; /* Internal registers */
-+
-+ /* Outbound ranges, one memory and one IO,
-+ * later cannot be changed. Chip supports a second
-+ * IO range but we don't use it for now
-+ */
-+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
-+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
-+
-+ /* Inbound 2GB range starting at 0 */
-+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
-+
-+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
-+ interrupt-map = <
-+ /* IDSEL 1 */
-+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
-+
-+ /* IDSEL 2 */
-+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
-+
-+ /* IDSEL 3 */
-+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
-+
-+ /* IDSEL 4 */
-+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
-+ >;
-+ };
-+ };
-+
-+ chosen {
-+ linux,stdout-path = "/plb/opb/serial@ef600300";
-+ };
-+};
+++ /dev/null
---- a/arch/powerpc/boot/Makefile
-+++ b/arch/powerpc/boot/Makefile
-@@ -71,7 +71,7 @@ src-plat := of.c cuboot-52xx.c cuboot-82
- cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
- virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
- cuboot-acadia.c cuboot-magicboxv1.c cuboot-magicboxv2.c \
-- cuboot-openrb-light.c
-+ cuboot-openrb-light.c cuboot-openrb-medium.c
- src-boot := $(src-wlib) $(src-plat) empty.c
-
- src-boot := $(addprefix $(obj)/, $(src-boot))
-@@ -218,6 +218,7 @@ image-$(CONFIG_ACADIA) += cuImage.acad
- image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
- image-$(CONFIG_MAGICBOXV2) += cuImage.magicboxv2
- image-$(CONFIG_OPENRB_LIGHT) += cuImage.openrb-light
-+image-$(CONFIG_OPENRB_MEDIUM) += cuImage.openrb-medium
-
- # Board ports in arch/powerpc/platform/44x/Kconfig
- image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
---- a/arch/powerpc/platforms/40x/Kconfig
-+++ b/arch/powerpc/platforms/40x/Kconfig
-@@ -89,6 +89,16 @@ config OPENRB_LIGHT
- help
- This option enables support for the OpenRB Light board.
-
-+config OPENRB_MEDIUM
-+ bool "OpenRB Medium"
-+ depends on 40x
-+ default n
-+ select PPC40x_SIMPLE
-+ select 405EP
-+ select PCI
-+ help
-+ This option enables support for the OpenRB Medium board.
-+
- #config REDWOOD_5
- # bool "Redwood-5"
- # depends on 40x
---- a/arch/powerpc/platforms/40x/ppc40x_simple.c
-+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
-@@ -55,6 +55,7 @@ static char *board[] __initdata = {
- "magicboxv1",
- "magicboxv2",
- "openrb,light",
-+ "openrb,medium",
- };
-
- static int __init ppc40x_probe(void)
---- /dev/null
-+++ b/arch/powerpc/boot/cuboot-openrb-medium.c
-@@ -0,0 +1,69 @@
-+/*
-+ * Old U-boot compatibility for OpenRB Medium
-+ *
-+ * Author: Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include "ops.h"
-+#include "io.h"
-+#include "dcr.h"
-+#include "stdio.h"
-+#include "4xx.h"
-+#include "44x.h"
-+#include "cuboot.h"
-+
-+#define TARGET_4xx
-+#define TARGET_405EP
-+#include "ppcboot.h"
-+
-+static bd_t bd;
-+
-+static void fixup_cf_card(void)
-+{
-+#define DCRN_CPC0_PCI_BASE 0xf9
-+#define CF_CS0_BASE 0xff100000
-+#define CF_CS1_BASE 0xff200000
-+
-+ /* Turn on PerWE instead of PCIsomething */
-+ mtdcr(DCRN_CPC0_PCI_BASE,
-+ mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
-+
-+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
-+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
-+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
-+
-+ /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
-+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
-+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
-+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
-+
-+#undef DCRN_CPC0_PCI_BASE
-+#undef CF_CS0_BASE
-+#undef CF_CS1_BASE
-+}
-+
-+static void openrb_light_fixups(void)
-+{
-+ fixup_cf_card();
-+ ibm405ep_fixup_clocks(33333000);
-+ ibm4xx_sdram_fixup_memsize();
-+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
-+}
-+
-+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-+ unsigned long r6, unsigned long r7)
-+{
-+ CUBOOT_INIT();
-+ platform_ops.fixups = openrb_light_fixups;
-+ platform_ops.exit = ibm40x_dbcr_reset;
-+ fdt_init(_dtb_start);
-+ serial_console_init();
-+}
-+
---- /dev/null
-+++ b/arch/powerpc/boot/dts/openrb-medium.dts
-@@ -0,0 +1,281 @@
-+/*
-+ * Device Tree Source for OpenRB Medium board
-+ *
-+ * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * Based on walnut.dts
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2. This program is licensed "as is" without
-+ * any warranty of any kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+
-+/ {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ model = "openrb,medium";
-+ compatible = "openrb,medium";
-+ dcr-parent = <&{/cpus/cpu@0}>;
-+
-+ aliases {
-+ ethernet0 = &EMAC0;
-+ ethernet1 = &EMAC1;
-+ serial0 = &UART0;
-+ serial1 = &UART1;
-+ };
-+
-+ cpus {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ cpu@0 {
-+ device_type = "cpu";
-+ model = "PowerPC,405EP";
-+ reg = <0x00000000>;
-+ clock-frequency = <0xbebc200>; /* Filled in by zImage */
-+ timebase-frequency = <0>; /* Filled in by zImage */
-+ i-cache-line-size = <20>;
-+ d-cache-line-size = <20>;
-+ i-cache-size = <4000>;
-+ d-cache-size = <4000>;
-+ dcr-controller;
-+ dcr-access-method = "native";
-+ };
-+ };
-+
-+ memory {
-+ device_type = "memory";
-+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
-+ };
-+
-+ UIC0: interrupt-controller {
-+ compatible = "ibm,uic";
-+ interrupt-controller;
-+ cell-index = <0>;
-+ dcr-reg = <0x0c0 0x009>;
-+ #address-cells = <0>;
-+ #size-cells = <0>;
-+ #interrupt-cells = <2>;
-+ };
-+
-+ plb {
-+ compatible = "ibm,plb3";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ SDRAM0: memory-controller {
-+ compatible = "ibm,sdram-405ep";
-+ dcr-reg = <0x010 0x002>;
-+ };
-+
-+ MAL: mcmal {
-+ compatible = "ibm,mcmal-405ep", "ibm,mcmal";
-+ dcr-reg = <0x180 0x062>;
-+ num-tx-chans = <4>;
-+ num-rx-chans = <2>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0xb 0x4 /* TXEOB */
-+ 0xc 0x4 /* RXEOB */
-+ 0xa 0x4 /* SERR */
-+ 0xd 0x4 /* TXDE */
-+ 0xe 0x4 /* RXDE */>;
-+ };
-+
-+ POB0: opb {
-+ compatible = "ibm,opb-405ep", "ibm,opb";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges = <0xef600000 0xef600000 0x00a00000>;
-+ dcr-reg = <0x0a0 0x005>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ UART0: serial@ef600300 {
-+ device_type = "serial";
-+ compatible = "ns16550";
-+ reg = <0xef600300 0x00000008>;
-+ virtual-reg = <0xef600300>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+ current-speed = <115200>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x0 0x4>;
-+ };
-+
-+ UART1: serial@ef600400 {
-+ device_type = "serial";
-+ compatible = "ns16550";
-+ reg = <0xef600400 0x00000008>;
-+ virtual-reg = <0xef600400>;
-+ clock-frequency = <0>; /* Filled in by zImage */
-+ current-speed = <115200>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x1 0x4>;
-+ };
-+
-+ IIC: i2c@ef600500 {
-+ compatible = "ibm,iic-405ep", "ibm,iic";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0xef600500 0x00000011>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x2 0x4>;
-+
-+ dtt@48 {
-+ compatible = "national,lm75";
-+ reg = <0x48>;
-+ };
-+
-+ eeprom@50 {
-+ compatible = "at24,24c16";
-+ reg = <0x50>;
-+ };
-+ };
-+
-+ GPIO0: gpio-controller@ef600700 {
-+ compatible = "ibm,ppc4xx-gpio";
-+ reg = <0xef600700 0x00000020>;
-+ #gpio-cells = <2>;
-+ gpio-controller;
-+ };
-+
-+ EMAC0: ethernet@ef600800 {
-+ linux,network-index = <0x0>;
-+ device_type = "network";
-+ compatible = "ibm,emac-405ep", "ibm,emac";
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0xf 0x4 /* Ethernet */
-+ 0x9 0x4 /* Ethernet Wake Up */>;
-+ local-mac-address = [000000000000]; /* Filled in by zImage */
-+ reg = <0xef600800 0x00000070>;
-+ mal-device = <&MAL>;
-+ mal-tx-channel = <0>;
-+ mal-rx-channel = <0>;
-+ cell-index = <0>;
-+ max-frame-size = <0x5dc>;
-+ rx-fifo-size = <0x1000>;
-+ tx-fifo-size = <0x800>;
-+ phy-mode = "mii";
-+ phy-map = <0x00000000>;
-+ };
-+
-+ EMAC1: ethernet@ef600900 {
-+ linux,network-index = <0x1>;
-+ device_type = "network";
-+ compatible = "ibm,emac-405ep", "ibm,emac";
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <
-+ 0x11 0x4 /* Ethernet */
-+ 0x09 0x4 /* Ethernet Wake Up */>;
-+ local-mac-address = [000000000000]; /* Filled in by zImage */
-+ reg = <0xef600900 0x00000070>;
-+ mal-device = <&MAL>;
-+ mal-tx-channel = <2>;
-+ mal-rx-channel = <1>;
-+ cell-index = <1>;
-+ max-frame-size = <0x5dc>;
-+ rx-fifo-size = <0x1000>;
-+ tx-fifo-size = <0x800>;
-+ mdio-device = <&EMAC0>;
-+ phy-mode = "mii";
-+ phy-map = <0x00000001>;
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+ user {
-+ label = "magicbox:red:user";
-+ gpios = <&GPIO0 2 1>;
-+ };
-+ };
-+ };
-+
-+ EBC0: ebc {
-+ compatible = "ibm,ebc-405ep", "ibm,ebc";
-+ dcr-reg = <0x012 0x002>;
-+ #address-cells = <2>;
-+ #size-cells = <1>;
-+ /* The ranges property is supplied by the bootwrapper
-+ * and is based on the firmware's configuration of the
-+ * EBC bridge
-+ */
-+ clock-frequency = <0>; /* Filled in by zImage */
-+
-+ cf_card@ff100000 {
-+ compatible = "magicbox-cf", "pata-magicbox-cf";
-+ reg = <0x00000000 0xff100000 0x00001000
-+ 0x00000000 0xff200000 0x00001000>;
-+ interrupt-parent = <&UIC0>;
-+ interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
-+ };
-+
-+ nor_flash@ffc00000 {
-+ compatible = "cfi-flash";
-+ bank-width = <2>;
-+ reg = <0x00000000 0xffc00000 0x00400000>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ partition@0 {
-+ label = "linux";
-+ reg = <0x0 0x120000>;
-+ };
-+ partition@120000 {
-+ label = "rootfs";
-+ reg = <0x120000 0x2a0000>;
-+ };
-+ partition@3c0000 {
-+ label = "u-boot";
-+ reg = <0x3c0000 0x30000>;
-+ read-only;
-+ };
-+ };
-+ };
-+
-+ PCI0: pci@ec000000 {
-+ device_type = "pci";
-+ #interrupt-cells = <1>;
-+ #size-cells = <2>;
-+ #address-cells = <3>;
-+ compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
-+ primary;
-+ reg = <0xeec00000 0x00000008 /* Config space access */
-+ 0xeed80000 0x00000004 /* IACK */
-+ 0xeed80000 0x00000004 /* Special cycle */
-+ 0xef480000 0x00000040>; /* Internal registers */
-+
-+ /* Outbound ranges, one memory and one IO,
-+ * later cannot be changed. Chip supports a second
-+ * IO range but we don't use it for now
-+ */
-+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
-+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
-+
-+ /* Inbound 2GB range starting at 0 */
-+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
-+
-+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
-+ interrupt-map = <
-+ /* IDSEL 1 */
-+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
-+
-+ /* IDSEL 2 */
-+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
-+
-+ /* IDSEL 3 */
-+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
-+
-+ /* IDSEL 4 */
-+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
-+ >;
-+ };
-+ };
-+
-+ chosen {
-+ linux,stdout-path = "/plb/opb/serial@ef600300";
-+ };
-+};
+++ /dev/null
---- a/drivers/ide/Kconfig
-+++ b/drivers/ide/Kconfig
-@@ -712,6 +712,11 @@ config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
- default "128"
- depends on BLK_DEV_IDE_AU1XXX
-
-+config BLK_DEV_IDE_MAGICBOX
-+ tristate "Magicbox CF card support"
-+ depends on MAGICBOXV2 || OPENRB_LIGHT
-+ select IDE_XFER_MODE
-+
- config BLK_DEV_IDE_TX4938
- tristate "TX4938 internal IDE support"
- depends on SOC_TX4938
---- a/drivers/ide/Makefile
-+++ b/drivers/ide/Makefile
-@@ -110,6 +110,7 @@ obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapi
- obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710) += palm_bk3710.o
-
- obj-$(CONFIG_BLK_DEV_IDE_AU1XXX) += au1xxx-ide.o
-+obj-$(CONFIG_BLK_DEV_IDE_MAGICBOX) += magicbox_ide.o
-
- obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o
- obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o
---- /dev/null
-+++ b/drivers/ide/magicbox_ide.c
-@@ -0,0 +1,332 @@
-+/*
-+ * IDE driver for the MagicBox 2.0 onboard CompactFlash slot.
-+ *
-+ * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * Based on the original driver by Wojtek Kaniewski <wojtekka@toxygen.net>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/ioport.h>
-+#include <linux/of.h>
-+#include <linux/of_device.h>
-+#include <linux/of_platform.h>
-+#include <linux/ide.h>
-+
-+#define DRV_DESC "IDE driver for Magicbox 2.0 onboard CF slot"
-+#define DRV_NAME "magicbox_cf"
-+
-+static u8 magicbox_ide_inb(unsigned long port)
-+{
-+ return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
-+}
-+
-+static void magicbox_ide_outb(u8 value, unsigned long port)
-+{
-+ writew(value << 8, (void __iomem *) port);
-+}
-+
-+static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
-+{
-+ u16 *ptr;
-+
-+ for (ptr = addr; count--; ptr++)
-+ *ptr = readw((void __iomem *) port);
-+}
-+
-+static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
-+{
-+ u32 *ptr;
-+
-+ for (ptr = addr; count--; ptr++)
-+ *ptr = readl((void __iomem *) port);
-+}
-+
-+static inline void magicbox_ide_outsw(unsigned long port, void *addr,
-+ u32 count)
-+{
-+ u16 *ptr;
-+
-+ for (ptr = addr; count--; ptr++)
-+ writew(*ptr, (void __iomem *) port);
-+}
-+
-+static inline void magicbox_ide_outsl(unsigned long port, void *addr,
-+ u32 count)
-+{
-+ u32 *ptr;
-+
-+ for (ptr = addr; count--; ptr++)
-+ writel(*ptr, (void __iomem *) port);
-+}
-+
-+static void magicbox_ide_exec_command(ide_hwif_t *hwif, u8 cmd)
-+{
-+ magicbox_ide_outb(cmd, hwif->io_ports.command_addr);
-+}
-+
-+static u8 magicbox_ide_read_status(ide_hwif_t *hwif)
-+{
-+ return magicbox_ide_inb(hwif->io_ports.status_addr);
-+}
-+
-+static u8 magicbox_ide_read_altstatus(ide_hwif_t *hwif)
-+{
-+ return magicbox_ide_inb(hwif->io_ports.ctl_addr);
-+}
-+
-+static void magicbox_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
-+{
-+ struct ide_io_ports *io_ports = &drive->hwif->io_ports;
-+ struct ide_taskfile *tf = &task->tf;
-+ u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
-+
-+ if (task->tf_flags & IDE_TFLAG_FLAGGED)
-+ HIHI = 0xFF;
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_DATA)
-+ writel((tf->hob_data << 8) | tf->data,
-+ (void __iomem *) io_ports->data_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
-+ magicbox_ide_outb(tf->hob_feature, io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
-+ magicbox_ide_outb(tf->hob_nsect, io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
-+ magicbox_ide_outb(tf->hob_lbal, io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
-+ magicbox_ide_outb(tf->hob_lbam, io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
-+ magicbox_ide_outb(tf->hob_lbah, io_ports->lbah_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
-+ magicbox_ide_outb(tf->feature, io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
-+ magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
-+ magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
-+ magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
-+ magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
-+ magicbox_ide_outb((tf->device & HIHI) | drive->select,
-+ io_ports->device_addr);
-+}
-+
-+static void magicbox_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
-+{
-+ struct ide_io_ports *io_ports = &drive->hwif->io_ports;
-+ struct ide_taskfile *tf = &task->tf;
-+
-+ if (task->tf_flags & IDE_TFLAG_IN_DATA) {
-+ u16 data = (u16) readl((void __iomem *) io_ports->data_addr);
-+
-+ tf->data = data & 0xff;
-+ tf->hob_data = (data >> 8) & 0xff;
-+ }
-+
-+ /* be sure we're looking at the low order bits */
-+ magicbox_ide_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_IN_NSECT)
-+ tf->nsect = magicbox_ide_inb(io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAL)
-+ tf->lbal = magicbox_ide_inb(io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAM)
-+ tf->lbam = magicbox_ide_inb(io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAH)
-+ tf->lbah = magicbox_ide_inb(io_ports->lbah_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
-+ tf->device = magicbox_ide_inb(io_ports->device_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_LBA48) {
-+ magicbox_ide_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
-+ tf->hob_feature = magicbox_ide_inb(io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
-+ tf->hob_nsect = magicbox_ide_inb(io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
-+ tf->hob_lbal = magicbox_ide_inb(io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
-+ tf->hob_lbam = magicbox_ide_inb(io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
-+ tf->hob_lbah = magicbox_ide_inb(io_ports->lbah_addr);
-+ }
-+}
-+
-+static void magicbox_ide_input_data(ide_drive_t *drive, struct request *rq,
-+ void *buf, unsigned int len)
-+{
-+ unsigned long port = drive->hwif->io_ports.data_addr;
-+
-+ len++;
-+
-+ if (drive->io_32bit) {
-+ magicbox_ide_insl(port, buf, len / 4);
-+
-+ if ((len & 3) >= 2)
-+ magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
-+ } else
-+ magicbox_ide_insw(port, buf, len / 2);
-+}
-+
-+static void magicbox_ide_output_data(ide_drive_t *drive, struct request *rq,
-+ void *buf, unsigned int len)
-+{
-+ unsigned long port = drive->hwif->io_ports.data_addr;
-+
-+ len++;
-+
-+ if (drive->io_32bit) {
-+ magicbox_ide_outsl(port, buf, len / 4);
-+
-+ if ((len & 3) >= 2)
-+ magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
-+ } else
-+ magicbox_ide_outsw(port, buf, len / 2);
-+}
-+
-+static void magicbox_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
-+{
-+}
-+
-+static u8 magicbox_ide_cable_detect(ide_hwif_t *hwif)
-+{
-+ return ATA_CBL_PATA40;
-+}
-+
-+static const struct ide_tp_ops magicbox_ide_tp_ops = {
-+ .exec_command = magicbox_ide_exec_command,
-+ .read_status = magicbox_ide_read_status,
-+ .read_altstatus = magicbox_ide_read_altstatus,
-+
-+ .set_irq = ide_set_irq,
-+ .tf_load = magicbox_ide_tf_load,
-+ .tf_read = magicbox_ide_tf_read,
-+
-+ .input_data = magicbox_ide_input_data,
-+ .output_data = magicbox_ide_output_data,
-+};
-+
-+static const struct ide_port_ops magicbox_ide_port_ops = {
-+ .set_pio_mode = magicbox_ide_set_pio_mode,
-+ .cable_detect = magicbox_ide_cable_detect,
-+};
-+
-+static const struct ide_port_info magicbox_ide_port_info = {
-+ .name = DRV_NAME,
-+ .chipset = ide_generic,
-+ .tp_ops = &magicbox_ide_tp_ops,
-+ .port_ops = &magicbox_ide_port_ops,
-+ .host_flags = IDE_HFLAG_SINGLE |
-+ IDE_HFLAG_NO_DMA |
-+ IDE_HFLAG_MMIO |
-+ IDE_HFLAG_UNMASK_IRQS,
-+ .pio_mask = ATA_PIO4,
-+};
-+
-+static inline void magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
-+ u16 __iomem *ctrl, int irq)
-+{
-+ unsigned long port = (unsigned long) base;
-+ int i;
-+
-+ memset(hw, 0, sizeof(*hw));
-+ for (i = 0; i <= 7; i++)
-+ hw->io_ports_array[i] = port + i * 2;
-+
-+ /*
-+ * the IDE control register is at ATA address 6,
-+ * with CS1 active instead of CS0
-+ */
-+ hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
-+
-+ hw->irq = irq;
-+ hw->chipset = ide_generic;
-+ hw->ack_intr = NULL;
-+}
-+
-+static int __devinit magicbox_ide_of_probe(struct of_device *op,
-+ const struct of_device_id *match)
-+{
-+ hw_regs_t hw;
-+ hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
-+ struct ide_host *host;
-+ u16 __iomem *base;
-+ u16 __iomem *ctrl;
-+ int irq;
-+ int ret = 0;
-+
-+ irq = irq_of_parse_and_map(op->node, 0);
-+ if (irq < 0) {
-+ dev_err(&op->dev, "invalid irq\n");
-+ ret = -EINVAL;
-+ goto err_exit;
-+ }
-+
-+ base = of_iomap(op->node, 0);
-+ if (base == NULL) {
-+ ret = -ENOMEM;
-+ goto err_exit;
-+ }
-+
-+ ctrl = of_iomap(op->node, 1);
-+ if (ctrl == NULL) {
-+ ret = -ENOMEM;
-+ goto err_unmap_base;
-+ }
-+
-+ magicbox_ide_setup_hw(&hw, base, ctrl, irq);
-+
-+ hw.dev = &op->dev;
-+
-+ ret = ide_host_add(&magicbox_ide_port_info, hws, &host);
-+ if (ret)
-+ goto err_unmap_ctrl;
-+
-+ dev_set_drvdata(&op->dev, host);
-+
-+ return 0;
-+
-+ err_unmap_ctrl:
-+ iounmap(ctrl);
-+ err_unmap_base:
-+ iounmap(base);
-+ err_exit:
-+ return ret;
-+}
-+
-+static struct of_device_id magicbox_ide_of_match[] = {
-+ { .compatible = "magicbox-cf", },
-+ {},
-+};
-+
-+static struct of_platform_driver magicbox_ide_of_platform_driver = {
-+ .owner = THIS_MODULE,
-+ .name = DRV_NAME,
-+ .match_table = magicbox_ide_of_match,
-+ .probe = magicbox_ide_of_probe,
-+ .driver = {
-+ .name = DRV_NAME,
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init magicbox_ide_init(void)
-+{
-+ return of_register_platform_driver(&magicbox_ide_of_platform_driver);
-+}
-+
-+module_init(magicbox_ide_init);
-+
-+MODULE_DESCRIPTION(DRV_DESC);
-+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
-+MODULE_LICENSE("GPL v2");
-+MODULE_DEVICE_TABLE(of, magicbox_ide_of_match);
+++ /dev/null
---- a/drivers/ata/Kconfig
-+++ b/drivers/ata/Kconfig
-@@ -697,6 +697,16 @@ config PATA_IXP4XX_CF
-
- If unsure, say N.
-
-+config PATA_MAGICBOX_CF
-+ tristate "Magicbox/OpenRB Compact lash support"
-+ depends on MAGICBOXV2 || OPENRB_LIGHT
-+ help
-+ This option enables supoort for a Compatc Flash connected on
-+ the ppc405ep expansion bus. This driver had been written for
-+ the Magicbox v2 and OpenRB boards.
-+
-+ If unsure, say N.
-+
- config PATA_SCC
- tristate "Toshiba's Cell Reference Set IDE support"
- depends on PCI && PPC_CELLEB
---- a/drivers/ata/Makefile
-+++ b/drivers/ata/Makefile
-@@ -48,6 +48,7 @@ obj-$(CONFIG_PATA_OPTI) += pata_opti.o
- obj-$(CONFIG_PATA_OPTIDMA) += pata_optidma.o
- obj-$(CONFIG_PATA_MPC52xx) += pata_mpc52xx.o
- obj-$(CONFIG_PATA_MARVELL) += pata_marvell.o
-+obj-$(CONFIG_PATA_MAGICBOX_CF) += pata_magicbox_cf.o
- obj-$(CONFIG_PATA_MPIIX) += pata_mpiix.o
- obj-$(CONFIG_PATA_OLDPIIX) += pata_oldpiix.o
- obj-$(CONFIG_PATA_PCMCIA) += pata_pcmcia.o
---- /dev/null
-+++ b/drivers/ata/pata_magicbox_cf.c
-@@ -0,0 +1,406 @@
-+/*
-+ * PATA/CompactFlash driver for the MagicBox v2/OpenRB boards.
-+ *
-+ * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * Based on the IDE driver by Wojtek Kaniewski <wojtekka@toxygen.net>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/ioport.h>
-+#include <linux/libata.h>
-+#include <linux/irq.h>
-+#include <linux/of.h>
-+#include <linux/of_device.h>
-+#include <linux/of_platform.h>
-+#include <scsi/scsi_host.h>
-+
-+#define DRV_DESC "PATA/CompactFlash driver for Magicbox/OpenRB boards"
-+#define DRV_NAME "pata_magicbox_cf"
-+#define DRV_VERSION "0.1.0"
-+
-+#define MAGICBOX_CF_REG_CMD (2 * ATA_REG_CMD)
-+#define MAGICBOX_CF_REG_DATA (2 * ATA_REG_DATA)
-+#define MAGICBOX_CF_REG_ERR (2 * ATA_REG_ERR)
-+#define MAGICBOX_CF_REG_FEATURE (2 * ATA_REG_FEATURE)
-+#define MAGICBOX_CF_REG_NSECT (2 * ATA_REG_NSECT)
-+#define MAGICBOX_CF_REG_LBAL (2 * ATA_REG_LBAL)
-+#define MAGICBOX_CF_REG_LBAM (2 * ATA_REG_LBAM)
-+#define MAGICBOX_CF_REG_LBAH (2 * ATA_REG_LBAH)
-+#define MAGICBOX_CF_REG_DEVICE (2 * ATA_REG_DEVICE)
-+#define MAGICBOX_CF_REG_STATUS (2 * ATA_REG_STATUS)
-+#define MAGICBOX_CF_REG_ALTSTATUS (2 * 6)
-+#define MAGICBOX_CF_REG_CTL (2 * 6)
-+
-+#define MAGICBOX_CF_MAXPORTS 1
-+
-+struct magicbox_cf_info {
-+ void __iomem *base;
-+ void __iomem *ctrl;
-+};
-+
-+static inline u8 magicbox_cf_inb(void __iomem *port)
-+{
-+ return (u8) (readw(port) >> 8) & 0xff;
-+}
-+
-+static inline void magicbox_cf_outb(void __iomem *port, u8 value)
-+{
-+ writew(value << 8, port);
-+}
-+
-+static int magicbox_cf_set_mode(struct ata_link *link,
-+ struct ata_device **error)
-+{
-+ struct ata_device *dev;
-+
-+ ata_link_for_each_dev(dev, link) {
-+ if (ata_dev_enabled(dev)) {
-+ ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
-+ dev->pio_mode = XFER_PIO_0;
-+ dev->xfer_mode = XFER_PIO_0;
-+ dev->xfer_shift = ATA_SHIFT_PIO;
-+ dev->flags |= ATA_DFLAG_PIO;
-+ }
-+ }
-+
-+ return 0;
-+}
-+
-+static void magicbox_cf_exec_command(struct ata_port *ap,
-+ const struct ata_taskfile *tf)
-+{
-+ DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
-+
-+ magicbox_cf_outb(ap->ioaddr.command_addr, tf->command);
-+ ata_sff_pause(ap);
-+}
-+
-+static u8 magicbox_cf_check_status(struct ata_port *ap)
-+{
-+ u8 status;
-+
-+ status = magicbox_cf_inb(ap->ioaddr.status_addr);
-+
-+ DPRINTK("ata%u: status 0x%X, from %p\n", ap->print_id, status,
-+ ap->ioaddr.status_addr);
-+
-+ return status;
-+}
-+
-+static u8 magicbox_cf_check_altstatus(struct ata_port *ap)
-+{
-+ u8 altstatus;
-+
-+ altstatus = magicbox_cf_inb(ap->ioaddr.altstatus_addr);
-+
-+ DPRINTK("ata%u: altstatus 0x%X, from %p\n", ap->print_id,
-+ altstatus, ap->ioaddr.altstatus_addr);
-+
-+ return altstatus;
-+}
-+
-+static void magicbox_cf_dev_select(struct ata_port *ap, unsigned int device)
-+{
-+ /* Nothing to do. We are supporting one device only. */
-+}
-+
-+static void magicbox_cf_tf_load(struct ata_port *ap,
-+ const struct ata_taskfile *tf)
-+{
-+ struct ata_ioports *ioaddr = &ap->ioaddr;
-+ unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
-+
-+ if (tf->ctl != ap->last_ctl) {
-+ magicbox_cf_outb(ioaddr->ctl_addr, tf->ctl);
-+ ap->last_ctl = tf->ctl;
-+ ata_wait_idle(ap);
-+ }
-+
-+ if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
-+ magicbox_cf_outb(ioaddr->feature_addr, tf->hob_feature);
-+ magicbox_cf_outb(ioaddr->nsect_addr, tf->hob_nsect);
-+ magicbox_cf_outb(ioaddr->lbal_addr, tf->hob_lbal);
-+ magicbox_cf_outb(ioaddr->lbam_addr, tf->hob_lbam);
-+ magicbox_cf_outb(ioaddr->lbah_addr, tf->hob_lbah);
-+ VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
-+ tf->hob_feature,
-+ tf->hob_nsect,
-+ tf->hob_lbal,
-+ tf->hob_lbam,
-+ tf->hob_lbah);
-+ }
-+
-+ if (is_addr) {
-+ magicbox_cf_outb(ioaddr->feature_addr, tf->feature);
-+ magicbox_cf_outb(ioaddr->nsect_addr, tf->nsect);
-+ magicbox_cf_outb(ioaddr->lbal_addr, tf->lbal);
-+ magicbox_cf_outb(ioaddr->lbam_addr, tf->lbam);
-+ magicbox_cf_outb(ioaddr->lbah_addr, tf->lbah);
-+ VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
-+ tf->feature,
-+ tf->nsect,
-+ tf->lbal,
-+ tf->lbam,
-+ tf->lbah);
-+ }
-+
-+ if (tf->flags & ATA_TFLAG_DEVICE) {
-+ magicbox_cf_outb(ioaddr->device_addr, tf->device);
-+ VPRINTK("device 0x%X\n", tf->device);
-+ }
-+
-+ ata_wait_idle(ap);
-+}
-+
-+static void magicbox_cf_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
-+{
-+ struct ata_ioports *ioaddr = &ap->ioaddr;
-+
-+ tf->command = magicbox_cf_inb(ap->ioaddr.status_addr);
-+ tf->feature = magicbox_cf_inb(ioaddr->error_addr);
-+ tf->nsect = magicbox_cf_inb(ioaddr->nsect_addr);
-+ tf->lbal = magicbox_cf_inb(ioaddr->lbal_addr);
-+ tf->lbam = magicbox_cf_inb(ioaddr->lbam_addr);
-+ tf->lbah = magicbox_cf_inb(ioaddr->lbah_addr);
-+ tf->device = magicbox_cf_inb(ioaddr->device_addr);
-+ VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
-+ tf->feature,
-+ tf->nsect,
-+ tf->lbal,
-+ tf->lbam,
-+ tf->lbah);
-+
-+ if (tf->flags & ATA_TFLAG_LBA48) {
-+ magicbox_cf_outb(ioaddr->ctl_addr, tf->ctl | ATA_HOB);
-+ tf->hob_feature = magicbox_cf_inb(ioaddr->error_addr);
-+ tf->hob_nsect = magicbox_cf_inb(ioaddr->nsect_addr);
-+ tf->hob_lbal = magicbox_cf_inb(ioaddr->lbal_addr);
-+ tf->hob_lbam = magicbox_cf_inb(ioaddr->lbam_addr);
-+ tf->hob_lbah = magicbox_cf_inb(ioaddr->lbah_addr);
-+ magicbox_cf_outb(ioaddr->ctl_addr, tf->ctl);
-+ ap->last_ctl = tf->ctl;
-+ VPRINTK("hob: feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
-+ tf->feature,
-+ tf->nsect,
-+ tf->lbal,
-+ tf->lbam,
-+ tf->lbah);
-+ }
-+}
-+
-+static unsigned int magicbox_cf_data_xfer(struct ata_device *dev,
-+ unsigned char *buf,
-+ unsigned int buflen, int rw)
-+{
-+ struct ata_port *ap = dev->link->ap;
-+ unsigned int words = buflen >> 1;
-+ unsigned int i;
-+ u16 *buf16 = (u16 *) buf;
-+ void __iomem *mmio = ap->ioaddr.data_addr;
-+
-+ /* Transfer multiple of 2 bytes */
-+ if (rw == READ)
-+ for (i = 0; i < words; i++)
-+ buf16[i] = readw(mmio);
-+ else
-+ for (i = 0; i < words; i++)
-+ writew(buf16[i], mmio);
-+
-+ /* Transfer trailing 1 byte, if any. */
-+ if (unlikely(buflen & 0x01)) {
-+ u16 align_buf[1] = { 0 };
-+ unsigned char *trailing_buf = buf + buflen - 1;
-+
-+ if (rw == READ) {
-+ align_buf[0] = readw(mmio);
-+ memcpy(trailing_buf, align_buf, 1);
-+ } else {
-+ memcpy(align_buf, trailing_buf, 1);
-+ writew(align_buf[0], mmio);
-+ }
-+ words++;
-+ }
-+
-+ return words << 1;
-+}
-+
-+static u8 magicbox_cf_irq_on(struct ata_port *ap)
-+{
-+ /* Nothing to do. */
-+ return 0;
-+}
-+
-+static void magicbox_cf_irq_clear(struct ata_port *ap)
-+{
-+ /* Nothing to do. */
-+}
-+
-+static struct ata_port_operations magicbox_cf_port_ops = {
-+ .inherits = &ata_sff_port_ops,
-+
-+ .cable_detect = ata_cable_40wire,
-+ .set_mode = magicbox_cf_set_mode,
-+
-+ .sff_exec_command = magicbox_cf_exec_command,
-+ .sff_check_status = magicbox_cf_check_status,
-+ .sff_check_altstatus = magicbox_cf_check_altstatus,
-+ .sff_dev_select = magicbox_cf_dev_select,
-+ .sff_tf_load = magicbox_cf_tf_load,
-+ .sff_tf_read = magicbox_cf_tf_read,
-+ .sff_data_xfer = magicbox_cf_data_xfer,
-+
-+ .sff_irq_on = magicbox_cf_irq_on,
-+ .sff_irq_clear = magicbox_cf_irq_clear,
-+
-+ .port_start = ATA_OP_NULL,
-+};
-+
-+static struct scsi_host_template magicbox_cf_sht = {
-+ ATA_PIO_SHT(DRV_NAME),
-+};
-+
-+static inline void magicbox_cf_setup_port(struct ata_host *host)
-+{
-+ struct magicbox_cf_info *info = host->private_data;
-+ struct ata_port *ap;
-+
-+ ap = host->ports[0];
-+
-+ ap->ops = &magicbox_cf_port_ops;
-+ ap->pio_mask = ATA_PIO4;
-+ ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY | ATA_FLAG_NO_ATAPI;
-+
-+ ap->ioaddr.cmd_addr = info->base + MAGICBOX_CF_REG_CMD;
-+ ap->ioaddr.data_addr = info->base + MAGICBOX_CF_REG_DATA;
-+ ap->ioaddr.error_addr = info->base + MAGICBOX_CF_REG_ERR;
-+ ap->ioaddr.feature_addr = info->base + MAGICBOX_CF_REG_FEATURE;
-+ ap->ioaddr.nsect_addr = info->base + MAGICBOX_CF_REG_NSECT;
-+ ap->ioaddr.lbal_addr = info->base + MAGICBOX_CF_REG_LBAL;
-+ ap->ioaddr.lbam_addr = info->base + MAGICBOX_CF_REG_LBAM;
-+ ap->ioaddr.lbah_addr = info->base + MAGICBOX_CF_REG_LBAH;
-+ ap->ioaddr.device_addr = info->base + MAGICBOX_CF_REG_DEVICE;
-+ ap->ioaddr.status_addr = info->base + MAGICBOX_CF_REG_STATUS;
-+ ap->ioaddr.command_addr = info->base + MAGICBOX_CF_REG_CMD;
-+
-+ ap->ioaddr.altstatus_addr = info->ctrl + MAGICBOX_CF_REG_ALTSTATUS;
-+ ap->ioaddr.ctl_addr = info->ctrl + MAGICBOX_CF_REG_CTL;
-+
-+ ata_port_desc(ap, "cmd 0x%p ctl 0x%p", ap->ioaddr.cmd_addr,
-+ ap->ioaddr.ctl_addr);
-+}
-+
-+static int __devinit magicbox_cf_of_probe(struct of_device *op,
-+ const struct of_device_id *match)
-+{
-+ struct magicbox_cf_info *info;
-+ struct ata_host *host;
-+ int irq;
-+ int ret = 0;
-+
-+ info = kzalloc(sizeof(struct magicbox_cf_info), GFP_KERNEL);
-+ if (info == NULL) {
-+ ret = -ENOMEM;
-+ goto err_exit;
-+ }
-+
-+ irq = irq_of_parse_and_map(op->node, 0);
-+ if (irq < 0) {
-+ dev_err(&op->dev, "invalid irq\n");
-+ ret = -EINVAL;
-+ goto err_free_info;
-+ }
-+
-+ info->base = of_iomap(op->node, 0);
-+ if (info->base == NULL) {
-+ ret = -ENOMEM;
-+ goto err_free_info;
-+ }
-+
-+ info->ctrl = of_iomap(op->node, 1);
-+ if (info->ctrl == NULL) {
-+ ret = -ENOMEM;
-+ goto err_unmap_base;
-+ }
-+
-+ host = ata_host_alloc(&op->dev, MAGICBOX_CF_MAXPORTS);
-+ if (host == NULL) {
-+ ret = -ENOMEM;
-+ goto err_unmap_ctrl;
-+ }
-+
-+ host->private_data = info;
-+ magicbox_cf_setup_port(host);
-+
-+ ret = ata_host_activate(host, irq, ata_sff_interrupt,
-+ IRQF_TRIGGER_RISING, &magicbox_cf_sht);
-+ if (ret)
-+ goto err_unmap_ctrl;
-+
-+ dev_set_drvdata(&op->dev, host);
-+ return 0;
-+
-+ err_unmap_ctrl:
-+ iounmap(info->ctrl);
-+ err_unmap_base:
-+ iounmap(info->base);
-+ err_free_info:
-+ kfree(info);
-+ err_exit:
-+ return ret;
-+}
-+
-+static __devexit int magicbox_cf_of_remove(struct of_device *op)
-+{
-+ struct ata_host *host = dev_get_drvdata(&op->dev);
-+ struct magicbox_cf_info *info = host->private_data;
-+
-+ ata_host_detach(host);
-+ iounmap(info->ctrl);
-+ iounmap(info->base);
-+ kfree(info);
-+
-+ return 0;
-+}
-+
-+static struct of_device_id magicbox_cf_of_match[] = {
-+ { .compatible = "pata-magicbox-cf", },
-+ {},
-+};
-+
-+static struct of_platform_driver magicbox_cf_of_platform_driver = {
-+ .owner = THIS_MODULE,
-+ .name = DRV_NAME,
-+ .match_table = magicbox_cf_of_match,
-+ .probe = magicbox_cf_of_probe,
-+ .remove = __devexit_p(magicbox_cf_of_remove),
-+ .driver = {
-+ .name = DRV_NAME,
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init magicbox_cf_init(void)
-+{
-+ return of_register_platform_driver(&magicbox_cf_of_platform_driver);
-+}
-+
-+static void __exit magicbox_cf_exit(void)
-+{
-+ of_unregister_platform_driver(&magicbox_cf_of_platform_driver);
-+}
-+
-+module_init(magicbox_cf_init);
-+module_exit(magicbox_cf_exit);
-+
-+MODULE_DESCRIPTION(DRV_DESC);
-+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
-+MODULE_LICENSE("GPL v2");
-+MODULE_VERSION(DRV_VERSION);
-+MODULE_DEVICE_TABLE(of, magicbox_cf_of_match);
projects / openwrt / staging / ansuel.git / commitdiff