net/mlx5: Fix offset of tisc bits reserved field

First reserved field is off by one instead of reserved_at_1 it should be
reserved_at_2, fix that.

Fixes: a12ff35e0fb7 ("net/mlx5: Introduce TLS TX offload hardware bits and structures")
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Reviewed-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 196987f14a3ff1da2c3b9a09ff7a4bf6e5b18b75..9265c84ad353146e159ef4111abc06b93623a601 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -2782,7 +2782,7 @@ struct mlx5_ifc_traffic_counter_bits {
 struct mlx5_ifc_tisc_bits {
        u8         strict_lag_tx_port_affinity[0x1];
        u8         tls_en[0x1];
-       u8         reserved_at_1[0x2];
+       u8         reserved_at_2[0x2];
        u8         lag_tx_port_affinity[0x04];
 
        u8         reserved_at_8[0x4];