+++ /dev/null
-CONFIG_ARCH_BINFMT_ELF_STATE=y
-CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_BCM6345_EXT_IRQ=y
-CONFIG_BCM6345_PERIPH_IRQ=y
-CONFIG_BCM63XX=y
-CONFIG_BCM63XX_CPU_3368=y
-CONFIG_BCM63XX_CPU_6318=y
-CONFIG_BCM63XX_CPU_63268=y
-CONFIG_BCM63XX_CPU_6328=y
-CONFIG_BCM63XX_CPU_6338=y
-CONFIG_BCM63XX_CPU_6345=y
-CONFIG_BCM63XX_CPU_6348=y
-CONFIG_BCM63XX_CPU_6358=y
-CONFIG_BCM63XX_CPU_6362=y
-CONFIG_BCM63XX_CPU_6368=y
-CONFIG_BCM63XX_EHCI=y
-CONFIG_BCM63XX_ENET=y
-CONFIG_BCM63XX_OHCI=y
-CONFIG_BCM63XX_PHY=y
-CONFIG_BCM63XX_WDT=y
-CONFIG_BCMA=y
-CONFIG_BCMA_BLOCKIO=y
-# CONFIG_BCMA_DEBUG is not set
-# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
-# CONFIG_BCMA_DRIVER_MIPS is not set
-CONFIG_BCMA_DRIVER_PCI=y
-# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set
-CONFIG_BCMA_HOST_PCI=y
-CONFIG_BCMA_HOST_PCI_POSSIBLE=y
-# CONFIG_BCMA_HOST_SOC is not set
-CONFIG_BCM_NET_PHYLIB=y
-CONFIG_BOARD_BCM63XX_DT=y
-CONFIG_BOARD_BCM963XX=y
-CONFIG_BOARD_LIVEBOX=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_CEVT_R4K=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_BMIPS=y
-CONFIG_CPU_BMIPS32_3300=y
-CONFIG_CPU_BMIPS4350=y
-CONFIG_CPU_GENERIC_DUMP_TLB=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
-CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_CSRC_R4K=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DTC=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_FIRMWARE_IN_KERNEL=y
-CONFIG_GENERIC_ATOMIC64=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_BCM63XX=y
-CONFIG_GPIO_DEVRES=y
-CONFIG_GPIO_GENERIC=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_BPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_BCM63XX=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-CONFIG_HZ_PERIODIC=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_MIPS_CPU=y
-CONFIG_IRQ_WORK=y
-CONFIG_KEXEC=y
-CONFIG_KEXEC_CORE=y
-CONFIG_LEDS_BCM6328=y
-CONFIG_LEDS_BCM6358=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LIBFDT=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MIPS=y
-CONFIG_MIPS_CLOCK_VSYSCALL=y
-# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
-# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
-CONFIG_MIPS_CMDLINE_FROM_DTB=y
-# CONFIG_MIPS_ELF_APPENDED_DTB is not set
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=4
-CONFIG_MIPS_L1_CACHE_SHIFT_4=y
-# CONFIG_MIPS_MACHINE is not set
-# CONFIG_MIPS_NO_APPENDED_DTB is not set
-CONFIG_MIPS_RAW_APPENDED_DTB=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MTD_BCM63XX_PARTS=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-# CONFIG_MTD_CFI_NOSWAP is not set
-CONFIG_MTD_CFI_STAA=y
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_MTD=y
-CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
-CONFIG_PCI=y
-# CONFIG_PCIEAER is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_BCM6318=y
-CONFIG_PINCTRL_BCM63268=y
-CONFIG_PINCTRL_BCM6328=y
-CONFIG_PINCTRL_BCM6348=y
-CONFIG_PINCTRL_BCM6358=y
-CONFIG_PINCTRL_BCM6362=y
-CONFIG_PINCTRL_BCM6368=y
-CONFIG_PINCTRL_BCM63XX=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
-# CONFIG_RCU_STALL_COMMON is not set
-CONFIG_REGMAP=y
-CONFIG_REGMAP_MMIO=y
-CONFIG_RELAY=y
-CONFIG_RTL8366_SMI=y
-CONFIG_RTL8367_PHY=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_BCM63XX=y
-CONFIG_SERIAL_BCM63XX_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_SPI_BCM63XX=y
-CONFIG_SPI_BCM63XX_HSSPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SQUASHFS_EMBEDDED=y
-CONFIG_SRCU=y
-CONFIG_SSB=y
-CONFIG_SSB_B43_PCI_BRIDGE=y
-CONFIG_SSB_BLOCKIO=y
-# CONFIG_SSB_DRIVER_MIPS is not set
-CONFIG_SSB_DRIVER_PCICORE=y
-CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
-CONFIG_SSB_PCIHOST=y
-CONFIG_SSB_PCIHOST_POSSIBLE=y
-CONFIG_SSB_SPROM=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_B53=y
-CONFIG_SWCONFIG_B53_MMAP_DRIVER=y
-CONFIG_SWCONFIG_B53_PHY_DRIVER=y
-CONFIG_SWCONFIG_B53_PHY_FIXUP=y
-CONFIG_SWCONFIG_B53_SPI_DRIVER=y
-# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
-CONFIG_SYNC_R4K=y
-CONFIG_SYSCTL_EXCEPTION_TRACE=y
-CONFIG_SYS_HAS_CPU_BMIPS=y
-CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
-CONFIG_SYS_HAS_CPU_BMIPS4350=y
-CONFIG_SYS_HAS_EARLY_PRINTK=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
-CONFIG_SYS_SUPPORTS_SMP=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USE_OF=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_WEAK_ORDERING=y
-CONFIG_ZONE_DMA_FLAG=0
+++ /dev/null
-From 28b8b26b308e656edfa9467867d5f79212da2ec3 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:20 -0700
-Subject: [PATCH 01/11] mtd: add get/set of_node/flash_node helpers
-
-We are going to begin using the mtd->dev.of_node field for MTD device
-nodes, so let's add helpers for it. Also, we'll be making some
-conversions on spi_nor (and nand_chip eventually) too, so get that ready
-with their own helpers.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- include/linux/mtd/mtd.h | 11 +++++++++++
- include/linux/mtd/nand.h | 11 +++++++++++
- include/linux/mtd/spi-nor.h | 11 +++++++++++
- 3 files changed, 33 insertions(+)
-
---- a/include/linux/mtd/mtd.h
-+++ b/include/linux/mtd/mtd.h
-@@ -258,6 +258,17 @@ struct mtd_info {
- int usecount;
- };
-
-+static inline void mtd_set_of_node(struct mtd_info *mtd,
-+ struct device_node *np)
-+{
-+ mtd->dev.of_node = np;
-+}
-+
-+static inline struct device_node *mtd_get_of_node(struct mtd_info *mtd)
-+{
-+ return mtd->dev.of_node;
-+}
-+
- int mtd_erase(struct mtd_info *mtd, struct erase_info *instr);
- int mtd_point(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,
- void **virt, resource_size_t *phys);
---- a/include/linux/mtd/nand.h
-+++ b/include/linux/mtd/nand.h
-@@ -719,6 +719,17 @@ struct nand_chip {
- void *priv;
- };
-
-+static inline void nand_set_flash_node(struct nand_chip *chip,
-+ struct device_node *np)
-+{
-+ chip->flash_node = np;
-+}
-+
-+static inline struct device_node *nand_get_flash_node(struct nand_chip *chip)
-+{
-+ return chip->flash_node;
-+}
-+
- /*
- * NAND Flash Manufacturer ID Codes
- */
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -184,6 +184,17 @@ struct spi_nor {
- void *priv;
- };
-
-+static inline void spi_nor_set_flash_node(struct spi_nor *nor,
-+ struct device_node *np)
-+{
-+ nor->flash_node = np;
-+}
-+
-+static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
-+{
-+ return nor->flash_node;
-+}
-+
- /**
- * spi_nor_scan() - scan the SPI NOR
- * @nor: the spi_nor structure
+++ /dev/null
-From 3b6521eab0386a4854d47b1a01947d7dc46ec98d Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:21 -0700
-Subject: [PATCH] mtd: ofpart: grab device tree node directly from master
- device node
-
-It seems more logical to use a device node directly associated with the
-MTD master device (i.e., mtd->dev.of_node field) rather than requiring
-auxiliary partition parser information to be passed in by the driver in
-a separate struct.
-
-This patch supports the mtd->dev.of_node field and deprecates the parser
-data 'of_node' field
-
-Driver conversions may now follow.
-
-Additional side benefit to assigning mtd->dev.of_node rather than using
-parser data: the driver core will automatically create a device -> node
-symlink for us.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/ofpart.c | 18 ++++++++++--------
- include/linux/mtd/partitions.h | 4 +++-
- 2 files changed, 13 insertions(+), 9 deletions(-)
-
---- a/drivers/mtd/ofpart.c
-+++ b/drivers/mtd/ofpart.c
-@@ -37,10 +37,11 @@ static int parse_ofpart_partitions(struc
- bool dedicated = true;
-
-
-- if (!data)
-- return 0;
--
-- mtd_node = data->of_node;
-+ /*
-+ * of_node can be provided through auxiliary parser data or (preferred)
-+ * by assigning the master device node
-+ */
-+ mtd_node = data && data->of_node ? data->of_node : mtd_get_of_node(master);
- if (!mtd_node)
- return 0;
-
-@@ -157,10 +158,11 @@ static int parse_ofoldpart_partitions(st
- } *part;
- const char *names;
-
-- if (!data)
-- return 0;
--
-- dp = data->of_node;
-+ /*
-+ * of_node can be provided through auxiliary parser data or (preferred)
-+ * by assigning the master device node
-+ */
-+ dp = data && data->of_node ? data->of_node : mtd_get_of_node(master);
- if (!dp)
- return 0;
-
---- a/include/linux/mtd/partitions.h
-+++ b/include/linux/mtd/partitions.h
-@@ -56,7 +56,9 @@ struct device_node;
- /**
- * struct mtd_part_parser_data - used to pass data to MTD partition parsers.
- * @origin: for RedBoot, start address of MTD device
-- * @of_node: for OF parsers, device node containing partitioning information
-+ * @of_node: for OF parsers, device node containing partitioning information.
-+ * This field is deprecated, as the device node should simply be
-+ * assigned to the master struct device.
- */
- struct mtd_part_parser_data {
- unsigned long origin;
+++ /dev/null
-From 3e63b26bdd4069c3df2cd7ce7217a21d06801b41 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:22 -0700
-Subject: [PATCH 03/11] mtd: {nand,spi-nor}: assign MTD of_node
-
-We should pass along our flash DT node to the MTD layer, so it can set
-up ofpart for us.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/nand/nand_base.c | 3 +++
- drivers/mtd/spi-nor/spi-nor.c | 1 +
- 2 files changed, 4 insertions(+)
-
---- a/drivers/mtd/nand/nand_base.c
-+++ b/drivers/mtd/nand/nand_base.c
-@@ -3995,6 +3995,9 @@ int nand_scan_ident(struct mtd_info *mtd
- int ret;
-
- if (chip->flash_node) {
-+ /* MTD can automatically handle DT partitions, etc. */
-+ mtd_set_of_node(mtd, chip->flash_node);
-+
- ret = nand_dt_init(mtd, chip, chip->flash_node);
- if (ret)
- return ret;
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1228,6 +1228,7 @@ int spi_nor_scan(struct spi_nor *nor, co
- mtd->flags |= MTD_NO_ERASE;
-
- mtd->dev.parent = dev;
-+ mtd_set_of_node(mtd, np);
- nor->page_size = info->page_size;
- mtd->writebufsize = nor->page_size;
-
+++ /dev/null
-From 6375219951a66047805ed977b674615d152001ee Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:23 -0700
-Subject: [PATCH 04/11] mtd: nand: convert to nand_set_flash_node()
-
-Used semantic patch with 'make coccicheck MODE=patch COCCI=script.cocci':
-
----8<----
-virtual patch
-
-@@
-struct nand_chip *c;
-struct device_node *d;
-@@
--(c)->flash_node = (d)
-+nand_set_flash_node(c, d)
----8<----
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Marek Vasut <marex@denx.de>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/nand/brcmnand/brcmnand.c | 2 +-
- drivers/mtd/nand/fsmc_nand.c | 2 +-
- drivers/mtd/nand/sunxi_nand.c | 2 +-
- drivers/mtd/nand/vf610_nfc.c | 2 +-
- 4 files changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/nand/brcmnand/brcmnand.c
-+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
-@@ -1950,7 +1950,7 @@ static int brcmnand_init_cs(struct brcmn
- mtd = &host->mtd;
- chip = &host->chip;
-
-- chip->flash_node = dn;
-+ nand_set_flash_node(chip, dn);
- chip->priv = host;
- mtd->priv = chip;
- mtd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "brcmnand.%d",
---- a/drivers/mtd/nand/fsmc_nand.c
-+++ b/drivers/mtd/nand/fsmc_nand.c
-@@ -1033,7 +1033,7 @@ static int __init fsmc_nand_probe(struct
- nand->options = pdata->options;
- nand->select_chip = fsmc_select_chip;
- nand->badblockbits = 7;
-- nand->flash_node = np;
-+ nand_set_flash_node(nand, np);
-
- if (pdata->width == FSMC_NAND_BW16)
- nand->options |= NAND_BUSWIDTH_16;
---- a/drivers/mtd/nand/sunxi_nand.c
-+++ b/drivers/mtd/nand/sunxi_nand.c
-@@ -1336,7 +1336,7 @@ static int sunxi_nand_chip_init(struct d
- * in the DT.
- */
- nand->ecc.mode = NAND_ECC_HW;
-- nand->flash_node = np;
-+ nand_set_flash_node(nand, np);
- nand->select_chip = sunxi_nfc_select_chip;
- nand->cmd_ctrl = sunxi_nfc_cmd_ctrl;
- nand->read_buf = sunxi_nfc_read_buf;
---- a/drivers/mtd/nand/vf610_nfc.c
-+++ b/drivers/mtd/nand/vf610_nfc.c
-@@ -714,7 +714,7 @@ static int vf610_nfc_probe(struct platfo
- goto error;
- }
-
-- chip->flash_node = child;
-+ nand_set_flash_node(chip, child);
- }
- }
-
+++ /dev/null
-From 9c7d787508be6d68a6ec66de3c3466b24e820c71 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:24 -0700
-Subject: [PATCH] mtd: spi-nor: convert to spi_nor_{get, set}_flash_node()
-
-Used semantic patch with 'make coccicheck MODE=patch COCCI=script.cocci':
-
----8<----
-virtual patch
-
-@@
-struct spi_nor b;
-struct spi_nor *c;
-expression d;
-@@
-(
--(b).flash_node = (d)
-+spi_nor_set_flash_node(&b, d)
-|
--(c)->flash_node = (d)
-+spi_nor_set_flash_node(c, d)
-)
----8<----
-
-And a manual conversion for the one use of spi_nor_get_flash_node().
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/devices/m25p80.c | 2 +-
- drivers/mtd/spi-nor/fsl-quadspi.c | 2 +-
- drivers/mtd/spi-nor/nxp-spifi.c | 2 +-
- drivers/mtd/spi-nor/spi-nor.c | 2 +-
- 4 files changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -221,7 +221,7 @@ static int m25p_probe(struct spi_device
- nor->read_reg = m25p80_read_reg;
-
- nor->dev = &spi->dev;
-- nor->flash_node = spi->dev.of_node;
-+ spi_nor_set_flash_node(nor, spi->dev.of_node);
- nor->priv = flash;
-
- spi_set_drvdata(spi, flash);
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -1013,7 +1013,7 @@ static int fsl_qspi_probe(struct platfor
- mtd = &nor->mtd;
-
- nor->dev = dev;
-- nor->flash_node = np;
-+ spi_nor_set_flash_node(nor, np);
- nor->priv = q;
-
- /* fill the hooks */
---- a/drivers/mtd/spi-nor/nxp-spifi.c
-+++ b/drivers/mtd/spi-nor/nxp-spifi.c
-@@ -330,7 +330,7 @@ static int nxp_spifi_setup_flash(struct
- writel(ctrl, spifi->io_base + SPIFI_CTRL);
-
- spifi->nor.dev = spifi->dev;
-- spifi->nor.flash_node = np;
-+ spi_nor_set_flash_node(&spifi->nor, np);
- spifi->nor.priv = spifi;
- spifi->nor.read = nxp_spifi_read;
- spifi->nor.write = nxp_spifi_write;
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1120,7 +1120,7 @@ int spi_nor_scan(struct spi_nor *nor, co
- const struct flash_info *info = NULL;
- struct device *dev = nor->dev;
- struct mtd_info *mtd = &nor->mtd;
-- struct device_node *np = nor->flash_node;
-+ struct device_node *np = spi_nor_get_flash_node(nor);
- int ret;
- int i;
-
+++ /dev/null
-From a61ae81a1907af1987ad4c77300508327bc48b23 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:25 -0700
-Subject: [PATCH 06/11] mtd: nand: drop unnecessary partition parser data
-
-All of these drivers set up a parser data struct just to communicate DT
-partition data. This field has been deprecated and is instead supported
-by telling nand_scan_ident() about the 'flash_node'.
-
-This patch:
- * sets chip->flash_node for those drivers that didn't already (but used
- OF partitioning)
- * drops the parser data
- * switches to the simpler mtd_device_register() where possible, now
- that we've eliminated one of the auxiliary parameters
-
-Now that we've assigned chip->flash_node for these drivers, we can
-probably rely on nand_dt_init() to do more of the DT parsing for us, but
-for now, I don't want to fiddle with each of these drivers. The parsing
-is done in duplicate for now on some drivers. I don't think this should
-break things. (Famous last words.)
-
-(Rolled in some changes by Boris Brezillon)
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/nand/atmel_nand.c | 7 +++----
- drivers/mtd/nand/brcmnand/brcmnand.c | 3 +--
- drivers/mtd/nand/davinci_nand.c | 10 +++-------
- drivers/mtd/nand/fsl_elbc_nand.c | 5 ++---
- drivers/mtd/nand/fsl_ifc_nand.c | 5 ++---
- drivers/mtd/nand/fsl_upm.c | 5 ++---
- drivers/mtd/nand/fsmc_nand.c | 7 +++----
- drivers/mtd/nand/gpio.c | 8 +++-----
- drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 5 ++---
- drivers/mtd/nand/hisi504_nand.c | 5 ++---
- drivers/mtd/nand/lpc32xx_mlc.c | 7 +++----
- drivers/mtd/nand/lpc32xx_slc.c | 7 +++----
- drivers/mtd/nand/mpc5121_nfc.c | 5 ++---
- drivers/mtd/nand/mxc_nand.c | 5 ++---
- drivers/mtd/nand/ndfc.c | 5 ++---
- drivers/mtd/nand/omap2.c | 6 ++----
- drivers/mtd/nand/orion_nand.c | 6 ++----
- drivers/mtd/nand/plat_nand.c | 5 ++---
- drivers/mtd/nand/pxa3xx_nand.c | 10 +++++-----
- drivers/mtd/nand/sh_flctl.c | 6 ++----
- drivers/mtd/nand/socrates_nand.c | 5 ++---
- drivers/mtd/nand/sunxi_nand.c | 4 +---
- drivers/mtd/nand/vf610_nfc.c | 6 +-----
- drivers/staging/mt29f_spinand/mt29f_spinand.c | 5 ++---
- 24 files changed, 54 insertions(+), 88 deletions(-)
-
---- a/drivers/mtd/nand/atmel_nand.c
-+++ b/drivers/mtd/nand/atmel_nand.c
-@@ -2093,7 +2093,6 @@ static int atmel_nand_probe(struct platf
- struct mtd_info *mtd;
- struct nand_chip *nand_chip;
- struct resource *mem;
-- struct mtd_part_parser_data ppdata = {};
- int res, irq;
-
- /* Allocate memory for the device structure (and zero it) */
-@@ -2117,6 +2116,7 @@ static int atmel_nand_probe(struct platf
- nand_chip = &host->nand_chip;
- host->dev = &pdev->dev;
- if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
-+ nand_set_flash_node(nand_chip, pdev->dev.of_node);
- /* Only when CONFIG_OF is enabled of_node can be parsed */
- res = atmel_of_init_port(host, pdev->dev.of_node);
- if (res)
-@@ -2259,9 +2259,8 @@ static int atmel_nand_probe(struct platf
- }
-
- mtd->name = "atmel_nand";
-- ppdata.of_node = pdev->dev.of_node;
-- res = mtd_device_parse_register(mtd, NULL, &ppdata,
-- host->board.parts, host->board.num_parts);
-+ res = mtd_device_register(mtd, host->board.parts,
-+ host->board.num_parts);
- if (!res)
- return res;
-
---- a/drivers/mtd/nand/brcmnand/brcmnand.c
-+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
-@@ -1939,7 +1939,6 @@ static int brcmnand_init_cs(struct brcmn
- struct nand_chip *chip;
- int ret;
- u16 cfg_offs;
-- struct mtd_part_parser_data ppdata = { .of_node = dn };
-
- ret = of_property_read_u32(dn, "reg", &host->cs);
- if (ret) {
-@@ -2018,7 +2017,7 @@ static int brcmnand_init_cs(struct brcmn
- if (nand_scan_tail(mtd))
- return -ENXIO;
-
-- return mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+ return mtd_device_register(mtd, NULL, 0);
- }
-
- static void brcmnand_save_restore_cs_config(struct brcmnand_host *host,
---- a/drivers/mtd/nand/davinci_nand.c
-+++ b/drivers/mtd/nand/davinci_nand.c
-@@ -687,6 +687,7 @@ static int nand_davinci_probe(struct pla
-
- info->mtd.priv = &info->chip;
- info->mtd.dev.parent = &pdev->dev;
-+ nand_set_flash_node(&info->chip, pdev->dev.of_node);
-
- info->chip.IO_ADDR_R = vaddr;
- info->chip.IO_ADDR_W = vaddr;
-@@ -842,13 +843,8 @@ syndrome_done:
- if (pdata->parts)
- ret = mtd_device_parse_register(&info->mtd, NULL, NULL,
- pdata->parts, pdata->nr_parts);
-- else {
-- struct mtd_part_parser_data ppdata;
--
-- ppdata.of_node = pdev->dev.of_node;
-- ret = mtd_device_parse_register(&info->mtd, NULL, &ppdata,
-- NULL, 0);
-- }
-+ else
-+ ret = mtd_device_register(&info->mtd, NULL, 0);
- if (ret < 0)
- goto err;
-
---- a/drivers/mtd/nand/fsl_elbc_nand.c
-+++ b/drivers/mtd/nand/fsl_elbc_nand.c
-@@ -748,6 +748,7 @@ static int fsl_elbc_chip_init(struct fsl
- /* Fill in fsl_elbc_mtd structure */
- priv->mtd.priv = chip;
- priv->mtd.dev.parent = priv->dev;
-+ nand_set_flash_node(chip, priv->dev->of_node);
-
- /* set timeout to maximum */
- priv->fmr = 15 << FMR_CWTO_SHIFT;
-@@ -823,9 +824,7 @@ static int fsl_elbc_nand_probe(struct pl
- int bank;
- struct device *dev;
- struct device_node *node = pdev->dev.of_node;
-- struct mtd_part_parser_data ppdata;
-
-- ppdata.of_node = pdev->dev.of_node;
- if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs)
- return -ENODEV;
- lbc = fsl_lbc_ctrl_dev->regs;
-@@ -911,7 +910,7 @@ static int fsl_elbc_nand_probe(struct pl
-
- /* First look for RedBoot table or partitions on the command
- * line, these take precedence over device tree information */
-- mtd_device_parse_register(&priv->mtd, part_probe_types, &ppdata,
-+ mtd_device_parse_register(&priv->mtd, part_probe_types, NULL,
- NULL, 0);
-
- printk(KERN_INFO "eLBC NAND device at 0x%llx, bank %d\n",
---- a/drivers/mtd/nand/fsl_ifc_nand.c
-+++ b/drivers/mtd/nand/fsl_ifc_nand.c
-@@ -883,6 +883,7 @@ static int fsl_ifc_chip_init(struct fsl_
- /* Fill in fsl_ifc_mtd structure */
- priv->mtd.priv = chip;
- priv->mtd.dev.parent = priv->dev;
-+ nand_set_flash_node(chip, priv->dev->of_node);
-
- /* fill in nand_chip structure */
- /* set up function call table */
-@@ -1030,9 +1031,7 @@ static int fsl_ifc_nand_probe(struct pla
- int ret;
- int bank;
- struct device_node *node = dev->dev.of_node;
-- struct mtd_part_parser_data ppdata;
-
-- ppdata.of_node = dev->dev.of_node;
- if (!fsl_ifc_ctrl_dev || !fsl_ifc_ctrl_dev->regs)
- return -ENODEV;
- ifc = fsl_ifc_ctrl_dev->regs;
-@@ -1128,7 +1127,7 @@ static int fsl_ifc_nand_probe(struct pla
-
- /* First look for RedBoot table or partitions on the command
- * line, these take precedence over device tree information */
-- mtd_device_parse_register(&priv->mtd, part_probe_types, &ppdata,
-+ mtd_device_parse_register(&priv->mtd, part_probe_types, NULL,
- NULL, 0);
-
- dev_info(priv->dev, "IFC NAND device at 0x%llx, bank %d\n",
---- a/drivers/mtd/nand/fsl_upm.c
-+++ b/drivers/mtd/nand/fsl_upm.c
-@@ -159,7 +159,6 @@ static int fun_chip_init(struct fsl_upm_
- {
- int ret;
- struct device_node *flash_np;
-- struct mtd_part_parser_data ppdata;
-
- fun->chip.IO_ADDR_R = fun->io_base;
- fun->chip.IO_ADDR_W = fun->io_base;
-@@ -182,6 +181,7 @@ static int fun_chip_init(struct fsl_upm_
- if (!flash_np)
- return -ENODEV;
-
-+ nand_set_flash_node(&fun->chip, flash_np);
- fun->mtd.name = kasprintf(GFP_KERNEL, "0x%llx.%s", (u64)io_res->start,
- flash_np->name);
- if (!fun->mtd.name) {
-@@ -193,8 +193,7 @@ static int fun_chip_init(struct fsl_upm_
- if (ret)
- goto err;
-
-- ppdata.of_node = flash_np;
-- ret = mtd_device_parse_register(&fun->mtd, NULL, &ppdata, NULL, 0);
-+ ret = mtd_device_register(&fun->mtd, NULL, 0);
- err:
- of_node_put(flash_np);
- if (ret)
---- a/drivers/mtd/nand/fsmc_nand.c
-+++ b/drivers/mtd/nand/fsmc_nand.c
-@@ -926,7 +926,6 @@ static int __init fsmc_nand_probe(struct
- {
- struct fsmc_nand_platform_data *pdata = dev_get_platdata(&pdev->dev);
- struct device_node __maybe_unused *np = pdev->dev.of_node;
-- struct mtd_part_parser_data ppdata = {};
- struct fsmc_nand_data *host;
- struct mtd_info *mtd;
- struct nand_chip *nand;
-@@ -1016,6 +1015,7 @@ static int __init fsmc_nand_probe(struct
- nand = &host->nand;
- mtd->priv = nand;
- nand->priv = host;
-+ nand_set_flash_node(nand, np);
-
- host->mtd.dev.parent = &pdev->dev;
- nand->IO_ADDR_R = host->data_va;
-@@ -1175,9 +1175,8 @@ static int __init fsmc_nand_probe(struct
- * Check for partition info passed
- */
- host->mtd.name = "nand";
-- ppdata.of_node = np;
-- ret = mtd_device_parse_register(&host->mtd, NULL, &ppdata,
-- host->partitions, host->nr_partitions);
-+ ret = mtd_device_register(&host->mtd, host->partitions,
-+ host->nr_partitions);
- if (ret)
- goto err_probe;
-
---- a/drivers/mtd/nand/gpio.c
-+++ b/drivers/mtd/nand/gpio.c
-@@ -209,7 +209,6 @@ static int gpio_nand_probe(struct platfo
- struct gpiomtd *gpiomtd;
- struct nand_chip *chip;
- struct resource *res;
-- struct mtd_part_parser_data ppdata = {};
- int ret = 0;
-
- if (!pdev->dev.of_node && !dev_get_platdata(&pdev->dev))
-@@ -268,6 +267,7 @@ static int gpio_nand_probe(struct platfo
- chip->dev_ready = gpio_nand_devready;
- }
-
-+ nand_set_flash_node(chip, pdev->dev.of_node);
- chip->IO_ADDR_W = chip->IO_ADDR_R;
- chip->ecc.mode = NAND_ECC_SOFT;
- chip->options = gpiomtd->plat.options;
-@@ -291,10 +291,8 @@ static int gpio_nand_probe(struct platfo
- gpiomtd->plat.adjust_parts(&gpiomtd->plat,
- gpiomtd->mtd_info.size);
-
-- ppdata.of_node = pdev->dev.of_node;
-- ret = mtd_device_parse_register(&gpiomtd->mtd_info, NULL, &ppdata,
-- gpiomtd->plat.parts,
-- gpiomtd->plat.num_parts);
-+ ret = mtd_device_register(&gpiomtd->mtd_info, gpiomtd->plat.parts,
-+ gpiomtd->plat.num_parts);
- if (!ret)
- return 0;
-
---- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
-+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
-@@ -1888,7 +1888,6 @@ static int gpmi_nand_init(struct gpmi_na
- {
- struct mtd_info *mtd = &this->mtd;
- struct nand_chip *chip = &this->nand;
-- struct mtd_part_parser_data ppdata = {};
- int ret;
-
- /* init current chip */
-@@ -1901,6 +1900,7 @@ static int gpmi_nand_init(struct gpmi_na
-
- /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
- chip->priv = this;
-+ nand_set_flash_node(chip, this->pdev->dev.of_node);
- chip->select_chip = gpmi_select_chip;
- chip->cmd_ctrl = gpmi_cmd_ctrl;
- chip->dev_ready = gpmi_dev_ready;
-@@ -1954,8 +1954,7 @@ static int gpmi_nand_init(struct gpmi_na
- if (ret)
- goto err_out;
-
-- ppdata.of_node = this->pdev->dev.of_node;
-- ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+ ret = mtd_device_register(mtd, NULL, 0);
- if (ret)
- goto err_out;
- return 0;
---- a/drivers/mtd/nand/hisi504_nand.c
-+++ b/drivers/mtd/nand/hisi504_nand.c
-@@ -704,7 +704,6 @@ static int hisi_nfc_probe(struct platfor
- struct mtd_info *mtd;
- struct resource *res;
- struct device_node *np = dev->of_node;
-- struct mtd_part_parser_data ppdata;
-
- host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
- if (!host)
-@@ -742,6 +741,7 @@ static int hisi_nfc_probe(struct platfor
- mtd->dev.parent = &pdev->dev;
-
- chip->priv = host;
-+ nand_set_flash_node(chip, np);
- chip->cmdfunc = hisi_nfc_cmdfunc;
- chip->select_chip = hisi_nfc_select_chip;
- chip->read_byte = hisi_nfc_read_byte;
-@@ -805,8 +805,7 @@ static int hisi_nfc_probe(struct platfor
- goto err_res;
- }
-
-- ppdata.of_node = np;
-- ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+ ret = mtd_device_register(mtd, NULL, 0);
- if (ret) {
- dev_err(dev, "Err MTD partition=%d\n", ret);
- goto err_mtd;
---- a/drivers/mtd/nand/lpc32xx_mlc.c
-+++ b/drivers/mtd/nand/lpc32xx_mlc.c
-@@ -647,7 +647,6 @@ static int lpc32xx_nand_probe(struct pla
- struct nand_chip *nand_chip;
- struct resource *rc;
- int res;
-- struct mtd_part_parser_data ppdata = {};
-
- /* Allocate memory for the device structure (and zero it) */
- host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
-@@ -682,6 +681,7 @@ static int lpc32xx_nand_probe(struct pla
- host->pdata = dev_get_platdata(&pdev->dev);
-
- nand_chip->priv = host; /* link the private data structures */
-+ nand_set_flash_node(nand_chip, pdev->dev.of_node);
- mtd->priv = nand_chip;
- mtd->dev.parent = &pdev->dev;
-
-@@ -786,9 +786,8 @@ static int lpc32xx_nand_probe(struct pla
-
- mtd->name = DRV_NAME;
-
-- ppdata.of_node = pdev->dev.of_node;
-- res = mtd_device_parse_register(mtd, NULL, &ppdata, host->ncfg->parts,
-- host->ncfg->num_parts);
-+ res = mtd_device_register(mtd, host->ncfg->parts,
-+ host->ncfg->num_parts);
- if (!res)
- return res;
-
---- a/drivers/mtd/nand/lpc32xx_slc.c
-+++ b/drivers/mtd/nand/lpc32xx_slc.c
-@@ -763,7 +763,6 @@ static int lpc32xx_nand_probe(struct pla
- struct mtd_info *mtd;
- struct nand_chip *chip;
- struct resource *rc;
-- struct mtd_part_parser_data ppdata = {};
- int res;
-
- rc = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-@@ -803,6 +802,7 @@ static int lpc32xx_nand_probe(struct pla
- mtd = &host->mtd;
- chip = &host->nand_chip;
- chip->priv = host;
-+ nand_set_flash_node(chip, pdev->dev.of_node);
- mtd->priv = chip;
- mtd->owner = THIS_MODULE;
- mtd->dev.parent = &pdev->dev;
-@@ -908,9 +908,8 @@ static int lpc32xx_nand_probe(struct pla
- }
-
- mtd->name = "nxp_lpc3220_slc";
-- ppdata.of_node = pdev->dev.of_node;
-- res = mtd_device_parse_register(mtd, NULL, &ppdata, host->ncfg->parts,
-- host->ncfg->num_parts);
-+ res = mtd_device_register(mtd, host->ncfg->parts,
-+ host->ncfg->num_parts);
- if (!res)
- return res;
-
---- a/drivers/mtd/nand/mpc5121_nfc.c
-+++ b/drivers/mtd/nand/mpc5121_nfc.c
-@@ -639,7 +639,6 @@ static int mpc5121_nfc_probe(struct plat
- int resettime = 0;
- int retval = 0;
- int rev, len;
-- struct mtd_part_parser_data ppdata;
-
- /*
- * Check SoC revision. This driver supports only NFC
-@@ -661,6 +660,7 @@ static int mpc5121_nfc_probe(struct plat
- mtd->priv = chip;
- mtd->dev.parent = dev;
- chip->priv = prv;
-+ nand_set_flash_node(chip, dn);
- prv->dev = dev;
-
- /* Read NFC configuration from Reset Config Word */
-@@ -703,7 +703,6 @@ static int mpc5121_nfc_probe(struct plat
- }
-
- mtd->name = "MPC5121 NAND";
-- ppdata.of_node = dn;
- chip->dev_ready = mpc5121_nfc_dev_ready;
- chip->cmdfunc = mpc5121_nfc_command;
- chip->read_byte = mpc5121_nfc_read_byte;
-@@ -815,7 +814,7 @@ static int mpc5121_nfc_probe(struct plat
- dev_set_drvdata(dev, mtd);
-
- /* Register device in MTD */
-- retval = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+ retval = mtd_device_register(mtd, NULL, 0);
- if (retval) {
- dev_err(dev, "Error adding MTD device!\n");
- goto error;
---- a/drivers/mtd/nand/mxc_nand.c
-+++ b/drivers/mtd/nand/mxc_nand.c
-@@ -1524,6 +1524,7 @@ static int mxcnd_probe(struct platform_d
- this->chip_delay = 5;
-
- this->priv = host;
-+ nand_set_flash_node(this, pdev->dev.of_node),
- this->dev_ready = mxc_nand_dev_ready;
- this->cmdfunc = mxc_nand_command;
- this->read_byte = mxc_nand_read_byte;
-@@ -1683,9 +1684,7 @@ static int mxcnd_probe(struct platform_d
-
- /* Register the partitions */
- mtd_device_parse_register(mtd, part_probes,
-- &(struct mtd_part_parser_data){
-- .of_node = pdev->dev.of_node,
-- },
-+ NULL,
- host->pdata.parts,
- host->pdata.nr_parts);
-
---- a/drivers/mtd/nand/ndfc.c
-+++ b/drivers/mtd/nand/ndfc.c
-@@ -147,7 +147,6 @@ static int ndfc_chip_init(struct ndfc_co
- {
- struct device_node *flash_np;
- struct nand_chip *chip = &ndfc->chip;
-- struct mtd_part_parser_data ppdata;
- int ret;
-
- chip->IO_ADDR_R = ndfc->ndfcbase + NDFC_DATA;
-@@ -174,8 +173,8 @@ static int ndfc_chip_init(struct ndfc_co
- flash_np = of_get_next_child(node, NULL);
- if (!flash_np)
- return -ENODEV;
-+ nand_set_flash_node(chip, flash_np);
-
-- ppdata.of_node = flash_np;
- ndfc->mtd.name = kasprintf(GFP_KERNEL, "%s.%s",
- dev_name(&ndfc->ofdev->dev), flash_np->name);
- if (!ndfc->mtd.name) {
-@@ -187,7 +186,7 @@ static int ndfc_chip_init(struct ndfc_co
- if (ret)
- goto err;
-
-- ret = mtd_device_parse_register(&ndfc->mtd, NULL, &ppdata, NULL, 0);
-+ ret = mtd_device_register(&ndfc->mtd, NULL, 0);
-
- err:
- of_node_put(flash_np);
---- a/drivers/mtd/nand/omap2.c
-+++ b/drivers/mtd/nand/omap2.c
-@@ -1663,7 +1663,6 @@ static int omap_nand_probe(struct platfo
- unsigned sig;
- unsigned oob_index;
- struct resource *res;
-- struct mtd_part_parser_data ppdata = {};
-
- pdata = dev_get_platdata(&pdev->dev);
- if (pdata == NULL) {
-@@ -1688,6 +1687,7 @@ static int omap_nand_probe(struct platfo
- mtd->dev.parent = &pdev->dev;
- nand_chip = &info->nand;
- nand_chip->ecc.priv = NULL;
-+ nand_set_flash_node(nand_chip, pdata->of_node);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- nand_chip->IO_ADDR_R = devm_ioremap_resource(&pdev->dev, res);
-@@ -2037,9 +2037,7 @@ scan_tail:
- goto return_error;
- }
-
-- ppdata.of_node = pdata->of_node;
-- mtd_device_parse_register(mtd, NULL, &ppdata, pdata->parts,
-- pdata->nr_parts);
-+ mtd_device_register(mtd, pdata->parts, pdata->nr_parts);
-
- platform_set_drvdata(pdev, mtd);
-
---- a/drivers/mtd/nand/orion_nand.c
-+++ b/drivers/mtd/nand/orion_nand.c
-@@ -76,7 +76,6 @@ static void orion_nand_read_buf(struct m
- static int __init orion_nand_probe(struct platform_device *pdev)
- {
- struct mtd_info *mtd;
-- struct mtd_part_parser_data ppdata = {};
- struct nand_chip *nc;
- struct orion_nand_data *board;
- struct resource *res;
-@@ -127,6 +126,7 @@ static int __init orion_nand_probe(struc
- mtd->dev.parent = &pdev->dev;
-
- nc->priv = board;
-+ nand_set_flash_node(nc, pdev->dev.of_node);
- nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
- nc->cmd_ctrl = orion_nand_cmd_ctrl;
- nc->read_buf = orion_nand_read_buf;
-@@ -161,9 +161,7 @@ static int __init orion_nand_probe(struc
- }
-
- mtd->name = "orion_nand";
-- ppdata.of_node = pdev->dev.of_node;
-- ret = mtd_device_parse_register(mtd, NULL, &ppdata,
-- board->parts, board->nr_parts);
-+ ret = mtd_device_register(mtd, board->parts, board->nr_parts);
- if (ret) {
- nand_release(mtd);
- goto no_dev;
---- a/drivers/mtd/nand/plat_nand.c
-+++ b/drivers/mtd/nand/plat_nand.c
-@@ -30,7 +30,6 @@ struct plat_nand_data {
- static int plat_nand_probe(struct platform_device *pdev)
- {
- struct platform_nand_data *pdata = dev_get_platdata(&pdev->dev);
-- struct mtd_part_parser_data ppdata;
- struct plat_nand_data *data;
- struct resource *res;
- const char **part_types;
-@@ -58,6 +57,7 @@ static int plat_nand_probe(struct platfo
- return PTR_ERR(data->io_base);
-
- data->chip.priv = &data;
-+ nand_set_flash_node(&data->chip, pdev->dev.of_node);
- data->mtd.priv = &data->chip;
- data->mtd.dev.parent = &pdev->dev;
-
-@@ -105,8 +105,7 @@ static int plat_nand_probe(struct platfo
-
- part_types = pdata->chip.part_probe_types;
-
-- ppdata.of_node = pdev->dev.of_node;
-- err = mtd_device_parse_register(&data->mtd, part_types, &ppdata,
-+ err = mtd_device_parse_register(&data->mtd, part_types, NULL,
- pdata->chip.partitions,
- pdata->chip.nr_partitions);
-
---- a/drivers/mtd/nand/pxa3xx_nand.c
-+++ b/drivers/mtd/nand/pxa3xx_nand.c
-@@ -1697,6 +1697,7 @@ KEEP_CONFIG:
-
- static int alloc_nand_resource(struct platform_device *pdev)
- {
-+ struct device_node *np = pdev->dev.of_node;
- struct pxa3xx_nand_platform_data *pdata;
- struct pxa3xx_nand_info *info;
- struct pxa3xx_nand_host *host;
-@@ -1725,6 +1726,8 @@ static int alloc_nand_resource(struct pl
- host->info_data = info;
- mtd->priv = host;
- mtd->dev.parent = &pdev->dev;
-+ /* FIXME: all chips use the same device tree partitions */
-+ nand_set_flash_node(chip, np);
-
- chip->ecc.read_page = pxa3xx_nand_read_page_hwecc;
- chip->ecc.write_page = pxa3xx_nand_write_page_hwecc;
-@@ -1886,7 +1889,6 @@ static int pxa3xx_nand_probe_dt(struct p
- static int pxa3xx_nand_probe(struct platform_device *pdev)
- {
- struct pxa3xx_nand_platform_data *pdata;
-- struct mtd_part_parser_data ppdata = {};
- struct pxa3xx_nand_info *info;
- int ret, cs, probe_success, dma_available;
-
-@@ -1933,10 +1935,8 @@ static int pxa3xx_nand_probe(struct plat
- continue;
- }
-
-- ppdata.of_node = pdev->dev.of_node;
-- ret = mtd_device_parse_register(mtd, NULL,
-- &ppdata, pdata->parts[cs],
-- pdata->nr_parts[cs]);
-+ ret = mtd_device_register(mtd, pdata->parts[cs],
-+ pdata->nr_parts[cs]);
- if (!ret)
- probe_success = 1;
- }
---- a/drivers/mtd/nand/sh_flctl.c
-+++ b/drivers/mtd/nand/sh_flctl.c
-@@ -1086,7 +1086,6 @@ static int flctl_probe(struct platform_d
- struct sh_flctl_platform_data *pdata;
- int ret;
- int irq;
-- struct mtd_part_parser_data ppdata = {};
-
- flctl = devm_kzalloc(&pdev->dev, sizeof(struct sh_flctl), GFP_KERNEL);
- if (!flctl)
-@@ -1124,6 +1123,7 @@ static int flctl_probe(struct platform_d
- platform_set_drvdata(pdev, flctl);
- flctl_mtd = &flctl->mtd;
- nand = &flctl->chip;
-+ nand_set_flash_node(nand, pdev->dev.of_node);
- flctl_mtd->priv = nand;
- flctl_mtd->dev.parent = &pdev->dev;
- flctl->pdev = pdev;
-@@ -1164,9 +1164,7 @@ static int flctl_probe(struct platform_d
- if (ret)
- goto err_chip;
-
-- ppdata.of_node = pdev->dev.of_node;
-- ret = mtd_device_parse_register(flctl_mtd, NULL, &ppdata, pdata->parts,
-- pdata->nr_parts);
-+ ret = mtd_device_register(flctl_mtd, pdata->parts, pdata->nr_parts);
-
- return 0;
-
---- a/drivers/mtd/nand/socrates_nand.c
-+++ b/drivers/mtd/nand/socrates_nand.c
-@@ -147,7 +147,6 @@ static int socrates_nand_probe(struct pl
- struct mtd_info *mtd;
- struct nand_chip *nand_chip;
- int res;
-- struct mtd_part_parser_data ppdata;
-
- /* Allocate memory for the device structure (and zero it) */
- host = devm_kzalloc(&ofdev->dev, sizeof(*host), GFP_KERNEL);
-@@ -165,10 +164,10 @@ static int socrates_nand_probe(struct pl
- host->dev = &ofdev->dev;
-
- nand_chip->priv = host; /* link the private data structures */
-+ nand_set_flash_node(nand_chip, ofdev->dev.of_node);
- mtd->priv = nand_chip;
- mtd->name = "socrates_nand";
- mtd->dev.parent = &ofdev->dev;
-- ppdata.of_node = ofdev->dev.of_node;
-
- /*should never be accessed directly */
- nand_chip->IO_ADDR_R = (void *)0xdeadbeef;
-@@ -200,7 +199,7 @@ static int socrates_nand_probe(struct pl
- goto out;
- }
-
-- res = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+ res = mtd_device_register(mtd, NULL, 0);
- if (!res)
- return res;
-
---- a/drivers/mtd/nand/sunxi_nand.c
-+++ b/drivers/mtd/nand/sunxi_nand.c
-@@ -1238,7 +1238,6 @@ static int sunxi_nand_chip_init(struct d
- {
- const struct nand_sdr_timings *timings;
- struct sunxi_nand_chip *chip;
-- struct mtd_part_parser_data ppdata;
- struct mtd_info *mtd;
- struct nand_chip *nand;
- int nsels;
-@@ -1372,8 +1371,7 @@ static int sunxi_nand_chip_init(struct d
- return ret;
- }
-
-- ppdata.of_node = np;
-- ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+ ret = mtd_device_register(mtd, NULL, 0);
- if (ret) {
- dev_err(dev, "failed to register mtd device: %d\n", ret);
- nand_release(mtd);
---- a/drivers/mtd/nand/vf610_nfc.c
-+++ b/drivers/mtd/nand/vf610_nfc.c
-@@ -811,11 +811,7 @@ static int vf610_nfc_probe(struct platfo
- platform_set_drvdata(pdev, mtd);
-
- /* Register device in MTD */
-- return mtd_device_parse_register(mtd, NULL,
-- &(struct mtd_part_parser_data){
-- .of_node = chip->flash_node,
-- },
-- NULL, 0);
-+ return mtd_device_register(mtd, NULL, 0);
-
- error:
- of_node_put(chip->flash_node);
---- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
-+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
-@@ -850,7 +850,6 @@ static int spinand_probe(struct spi_devi
- struct nand_chip *chip;
- struct spinand_info *info;
- struct spinand_state *state;
-- struct mtd_part_parser_data ppdata;
-
- info = devm_kzalloc(&spi_nand->dev, sizeof(struct spinand_info),
- GFP_KERNEL);
-@@ -894,6 +893,7 @@ static int spinand_probe(struct spi_devi
- pr_info("%s: disable ecc failed!\n", __func__);
- #endif
-
-+ nand_set_flash_node(chip, spi_nand->dev.of_node);
- chip->priv = info;
- chip->read_buf = spinand_read_buf;
- chip->write_buf = spinand_write_buf;
-@@ -916,8 +916,7 @@ static int spinand_probe(struct spi_devi
- if (nand_scan(mtd, 1))
- return -ENXIO;
-
-- ppdata.of_node = spi_nand->dev.of_node;
-- return mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+ return mtd_device_register(mtd, NULL, 0);
- }
-
- /*
+++ /dev/null
-From df02c885f8697546da41665f28dde5e30ce99674 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:26 -0700
-Subject: [PATCH] mtd: spi-nor: drop unnecessary partition parser data
-
-Now that the SPI-NOR/MTD framework pass the 'flash_node' through to the
-partition parsing code, we don't have to do it ourselves.
-
-Also convert to mtd_device_register(), since we don't need the 2nd and
-3rd parameters anymore.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/devices/m25p80.c | 8 ++------
- drivers/mtd/spi-nor/fsl-quadspi.c | 4 +---
- drivers/mtd/spi-nor/nxp-spifi.c | 4 +---
- 3 files changed, 4 insertions(+), 12 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -197,7 +197,6 @@ static int m25p80_erase(struct spi_nor *
- */
- static int m25p_probe(struct spi_device *spi)
- {
-- struct mtd_part_parser_data ppdata;
- struct flash_platform_data *data;
- struct m25p *flash;
- struct spi_nor *nor;
-@@ -249,11 +248,8 @@ static int m25p_probe(struct spi_device
- if (ret)
- return ret;
-
-- ppdata.of_node = spi->dev.of_node;
--
-- return mtd_device_parse_register(&nor->mtd, NULL, &ppdata,
-- data ? data->parts : NULL,
-- data ? data->nr_parts : 0);
-+ return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
-+ data ? data->nr_parts : 0);
- }
-
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -927,7 +927,6 @@ static void fsl_qspi_unprep(struct spi_n
- static int fsl_qspi_probe(struct platform_device *pdev)
- {
- struct device_node *np = pdev->dev.of_node;
-- struct mtd_part_parser_data ppdata;
- struct device *dev = &pdev->dev;
- struct fsl_qspi *q;
- struct resource *res;
-@@ -1038,8 +1037,7 @@ static int fsl_qspi_probe(struct platfor
- if (ret)
- goto mutex_failed;
-
-- ppdata.of_node = np;
-- ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+ ret = mtd_device_register(mtd, NULL, 0);
- if (ret)
- goto mutex_failed;
-
---- a/drivers/mtd/spi-nor/nxp-spifi.c
-+++ b/drivers/mtd/spi-nor/nxp-spifi.c
-@@ -271,7 +271,6 @@ static void nxp_spifi_dummy_id_read(stru
- static int nxp_spifi_setup_flash(struct nxp_spifi *spifi,
- struct device_node *np)
- {
-- struct mtd_part_parser_data ppdata;
- enum read_mode flash_read;
- u32 ctrl, property;
- u16 mode = 0;
-@@ -361,8 +360,7 @@ static int nxp_spifi_setup_flash(struct
- return ret;
- }
-
-- ppdata.of_node = np;
-- ret = mtd_device_parse_register(&spifi->nor.mtd, NULL, &ppdata, NULL, 0);
-+ ret = mtd_device_register(&spifi->nor.mtd, NULL, 0);
- if (ret) {
- dev_err(spifi->dev, "mtd device parse failed\n");
- return ret;
+++ /dev/null
-From 30069af7348b56eb8c5e1dda7788a531c5f24ca2 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:27 -0700
-Subject: [PATCH 08/11] mtd: spi-nor: drop flash_node field
-
-We can just alias to the MTD of_node.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/spi-nor/spi-nor.c | 1 -
- include/linux/mtd/spi-nor.h | 6 ++----
- 2 files changed, 2 insertions(+), 5 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1228,7 +1228,6 @@ int spi_nor_scan(struct spi_nor *nor, co
- mtd->flags |= MTD_NO_ERASE;
-
- mtd->dev.parent = dev;
-- mtd_set_of_node(mtd, np);
- nor->page_size = info->page_size;
- mtd->writebufsize = nor->page_size;
-
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -123,7 +123,6 @@ enum spi_nor_option_flags {
- * @mtd: point to a mtd_info structure
- * @lock: the lock for the read/write/erase/lock/unlock operations
- * @dev: point to a spi device, or a spi nor controller device.
-- * @flash_node: point to a device node describing this flash instance.
- * @page_size: the page size of the SPI NOR
- * @addr_width: number of address bytes
- * @erase_opcode: the opcode for erasing a sector
-@@ -154,7 +153,6 @@ struct spi_nor {
- struct mtd_info mtd;
- struct mutex lock;
- struct device *dev;
-- struct device_node *flash_node;
- u32 page_size;
- u8 addr_width;
- u8 erase_opcode;
-@@ -187,12 +185,12 @@ struct spi_nor {
- static inline void spi_nor_set_flash_node(struct spi_nor *nor,
- struct device_node *np)
- {
-- nor->flash_node = np;
-+ mtd_set_of_node(&nor->mtd, np);
- }
-
- static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
- {
-- return nor->flash_node;
-+ return mtd_get_of_node(&nor->mtd);
- }
-
- /**
+++ /dev/null
-From 004b5e6031f4e9fd90d565fb213b74cd06d03718 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:28 -0700
-Subject: [PATCH] mtd: drop unnecessary partition parser data
-
-We should assign the MTD dev.of_node instead of the parser data field.
-This gets us the equivalent partition parser behavior with fewer special
-fields and parameter passing.
-
-Also convert several of these to mtd_device_register(), since we don't
-need the 2nd and 3rd parameters anymore.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Marek Vasut <marex@denx.de>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/devices/mtd_dataflash.c | 5 ++---
- drivers/mtd/devices/spear_smi.c | 6 ++----
- drivers/mtd/devices/st_spi_fsm.c | 5 ++---
- drivers/mtd/maps/lantiq-flash.c | 5 ++---
- drivers/mtd/maps/physmap_of.c | 5 ++---
- drivers/mtd/onenand/omap2.c | 8 +++-----
- 6 files changed, 13 insertions(+), 21 deletions(-)
-
---- a/drivers/mtd/devices/mtd_dataflash.c
-+++ b/drivers/mtd/devices/mtd_dataflash.c
-@@ -624,7 +624,6 @@ static int add_dataflash_otp(struct spi_
- {
- struct dataflash *priv;
- struct mtd_info *device;
-- struct mtd_part_parser_data ppdata;
- struct flash_platform_data *pdata = dev_get_platdata(&spi->dev);
- char *otp_tag = "";
- int err = 0;
-@@ -656,6 +655,7 @@ static int add_dataflash_otp(struct spi_
- device->priv = priv;
-
- device->dev.parent = &spi->dev;
-+ mtd_set_of_node(device, spi->dev.of_node);
-
- if (revision >= 'c')
- otp_tag = otp_setup(device, revision);
-@@ -665,8 +665,7 @@ static int add_dataflash_otp(struct spi_
- pagesize, otp_tag);
- spi_set_drvdata(spi, priv);
-
-- ppdata.of_node = spi->dev.of_node;
-- err = mtd_device_parse_register(device, NULL, &ppdata,
-+ err = mtd_device_register(device,
- pdata ? pdata->parts : NULL,
- pdata ? pdata->nr_parts : 0);
-
---- a/drivers/mtd/devices/spear_smi.c
-+++ b/drivers/mtd/devices/spear_smi.c
-@@ -810,7 +810,6 @@ static int spear_smi_setup_banks(struct
- u32 bank, struct device_node *np)
- {
- struct spear_smi *dev = platform_get_drvdata(pdev);
-- struct mtd_part_parser_data ppdata = {};
- struct spear_smi_flash_info *flash_info;
- struct spear_smi_plat_data *pdata;
- struct spear_snor_flash *flash;
-@@ -855,6 +854,7 @@ static int spear_smi_setup_banks(struct
- flash->mtd.name = flash_devices[flash_index].name;
-
- flash->mtd.dev.parent = &pdev->dev;
-+ mtd_set_of_node(&flash->mtd, np);
- flash->mtd.type = MTD_NORFLASH;
- flash->mtd.writesize = 1;
- flash->mtd.flags = MTD_CAP_NORFLASH;
-@@ -881,10 +881,8 @@ static int spear_smi_setup_banks(struct
- count = flash_info->nr_partitions;
- }
- #endif
-- ppdata.of_node = np;
-
-- ret = mtd_device_parse_register(&flash->mtd, NULL, &ppdata, parts,
-- count);
-+ ret = mtd_device_register(&flash->mtd, parts, count);
- if (ret) {
- dev_err(&dev->pdev->dev, "Err MTD partition=%d\n", ret);
- return ret;
---- a/drivers/mtd/devices/st_spi_fsm.c
-+++ b/drivers/mtd/devices/st_spi_fsm.c
-@@ -2025,7 +2025,6 @@ boot_device_fail:
- static int stfsm_probe(struct platform_device *pdev)
- {
- struct device_node *np = pdev->dev.of_node;
-- struct mtd_part_parser_data ppdata;
- struct flash_info *info;
- struct resource *res;
- struct stfsm *fsm;
-@@ -2035,7 +2034,6 @@ static int stfsm_probe(struct platform_d
- dev_err(&pdev->dev, "No DT found\n");
- return -EINVAL;
- }
-- ppdata.of_node = np;
-
- fsm = devm_kzalloc(&pdev->dev, sizeof(*fsm), GFP_KERNEL);
- if (!fsm)
-@@ -2106,6 +2104,7 @@ static int stfsm_probe(struct platform_d
-
- fsm->mtd.name = info->name;
- fsm->mtd.dev.parent = &pdev->dev;
-+ mtd_set_of_node(&fsm->mtd, np);
- fsm->mtd.type = MTD_NORFLASH;
- fsm->mtd.writesize = 4;
- fsm->mtd.writebufsize = fsm->mtd.writesize;
-@@ -2124,7 +2123,7 @@ static int stfsm_probe(struct platform_d
- (long long)fsm->mtd.size, (long long)(fsm->mtd.size >> 20),
- fsm->mtd.erasesize, (fsm->mtd.erasesize >> 10));
-
-- return mtd_device_parse_register(&fsm->mtd, NULL, &ppdata, NULL, 0);
-+ return mtd_device_register(&fsm->mtd, NULL, 0);
- }
-
- static int stfsm_remove(struct platform_device *pdev)
---- a/drivers/mtd/maps/lantiq-flash.c
-+++ b/drivers/mtd/maps/lantiq-flash.c
-@@ -110,7 +110,6 @@ ltq_copy_to(struct map_info *map, unsign
- static int
- ltq_mtd_probe(struct platform_device *pdev)
- {
-- struct mtd_part_parser_data ppdata;
- struct ltq_mtd *ltq_mtd;
- struct cfi_private *cfi;
- int err;
-@@ -161,13 +160,13 @@ ltq_mtd_probe(struct platform_device *pd
- }
-
- ltq_mtd->mtd->dev.parent = &pdev->dev;
-+ mtd_set_of_node(ltq_mtd->mtd, pdev->dev.of_node);
-
- cfi = ltq_mtd->map->fldrv_priv;
- cfi->addr_unlock1 ^= 1;
- cfi->addr_unlock2 ^= 1;
-
-- ppdata.of_node = pdev->dev.of_node;
-- err = mtd_device_parse_register(ltq_mtd->mtd, NULL, &ppdata, NULL, 0);
-+ err = mtd_device_register(ltq_mtd->mtd, NULL, 0);
- if (err) {
- dev_err(&pdev->dev, "failed to add partitions\n");
- goto err_destroy;
---- a/drivers/mtd/maps/physmap_of.c
-+++ b/drivers/mtd/maps/physmap_of.c
-@@ -128,7 +128,6 @@ static int of_flash_probe(struct platfor
- int reg_tuple_size;
- struct mtd_info **mtd_list = NULL;
- resource_size_t res_size;
-- struct mtd_part_parser_data ppdata;
- bool map_indirect;
- const char *mtd_name = NULL;
-
-@@ -272,8 +271,8 @@ static int of_flash_probe(struct platfor
- if (err)
- goto err_out;
-
-- ppdata.of_node = dp;
-- mtd_device_parse_register(info->cmtd, part_probe_types_def, &ppdata,
-+ mtd_set_of_node(info->cmtd, dp);
-+ mtd_device_parse_register(info->cmtd, part_probe_types_def, NULL,
- NULL, 0);
-
- kfree(mtd_list);
---- a/drivers/mtd/onenand/omap2.c
-+++ b/drivers/mtd/onenand/omap2.c
-@@ -614,7 +614,6 @@ static int omap2_onenand_probe(struct pl
- struct onenand_chip *this;
- int r;
- struct resource *res;
-- struct mtd_part_parser_data ppdata = {};
-
- pdata = dev_get_platdata(&pdev->dev);
- if (pdata == NULL) {
-@@ -713,6 +712,7 @@ static int omap2_onenand_probe(struct pl
- c->mtd.priv = &c->onenand;
-
- c->mtd.dev.parent = &pdev->dev;
-+ mtd_set_of_node(&c->mtd, pdata->of_node);
-
- this = &c->onenand;
- if (c->dma_channel >= 0) {
-@@ -743,10 +743,8 @@ static int omap2_onenand_probe(struct pl
- if ((r = onenand_scan(&c->mtd, 1)) < 0)
- goto err_release_regulator;
-
-- ppdata.of_node = pdata->of_node;
-- r = mtd_device_parse_register(&c->mtd, NULL, &ppdata,
-- pdata ? pdata->parts : NULL,
-- pdata ? pdata->nr_parts : 0);
-+ r = mtd_device_register(&c->mtd, pdata ? pdata->parts : NULL,
-+ pdata ? pdata->nr_parts : 0);
- if (r)
- goto err_release_onenand;
-
+++ /dev/null
-From e270bca531b40cd0a143176eb093d173b9c6f418 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:29 -0700
-Subject: [PATCH 10/11] mtd: ofpart: drop 'of_node' partition parser data
-
-This field is no longer used anywhere, as it is superseded by
-mtd->dev.of_node.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/ofpart.c | 14 ++++----------
- include/linux/mtd/partitions.h | 4 ----
- 2 files changed, 4 insertions(+), 14 deletions(-)
-
---- a/drivers/mtd/ofpart.c
-+++ b/drivers/mtd/ofpart.c
-@@ -37,11 +37,8 @@ static int parse_ofpart_partitions(struc
- bool dedicated = true;
-
-
-- /*
-- * of_node can be provided through auxiliary parser data or (preferred)
-- * by assigning the master device node
-- */
-- mtd_node = data && data->of_node ? data->of_node : mtd_get_of_node(master);
-+ /* Pull of_node from the master device node */
-+ mtd_node = mtd_get_of_node(master);
- if (!mtd_node)
- return 0;
-
-@@ -158,11 +155,8 @@ static int parse_ofoldpart_partitions(st
- } *part;
- const char *names;
-
-- /*
-- * of_node can be provided through auxiliary parser data or (preferred)
-- * by assigning the master device node
-- */
-- dp = data && data->of_node ? data->of_node : mtd_get_of_node(master);
-+ /* Pull of_node from the master device node */
-+ dp = mtd_get_of_node(master);
- if (!dp)
- return 0;
-
---- a/include/linux/mtd/partitions.h
-+++ b/include/linux/mtd/partitions.h
-@@ -56,13 +56,9 @@ struct device_node;
- /**
- * struct mtd_part_parser_data - used to pass data to MTD partition parsers.
- * @origin: for RedBoot, start address of MTD device
-- * @of_node: for OF parsers, device node containing partitioning information.
-- * This field is deprecated, as the device node should simply be
-- * assigned to the master struct device.
- */
- struct mtd_part_parser_data {
- unsigned long origin;
-- struct device_node *of_node;
- };
-
-
+++ /dev/null
-From 8361a9b8cb6a9c71b7cf884a87b2532d8367c185 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:30 -0700
-Subject: [PATCH 11/11] mtd: physmap_of: assign parent for the concatenated MTD
-
-If there is more than one map region for this device, then the
-concatenated MTD will not have a parent device assigned to it -- only
-the sub-devices (which are not actually registered with the framework)
-will have their parents assigned. Let's assign the concatenated device
-correctly.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/maps/physmap_of.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/mtd/maps/physmap_of.c
-+++ b/drivers/mtd/maps/physmap_of.c
-@@ -271,6 +271,7 @@ static int of_flash_probe(struct platfor
- if (err)
- goto err_out;
-
-+ info->cmtd->dev.parent = &dev->dev;
- mtd_set_of_node(info->cmtd, dp);
- mtd_device_parse_register(info->cmtd, part_probe_types_def, NULL,
- NULL, 0);
+++ /dev/null
-From 4acad4aae10d1fa79a075b38b5c73772c44f576c Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Wed, 2 Dec 2015 10:38:21 +0000
-Subject: [PATCH] spi: expose master transfer size limitation.
-
-On some SPI controllers it is not feasible to transfer arbitrary amount
-of data at once.
-
-When the limit on transfer size is a few kilobytes at least it makes
-sense to use the SPI hardware rather than reverting to gpio driver.
-
-The protocol drivers need a way to check that they do not sent overly
-long messages, though.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- include/linux/spi/spi.h | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/include/linux/spi/spi.h
-+++ b/include/linux/spi/spi.h
-@@ -428,6 +428,12 @@ struct spi_master {
- #define SPI_MASTER_MUST_RX BIT(3) /* requires rx */
- #define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
-
-+ /*
-+ * on some hardware transfer size may be constrained
-+ * the limit may depend on device transfer settings
-+ */
-+ size_t (*max_transfer_size)(struct spi_device *spi);
-+
- /* lock and mutex for SPI bus locking */
- spinlock_t bus_lock_spinlock;
- struct mutex bus_lock_mutex;
-@@ -837,6 +843,15 @@ extern int spi_async(struct spi_device *
- extern int spi_async_locked(struct spi_device *spi,
- struct spi_message *message);
-
-+static inline size_t
-+spi_max_transfer_size(struct spi_device *spi)
-+{
-+ struct spi_master *master = spi->master;
-+ if (!master->max_transfer_size)
-+ return SIZE_MAX;
-+ return master->max_transfer_size(spi);
-+}
-+
- /*---------------------------------------------------------------------------*/
-
- /* All these synchronous SPI transfer routines are utilities layered
+++ /dev/null
-From b08ea35a3296ee25c4cb53a977b752266dafa2c2 Mon Sep 17 00:00:00 2001
-From: Linus Walleij <linus.walleij@linaro.org>
-Date: Thu, 3 Dec 2015 15:14:13 +0100
-Subject: [PATCH] gpio: add a data pointer to gpio_chip
-
-This adds a void * pointer to gpio_chip so that driver can
-assign and retrieve some states. This is done to get rid of
-container_of() calls for gpio_chips embedded inside state
-containers, so we can remove the need to have the gpio_chip
-or later (planned) struct gpio_device be dynamically allocated
-at registration time, so that its struct device can be properly
-reference counted and not bound to its parent device (e.g.
-a platform_device) but instead live on after unregistration
-if it is opened by e.g. a char device or sysfs.
-
-The data is added with the new function gpiochip_add_data()
-and for compatibility we add static inline wrapper function
-gpiochip_add() that will call gpiochip_add_data() with
-NULL as argument. The latter will be removed once we have
-exorcised gpiochip_add() from the kernel.
-
-gpiochip_get_data() is added as a static inline accessor
-for drivers to quickly get their data out.
-
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/gpio/gpiolib.c | 10 ++++++----
- include/linux/gpio/driver.h | 14 +++++++++++++-
- 2 files changed, 19 insertions(+), 5 deletions(-)
-
---- a/drivers/gpio/gpiolib.c
-+++ b/drivers/gpio/gpiolib.c
-@@ -280,7 +280,7 @@ static int gpiochip_set_desc_names(struc
- }
-
- /**
-- * gpiochip_add() - register a gpio_chip
-+ * gpiochip_add_data() - register a gpio_chip
- * @chip: the chip to register, with chip->base initialized
- * Context: potentially before irqs will work
- *
-@@ -288,7 +288,7 @@ static int gpiochip_set_desc_names(struc
- * because the chip->base is invalid or already associated with a
- * different chip. Otherwise it returns zero as a success code.
- *
-- * When gpiochip_add() is called very early during boot, so that GPIOs
-+ * When gpiochip_add_data() is called very early during boot, so that GPIOs
- * can be freely used, the chip->dev device must be registered before
- * the gpio framework's arch_initcall(). Otherwise sysfs initialization
- * for GPIOs will fail rudely.
-@@ -296,7 +296,7 @@ static int gpiochip_set_desc_names(struc
- * If chip->base is negative, this requests dynamic assignment of
- * a range of valid GPIOs.
- */
--int gpiochip_add(struct gpio_chip *chip)
-+int gpiochip_add_data(struct gpio_chip *chip, void *data)
- {
- unsigned long flags;
- int status = 0;
-@@ -308,6 +308,8 @@ int gpiochip_add(struct gpio_chip *chip)
- if (!descs)
- return -ENOMEM;
-
-+ chip->data = data;
-+
- spin_lock_irqsave(&gpio_lock, flags);
-
- if (base < 0) {
-@@ -389,7 +391,7 @@ err_free_descs:
- chip->label ? : "generic");
- return status;
- }
--EXPORT_SYMBOL_GPL(gpiochip_add);
-+EXPORT_SYMBOL_GPL(gpiochip_add_data);
-
- /**
- * gpiochip_remove() - unregister a gpio_chip
---- a/include/linux/gpio/driver.h
-+++ b/include/linux/gpio/driver.h
-@@ -23,6 +23,7 @@ struct seq_file;
- * @dev: optional device providing the GPIOs
- * @cdev: class device used by sysfs interface (may be NULL)
- * @owner: helps prevent removal of modules exporting active GPIOs
-+ * @data: per-instance data assigned by the driver
- * @list: links gpio_chips together for traversal
- * @request: optional hook for chip-specific activation, such as
- * enabling module power and clock; may sleep
-@@ -92,6 +93,7 @@ struct gpio_chip {
- struct device *dev;
- struct device *cdev;
- struct module *owner;
-+ void *data;
- struct list_head list;
-
- int (*request)(struct gpio_chip *chip,
-@@ -166,7 +168,11 @@ extern const char *gpiochip_is_requested
- unsigned offset);
-
- /* add/remove chips */
--extern int gpiochip_add(struct gpio_chip *chip);
-+extern int gpiochip_add_data(struct gpio_chip *chip, void *data);
-+static inline int gpiochip_add(struct gpio_chip *chip)
-+{
-+ return gpiochip_add_data(chip, NULL);
-+}
- extern void gpiochip_remove(struct gpio_chip *chip);
- extern struct gpio_chip *gpiochip_find(void *data,
- int (*match)(struct gpio_chip *chip, void *data));
-@@ -175,6 +181,12 @@ extern struct gpio_chip *gpiochip_find(v
- int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
- void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
-
-+/* get driver data */
-+static inline void *gpiochip_get_data(struct gpio_chip *chip)
-+{
-+ return chip->data;
-+}
-+
- struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
-
- #ifdef CONFIG_GPIOLIB_IRQCHIP
+++ /dev/null
-From 0f4630f3720e7e6e921bf525c8357fea7ef3dbab Mon Sep 17 00:00:00 2001
-From: Linus Walleij <linus.walleij@linaro.org>
-Date: Fri, 4 Dec 2015 14:02:58 +0100
-Subject: [PATCH] gpio: generic: factor into gpio_chip struct
-
-The separate struct bgpio_chip has been a pain to handle, both
-by being confusingly similar in name to struct gpio_chip and
-for being contained inside a struct so that struct gpio_chip
-is contained in a struct contained in a struct, making several
-steps of dereferencing necessary.
-
-Make things simpler: include the fields directly into
-<linux/gpio/driver.h>, #ifdef:ed for CONFIG_GENERIC_GPIO, and
-get rid of the <linux/basic_mmio_gpio.h> altogether. Prefix
-some of the member variables with bgpio_* and add proper
-kerneldoc while we're at it.
-
-Modify all users to handle the change and use a struct
-gpio_chip directly. And while we're at it: replace all
-container_of() dereferencing by gpiochip_get_data() and
-registering the gpio_chip with gpiochip_add_data().
-
-Cc: arm@kernel.org
-Cc: Alexander Shiyan <shc_work@mail.ru>
-Cc: Shawn Guo <shawnguo@kernel.org>
-Cc: Sascha Hauer <kernel@pengutronix.de>
-Cc: Kukjin Kim <kgene@kernel.org>
-Cc: Alexandre Courbot <gnurou@gmail.com>
-Cc: Brian Norris <computersforpeace@gmail.com>
-Cc: Florian Fainelli <f.fainelli@gmail.com>
-Cc: Sudeep Holla <sudeep.holla@arm.com>
-Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
-Cc: Olof Johansson <olof@lixom.net>
-Cc: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
-Cc: Rabin Vincent <rabin@rab.in>
-Cc: linux-arm-kernel@lists.infradead.org
-Cc: linux-omap@vger.kernel.org
-Cc: linux-samsung-soc@vger.kernel.org
-Cc: bcm-kernel-feedback-list@broadcom.com
-Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
-Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
-Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
-Acked-by: Tony Lindgren <tony@atomide.com>
-Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
-Acked-by: Lee Jones <lee.jones@linaro.org>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- arch/arm/mach-clps711x/board-autcpu12.c | 2 +-
- arch/arm/mach-clps711x/board-p720t.c | 2 +-
- arch/arm/mach-imx/mach-mx21ads.c | 2 +-
- arch/arm/mach-omap1/board-ams-delta.c | 2 +-
- arch/arm/mach-s3c64xx/mach-crag6410.c | 2 +-
- drivers/gpio/gpio-74xx-mmio.c | 37 ++--
- drivers/gpio/gpio-brcmstb.c | 80 ++++-----
- drivers/gpio/gpio-clps711x.c | 28 +--
- drivers/gpio/gpio-dwapb.c | 92 +++++-----
- drivers/gpio/gpio-ep93xx.c | 25 +--
- drivers/gpio/gpio-etraxfs.c | 49 +++---
- drivers/gpio/gpio-ge.c | 24 +--
- drivers/gpio/gpio-generic.c | 292 +++++++++++++++-----------------
- drivers/gpio/gpio-grgpio.c | 73 ++++----
- drivers/gpio/gpio-moxart.c | 29 ++--
- drivers/gpio/gpio-mxc.c | 27 ++-
- drivers/gpio/gpio-mxs.c | 33 ++--
- drivers/gpio/gpio-sodaville.c | 13 +-
- drivers/gpio/gpio-xgene-sb.c | 40 ++---
- drivers/mfd/vexpress-sysreg.c | 8 +-
- include/linux/basic_mmio_gpio.h | 80 ---------
- include/linux/gpio/driver.h | 54 ++++++
- 22 files changed, 442 insertions(+), 552 deletions(-)
- delete mode 100644 include/linux/basic_mmio_gpio.h
-
---- a/arch/arm/mach-clps711x/board-autcpu12.c
-+++ b/arch/arm/mach-clps711x/board-autcpu12.c
-@@ -31,7 +31,7 @@
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/nand-gpio.h>
- #include <linux/platform_device.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
-
- #include <mach/hardware.h>
- #include <asm/sizes.h>
---- a/arch/arm/mach-clps711x/board-p720t.c
-+++ b/arch/arm/mach-clps711x/board-p720t.c
-@@ -28,7 +28,7 @@
- #include <linux/leds.h>
- #include <linux/sizes.h>
- #include <linux/backlight.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/platform_device.h>
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/nand-gpio.h>
---- a/arch/arm/mach-imx/mach-mx21ads.c
-+++ b/arch/arm/mach-imx/mach-mx21ads.c
-@@ -17,7 +17,7 @@
- #include <linux/platform_device.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/physmap.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/gpio.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
---- a/arch/arm/mach-omap1/board-ams-delta.c
-+++ b/arch/arm/mach-omap1/board-ams-delta.c
-@@ -11,7 +11,7 @@
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/gpio.h>
- #include <linux/kernel.h>
- #include <linux/init.h>
---- a/arch/arm/mach-s3c64xx/mach-crag6410.c
-+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
-@@ -29,7 +29,7 @@
- #include <linux/pwm_backlight.h>
- #include <linux/dm9000.h>
- #include <linux/gpio_keys.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/spi/spi.h>
-
- #include <linux/platform_data/pca953x.h>
---- a/drivers/gpio/gpio-74xx-mmio.c
-+++ b/drivers/gpio/gpio-74xx-mmio.c
-@@ -10,10 +10,9 @@
- */
-
- #include <linux/err.h>
--#include <linux/gpio.h>
- #include <linux/module.h>
- #include <linux/of_device.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/platform_device.h>
-
- #define MMIO_74XX_DIR_IN (0 << 8)
-@@ -21,7 +20,7 @@
- #define MMIO_74XX_BIT_CNT(x) ((x) & 0xff)
-
- struct mmio_74xx_gpio_priv {
-- struct bgpio_chip bgc;
-+ struct gpio_chip gc;
- unsigned flags;
- };
-
-@@ -78,30 +77,23 @@ static const struct of_device_id mmio_74
- };
- MODULE_DEVICE_TABLE(of, mmio_74xx_gpio_ids);
-
--static inline struct mmio_74xx_gpio_priv *to_74xx_gpio(struct gpio_chip *gc)
--{
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
--
-- return container_of(bgc, struct mmio_74xx_gpio_priv, bgc);
--}
--
- static int mmio_74xx_get_direction(struct gpio_chip *gc, unsigned offset)
- {
-- struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc);
-+ struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
-
-- return (priv->flags & MMIO_74XX_DIR_OUT) ? GPIOF_DIR_OUT : GPIOF_DIR_IN;
-+ return !(priv->flags & MMIO_74XX_DIR_OUT);
- }
-
- static int mmio_74xx_dir_in(struct gpio_chip *gc, unsigned int gpio)
- {
-- struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc);
-+ struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
-
- return (priv->flags & MMIO_74XX_DIR_OUT) ? -ENOTSUPP : 0;
- }
-
- static int mmio_74xx_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
- {
-- struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc);
-+ struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
-
- if (priv->flags & MMIO_74XX_DIR_OUT) {
- gc->set(gc, gpio, val);
-@@ -134,28 +126,29 @@ static int mmio_74xx_gpio_probe(struct p
-
- priv->flags = (uintptr_t) of_id->data;
-
-- err = bgpio_init(&priv->bgc, &pdev->dev,
-+ err = bgpio_init(&priv->gc, &pdev->dev,
- DIV_ROUND_UP(MMIO_74XX_BIT_CNT(priv->flags), 8),
- dat, NULL, NULL, NULL, NULL, 0);
- if (err)
- return err;
-
-- priv->bgc.gc.direction_input = mmio_74xx_dir_in;
-- priv->bgc.gc.direction_output = mmio_74xx_dir_out;
-- priv->bgc.gc.get_direction = mmio_74xx_get_direction;
-- priv->bgc.gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags);
-- priv->bgc.gc.owner = THIS_MODULE;
-+ priv->gc.direction_input = mmio_74xx_dir_in;
-+ priv->gc.direction_output = mmio_74xx_dir_out;
-+ priv->gc.get_direction = mmio_74xx_get_direction;
-+ priv->gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags);
-+ priv->gc.owner = THIS_MODULE;
-
- platform_set_drvdata(pdev, priv);
-
-- return gpiochip_add(&priv->bgc.gc);
-+ return gpiochip_add_data(&priv->gc, priv);
- }
-
- static int mmio_74xx_gpio_remove(struct platform_device *pdev)
- {
- struct mmio_74xx_gpio_priv *priv = platform_get_drvdata(pdev);
-
-- return bgpio_remove(&priv->bgc);
-+ gpiochip_remove(&priv->gc);
-+ return 0;
- }
-
- static struct platform_driver mmio_74xx_gpio_driver = {
---- a/drivers/gpio/gpio-brcmstb.c
-+++ b/drivers/gpio/gpio-brcmstb.c
-@@ -16,7 +16,6 @@
- #include <linux/of_device.h>
- #include <linux/of_irq.h>
- #include <linux/module.h>
--#include <linux/basic_mmio_gpio.h>
- #include <linux/irqdomain.h>
- #include <linux/irqchip/chained_irq.h>
- #include <linux/interrupt.h>
-@@ -35,7 +34,7 @@
- struct brcmstb_gpio_bank {
- struct list_head node;
- int id;
-- struct bgpio_chip bgc;
-+ struct gpio_chip gc;
- struct brcmstb_gpio_priv *parent_priv;
- u32 width;
- struct irq_chip irq_chip;
-@@ -57,37 +56,30 @@ struct brcmstb_gpio_priv {
- /* assumes MAX_GPIO_PER_BANK is a multiple of 2 */
- #define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1))
-
--static inline struct brcmstb_gpio_bank *
--brcmstb_gpio_gc_to_bank(struct gpio_chip *gc)
--{
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- return container_of(bgc, struct brcmstb_gpio_bank, bgc);
--}
--
- static inline struct brcmstb_gpio_priv *
- brcmstb_gpio_gc_to_priv(struct gpio_chip *gc)
- {
-- struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
-+ struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
- return bank->parent_priv;
- }
-
- static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
- unsigned int offset, bool enable)
- {
-- struct bgpio_chip *bgc = &bank->bgc;
-+ struct gpio_chip *gc = &bank->gc;
- struct brcmstb_gpio_priv *priv = bank->parent_priv;
-- u32 mask = bgc->pin2mask(bgc, offset);
-+ u32 mask = gc->pin2mask(gc, offset);
- u32 imask;
- unsigned long flags;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-- imask = bgc->read_reg(priv->reg_base + GIO_MASK(bank->id));
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-+ imask = gc->read_reg(priv->reg_base + GIO_MASK(bank->id));
- if (enable)
- imask |= mask;
- else
- imask &= ~mask;
-- bgc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ gc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
- }
-
- /* -------------------- IRQ chip functions -------------------- */
-@@ -95,7 +87,7 @@ static void brcmstb_gpio_set_imask(struc
- static void brcmstb_gpio_irq_mask(struct irq_data *d)
- {
- struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-- struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
-+ struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
-
- brcmstb_gpio_set_imask(bank, d->hwirq, false);
- }
-@@ -103,7 +95,7 @@ static void brcmstb_gpio_irq_mask(struct
- static void brcmstb_gpio_irq_unmask(struct irq_data *d)
- {
- struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-- struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
-+ struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
-
- brcmstb_gpio_set_imask(bank, d->hwirq, true);
- }
-@@ -111,7 +103,7 @@ static void brcmstb_gpio_irq_unmask(stru
- static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
- {
- struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-- struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
-+ struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
- struct brcmstb_gpio_priv *priv = bank->parent_priv;
- u32 mask = BIT(d->hwirq);
- u32 edge_insensitive, iedge_insensitive;
-@@ -149,23 +141,23 @@ static int brcmstb_gpio_irq_set_type(str
- return -EINVAL;
- }
-
-- spin_lock_irqsave(&bank->bgc.lock, flags);
-+ spin_lock_irqsave(&bank->gc.bgpio_lock, flags);
-
-- iedge_config = bank->bgc.read_reg(priv->reg_base +
-+ iedge_config = bank->gc.read_reg(priv->reg_base +
- GIO_EC(bank->id)) & ~mask;
-- iedge_insensitive = bank->bgc.read_reg(priv->reg_base +
-+ iedge_insensitive = bank->gc.read_reg(priv->reg_base +
- GIO_EI(bank->id)) & ~mask;
-- ilevel = bank->bgc.read_reg(priv->reg_base +
-+ ilevel = bank->gc.read_reg(priv->reg_base +
- GIO_LEVEL(bank->id)) & ~mask;
-
-- bank->bgc.write_reg(priv->reg_base + GIO_EC(bank->id),
-+ bank->gc.write_reg(priv->reg_base + GIO_EC(bank->id),
- iedge_config | edge_config);
-- bank->bgc.write_reg(priv->reg_base + GIO_EI(bank->id),
-+ bank->gc.write_reg(priv->reg_base + GIO_EI(bank->id),
- iedge_insensitive | edge_insensitive);
-- bank->bgc.write_reg(priv->reg_base + GIO_LEVEL(bank->id),
-+ bank->gc.write_reg(priv->reg_base + GIO_LEVEL(bank->id),
- ilevel | level);
-
-- spin_unlock_irqrestore(&bank->bgc.lock, flags);
-+ spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags);
- return 0;
- }
-
-@@ -210,29 +202,29 @@ static irqreturn_t brcmstb_gpio_wake_irq
- static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)
- {
- struct brcmstb_gpio_priv *priv = bank->parent_priv;
-- struct irq_domain *irq_domain = bank->bgc.gc.irqdomain;
-+ struct irq_domain *irq_domain = bank->gc.irqdomain;
- void __iomem *reg_base = priv->reg_base;
- unsigned long status;
- unsigned long flags;
-
-- spin_lock_irqsave(&bank->bgc.lock, flags);
-- while ((status = bank->bgc.read_reg(reg_base + GIO_STAT(bank->id)) &
-- bank->bgc.read_reg(reg_base + GIO_MASK(bank->id)))) {
-+ spin_lock_irqsave(&bank->gc.bgpio_lock, flags);
-+ while ((status = bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) &
-+ bank->gc.read_reg(reg_base + GIO_MASK(bank->id)))) {
- int bit;
-
- for_each_set_bit(bit, &status, 32) {
-- u32 stat = bank->bgc.read_reg(reg_base +
-+ u32 stat = bank->gc.read_reg(reg_base +
- GIO_STAT(bank->id));
- if (bit >= bank->width)
- dev_warn(&priv->pdev->dev,
- "IRQ for invalid GPIO (bank=%d, offset=%d)\n",
- bank->id, bit);
-- bank->bgc.write_reg(reg_base + GIO_STAT(bank->id),
-+ bank->gc.write_reg(reg_base + GIO_STAT(bank->id),
- stat | BIT(bit));
- generic_handle_irq(irq_find_mapping(irq_domain, bit));
- }
- }
-- spin_unlock_irqrestore(&bank->bgc.lock, flags);
-+ spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags);
- }
-
- /* Each UPG GIO block has one IRQ for all banks */
-@@ -303,9 +295,7 @@ static int brcmstb_gpio_remove(struct pl
- */
- list_for_each(pos, &priv->bank_list) {
- bank = list_entry(pos, struct brcmstb_gpio_bank, node);
-- ret = bgpio_remove(&bank->bgc);
-- if (ret)
-- dev_err(&pdev->dev, "gpiochip_remove fail in cleanup\n");
-+ gpiochip_remove(&bank->gc);
- }
- if (priv->reboot_notifier.notifier_call) {
- ret = unregister_reboot_notifier(&priv->reboot_notifier);
-@@ -320,7 +310,7 @@ static int brcmstb_gpio_of_xlate(struct
- const struct of_phandle_args *gpiospec, u32 *flags)
- {
- struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
-- struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
-+ struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
- int offset;
-
- if (gc->of_gpio_n_cells != 2) {
-@@ -398,9 +388,9 @@ static int brcmstb_gpio_irq_setup(struct
- if (priv->can_wake)
- bank->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake;
-
-- gpiochip_irqchip_add(&bank->bgc.gc, &bank->irq_chip, 0,
-+ gpiochip_irqchip_add(&bank->gc, &bank->irq_chip, 0,
- handle_simple_irq, IRQ_TYPE_NONE);
-- gpiochip_set_chained_irqchip(&bank->bgc.gc, &bank->irq_chip,
-+ gpiochip_set_chained_irqchip(&bank->gc, &bank->irq_chip,
- priv->parent_irq, brcmstb_gpio_irq_handler);
-
- return 0;
-@@ -451,7 +441,6 @@ static int brcmstb_gpio_probe(struct pla
- of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p,
- bank_width) {
- struct brcmstb_gpio_bank *bank;
-- struct bgpio_chip *bgc;
- struct gpio_chip *gc;
-
- bank = devm_kzalloc(dev, sizeof(*bank), GFP_KERNEL);
-@@ -473,8 +462,8 @@ static int brcmstb_gpio_probe(struct pla
- * Regs are 4 bytes wide, have data reg, no set/clear regs,
- * and direction bits have 0 = output and 1 = input
- */
-- bgc = &bank->bgc;
-- err = bgpio_init(bgc, dev, 4,
-+ gc = &bank->gc;
-+ err = bgpio_init(gc, dev, 4,
- reg_base + GIO_DATA(bank->id),
- NULL, NULL, NULL,
- reg_base + GIO_IODIR(bank->id), 0);
-@@ -483,7 +472,6 @@ static int brcmstb_gpio_probe(struct pla
- goto fail;
- }
-
-- gc = &bgc->gc;
- gc->of_node = np;
- gc->owner = THIS_MODULE;
- gc->label = np->full_name;
-@@ -497,9 +485,9 @@ static int brcmstb_gpio_probe(struct pla
- * Mask all interrupts by default, since wakeup interrupts may
- * be retained from S5 cold boot
- */
-- bank->bgc.write_reg(reg_base + GIO_MASK(bank->id), 0);
-+ gc->write_reg(reg_base + GIO_MASK(bank->id), 0);
-
-- err = gpiochip_add(gc);
-+ err = gpiochip_add_data(gc, bank);
- if (err) {
- dev_err(dev, "Could not add gpiochip for bank %d\n",
- bank->id);
---- a/drivers/gpio/gpio-clps711x.c
-+++ b/drivers/gpio/gpio-clps711x.c
-@@ -10,24 +10,23 @@
- */
-
- #include <linux/err.h>
--#include <linux/gpio.h>
- #include <linux/module.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/platform_device.h>
-
- static int clps711x_gpio_probe(struct platform_device *pdev)
- {
- struct device_node *np = pdev->dev.of_node;
- void __iomem *dat, *dir;
-- struct bgpio_chip *bgc;
-+ struct gpio_chip *gc;
- struct resource *res;
- int err, id = np ? of_alias_get_id(np, "gpio") : pdev->id;
-
- if ((id < 0) || (id > 4))
- return -ENODEV;
-
-- bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL);
-- if (!bgc)
-+ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
-+ if (!gc)
- return -ENOMEM;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-@@ -43,11 +42,11 @@ static int clps711x_gpio_probe(struct pl
- switch (id) {
- case 3:
- /* PORTD is inverted logic for direction register */
-- err = bgpio_init(bgc, &pdev->dev, 1, dat, NULL, NULL,
-+ err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL,
- NULL, dir, 0);
- break;
- default:
-- err = bgpio_init(bgc, &pdev->dev, 1, dat, NULL, NULL,
-+ err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL,
- dir, NULL, 0);
- break;
- }
-@@ -58,24 +57,25 @@ static int clps711x_gpio_probe(struct pl
- switch (id) {
- case 4:
- /* PORTE is 3 lines only */
-- bgc->gc.ngpio = 3;
-+ gc->ngpio = 3;
- break;
- default:
- break;
- }
-
-- bgc->gc.base = id * 8;
-- bgc->gc.owner = THIS_MODULE;
-- platform_set_drvdata(pdev, bgc);
-+ gc->base = id * 8;
-+ gc->owner = THIS_MODULE;
-+ platform_set_drvdata(pdev, gc);
-
-- return gpiochip_add(&bgc->gc);
-+ return gpiochip_add_data(gc, NULL);
- }
-
- static int clps711x_gpio_remove(struct platform_device *pdev)
- {
-- struct bgpio_chip *bgc = platform_get_drvdata(pdev);
-+ struct gpio_chip *gc = platform_get_drvdata(pdev);
-
-- return bgpio_remove(bgc);
-+ gpiochip_remove(gc);
-+ return 0;
- }
-
- static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = {
---- a/drivers/gpio/gpio-dwapb.c
-+++ b/drivers/gpio/gpio-dwapb.c
-@@ -7,7 +7,9 @@
- *
- * All enquiries to support@picochip.com
- */
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
-+/* FIXME: for gpio_get_value(), replace this with direct register read */
-+#include <linux/gpio.h>
- #include <linux/err.h>
- #include <linux/init.h>
- #include <linux/interrupt.h>
-@@ -66,7 +68,7 @@ struct dwapb_context {
- #endif
-
- struct dwapb_gpio_port {
-- struct bgpio_chip bgc;
-+ struct gpio_chip gc;
- bool is_registered;
- struct dwapb_gpio *gpio;
- #ifdef CONFIG_PM_SLEEP
-@@ -83,33 +85,26 @@ struct dwapb_gpio {
- struct irq_domain *domain;
- };
-
--static inline struct dwapb_gpio_port *
--to_dwapb_gpio_port(struct bgpio_chip *bgc)
--{
-- return container_of(bgc, struct dwapb_gpio_port, bgc);
--}
--
- static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
- {
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
- void __iomem *reg_base = gpio->regs;
-
-- return bgc->read_reg(reg_base + offset);
-+ return gc->read_reg(reg_base + offset);
- }
-
- static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset,
- u32 val)
- {
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
- void __iomem *reg_base = gpio->regs;
-
-- bgc->write_reg(reg_base + offset, val);
-+ gc->write_reg(reg_base + offset, val);
- }
-
- static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
-+ struct dwapb_gpio_port *port = gpiochip_get_data(gc);
- struct dwapb_gpio *gpio = port->gpio;
-
- return irq_find_mapping(gpio->domain, offset);
-@@ -119,7 +114,7 @@ static void dwapb_toggle_trigger(struct
- {
- u32 v = dwapb_read(gpio, GPIO_INT_POLARITY);
-
-- if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs))
-+ if (gpio_get_value(gpio->ports[0].gc.base + offs))
- v &= ~BIT(offs);
- else
- v |= BIT(offs);
-@@ -162,39 +157,39 @@ static void dwapb_irq_enable(struct irq_
- {
- struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
- struct dwapb_gpio *gpio = igc->private;
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
- unsigned long flags;
- u32 val;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
- val = dwapb_read(gpio, GPIO_INTEN);
- val |= BIT(d->hwirq);
- dwapb_write(gpio, GPIO_INTEN, val);
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
- }
-
- static void dwapb_irq_disable(struct irq_data *d)
- {
- struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
- struct dwapb_gpio *gpio = igc->private;
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
- unsigned long flags;
- u32 val;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
- val = dwapb_read(gpio, GPIO_INTEN);
- val &= ~BIT(d->hwirq);
- dwapb_write(gpio, GPIO_INTEN, val);
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
- }
-
- static int dwapb_irq_reqres(struct irq_data *d)
- {
- struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
- struct dwapb_gpio *gpio = igc->private;
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
-
-- if (gpiochip_lock_as_irq(&bgc->gc, irqd_to_hwirq(d))) {
-+ if (gpiochip_lock_as_irq(gc, irqd_to_hwirq(d))) {
- dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n",
- irqd_to_hwirq(d));
- return -EINVAL;
-@@ -206,16 +201,16 @@ static void dwapb_irq_relres(struct irq_
- {
- struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
- struct dwapb_gpio *gpio = igc->private;
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
-
-- gpiochip_unlock_as_irq(&bgc->gc, irqd_to_hwirq(d));
-+ gpiochip_unlock_as_irq(gc, irqd_to_hwirq(d));
- }
-
- static int dwapb_irq_set_type(struct irq_data *d, u32 type)
- {
- struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
- struct dwapb_gpio *gpio = igc->private;
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
- int bit = d->hwirq;
- unsigned long level, polarity, flags;
-
-@@ -223,7 +218,7 @@ static int dwapb_irq_set_type(struct irq
- IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
- return -EINVAL;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
- level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
- polarity = dwapb_read(gpio, GPIO_INT_POLARITY);
-
-@@ -254,7 +249,7 @@ static int dwapb_irq_set_type(struct irq
-
- dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
- dwapb_write(gpio, GPIO_INT_POLARITY, polarity);
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
- return 0;
- }
-@@ -262,13 +257,12 @@ static int dwapb_irq_set_type(struct irq
- static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
- unsigned offset, unsigned debounce)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
-+ struct dwapb_gpio_port *port = gpiochip_get_data(gc);
- struct dwapb_gpio *gpio = port->gpio;
- unsigned long flags, val_deb;
-- unsigned long mask = bgc->pin2mask(bgc, offset);
-+ unsigned long mask = gc->pin2mask(gc, offset);
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-
- val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
- if (debounce)
-@@ -276,7 +270,7 @@ static int dwapb_gpio_set_debounce(struc
- else
- dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask);
-
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
- return 0;
- }
-@@ -295,7 +289,7 @@ static void dwapb_configure_irqs(struct
- struct dwapb_gpio_port *port,
- struct dwapb_port_property *pp)
- {
-- struct gpio_chip *gc = &port->bgc.gc;
-+ struct gpio_chip *gc = &port->gc;
- struct device_node *node = pp->node;
- struct irq_chip_generic *irq_gc = NULL;
- unsigned int hwirq, ngpio = gc->ngpio;
-@@ -369,13 +363,13 @@ static void dwapb_configure_irqs(struct
- for (hwirq = 0 ; hwirq < ngpio ; hwirq++)
- irq_create_mapping(gpio->domain, hwirq);
-
-- port->bgc.gc.to_irq = dwapb_gpio_to_irq;
-+ port->gc.to_irq = dwapb_gpio_to_irq;
- }
-
- static void dwapb_irq_teardown(struct dwapb_gpio *gpio)
- {
- struct dwapb_gpio_port *port = &gpio->ports[0];
-- struct gpio_chip *gc = &port->bgc.gc;
-+ struct gpio_chip *gc = &port->gc;
- unsigned int ngpio = gc->ngpio;
- irq_hw_number_t hwirq;
-
-@@ -412,7 +406,7 @@ static int dwapb_gpio_add_port(struct dw
- dirout = gpio->regs + GPIO_SWPORTA_DDR +
- (pp->idx * GPIO_SWPORT_DDR_SIZE);
-
-- err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout,
-+ err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout,
- NULL, false);
- if (err) {
- dev_err(gpio->dev, "failed to init gpio chip for %s\n",
-@@ -421,19 +415,19 @@ static int dwapb_gpio_add_port(struct dw
- }
-
- #ifdef CONFIG_OF_GPIO
-- port->bgc.gc.of_node = pp->node;
-+ port->gc.of_node = pp->node;
- #endif
-- port->bgc.gc.ngpio = pp->ngpio;
-- port->bgc.gc.base = pp->gpio_base;
-+ port->gc.ngpio = pp->ngpio;
-+ port->gc.base = pp->gpio_base;
-
- /* Only port A support debounce */
- if (pp->idx == 0)
-- port->bgc.gc.set_debounce = dwapb_gpio_set_debounce;
-+ port->gc.set_debounce = dwapb_gpio_set_debounce;
-
- if (pp->irq)
- dwapb_configure_irqs(gpio, port, pp);
-
-- err = gpiochip_add(&port->bgc.gc);
-+ err = gpiochip_add_data(&port->gc, port);
- if (err)
- dev_err(gpio->dev, "failed to register gpiochip for %s\n",
- pp->name);
-@@ -449,7 +443,7 @@ static void dwapb_gpio_unregister(struct
-
- for (m = 0; m < gpio->nr_ports; ++m)
- if (gpio->ports[m].is_registered)
-- gpiochip_remove(&gpio->ports[m].bgc.gc);
-+ gpiochip_remove(&gpio->ports[m].gc);
- }
-
- static struct dwapb_platform_data *
-@@ -591,11 +585,11 @@ static int dwapb_gpio_suspend(struct dev
- {
- struct platform_device *pdev = to_platform_device(dev);
- struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
- unsigned long flags;
- int i;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
- for (i = 0; i < gpio->nr_ports; i++) {
- unsigned int offset;
- unsigned int idx = gpio->ports[i].idx;
-@@ -624,7 +618,7 @@ static int dwapb_gpio_suspend(struct dev
- dwapb_write(gpio, GPIO_INTMASK, 0xffffffff);
- }
- }
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
- return 0;
- }
-@@ -633,11 +627,11 @@ static int dwapb_gpio_resume(struct devi
- {
- struct platform_device *pdev = to_platform_device(dev);
- struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
-- struct bgpio_chip *bgc = &gpio->ports[0].bgc;
-+ struct gpio_chip *gc = &gpio->ports[0].gc;
- unsigned long flags;
- int i;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
- for (i = 0; i < gpio->nr_ports; i++) {
- unsigned int offset;
- unsigned int idx = gpio->ports[i].idx;
-@@ -666,7 +660,7 @@ static int dwapb_gpio_resume(struct devi
- dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff);
- }
- }
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
- return 0;
- }
---- a/drivers/gpio/gpio-ep93xx.c
-+++ b/drivers/gpio/gpio-ep93xx.c
-@@ -16,10 +16,11 @@
- #include <linux/module.h>
- #include <linux/platform_device.h>
- #include <linux/io.h>
--#include <linux/gpio.h>
- #include <linux/irq.h>
- #include <linux/slab.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
-+/* FIXME: this is here for gpio_to_irq() - get rid of this! */
-+#include <linux/gpio.h>
-
- #include <mach/hardware.h>
- #include <mach/gpio-ep93xx.h>
-@@ -28,7 +29,7 @@
-
- struct ep93xx_gpio {
- void __iomem *mmio_base;
-- struct bgpio_chip bgc[8];
-+ struct gpio_chip gc[8];
- };
-
- /*************************************************************************
-@@ -319,26 +320,26 @@ static int ep93xx_gpio_to_irq(struct gpi
- return 64 + gpio;
- }
-
--static int ep93xx_gpio_add_bank(struct bgpio_chip *bgc, struct device *dev,
-+static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev,
- void __iomem *mmio_base, struct ep93xx_gpio_bank *bank)
- {
- void __iomem *data = mmio_base + bank->data;
- void __iomem *dir = mmio_base + bank->dir;
- int err;
-
-- err = bgpio_init(bgc, dev, 1, data, NULL, NULL, dir, NULL, 0);
-+ err = bgpio_init(gc, dev, 1, data, NULL, NULL, dir, NULL, 0);
- if (err)
- return err;
-
-- bgc->gc.label = bank->label;
-- bgc->gc.base = bank->base;
-+ gc->label = bank->label;
-+ gc->base = bank->base;
-
- if (bank->has_debounce) {
-- bgc->gc.set_debounce = ep93xx_gpio_set_debounce;
-- bgc->gc.to_irq = ep93xx_gpio_to_irq;
-+ gc->set_debounce = ep93xx_gpio_set_debounce;
-+ gc->to_irq = ep93xx_gpio_to_irq;
- }
-
-- return gpiochip_add(&bgc->gc);
-+ return gpiochip_add_data(gc, NULL);
- }
-
- static int ep93xx_gpio_probe(struct platform_device *pdev)
-@@ -358,10 +359,10 @@ static int ep93xx_gpio_probe(struct plat
- return PTR_ERR(ep93xx_gpio->mmio_base);
-
- for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) {
-- struct bgpio_chip *bgc = &ep93xx_gpio->bgc[i];
-+ struct gpio_chip *gc = &ep93xx_gpio->gc[i];
- struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i];
-
-- if (ep93xx_gpio_add_bank(bgc, &pdev->dev,
-+ if (ep93xx_gpio_add_bank(gc, &pdev->dev,
- ep93xx_gpio->mmio_base, bank))
- dev_warn(&pdev->dev, "Unable to add gpio bank %s\n",
- bank->label);
---- a/drivers/gpio/gpio-etraxfs.c
-+++ b/drivers/gpio/gpio-etraxfs.c
-@@ -1,12 +1,10 @@
- #include <linux/kernel.h>
- #include <linux/init.h>
--#include <linux/gpio.h>
- #include <linux/gpio/driver.h>
- #include <linux/of_gpio.h>
- #include <linux/io.h>
- #include <linux/interrupt.h>
- #include <linux/platform_device.h>
--#include <linux/basic_mmio_gpio.h>
-
- #define ETRAX_FS_rw_pa_dout 0
- #define ETRAX_FS_r_pa_din 4
-@@ -67,7 +65,7 @@ struct etraxfs_gpio_block {
- };
-
- struct etraxfs_gpio_chip {
-- struct bgpio_chip bgc;
-+ struct gpio_chip gc;
- struct etraxfs_gpio_block *block;
- };
-
-@@ -176,11 +174,6 @@ static const struct etraxfs_gpio_info et
- .rw_intr_pins = ARTPEC3_rw_intr_pins,
- };
-
--static struct etraxfs_gpio_chip *to_etraxfs(struct gpio_chip *gc)
--{
-- return container_of(gc, struct etraxfs_gpio_chip, bgc.gc);
--}
--
- static unsigned int etraxfs_gpio_chip_to_port(struct gpio_chip *gc)
- {
- return gc->label[0] - 'A';
-@@ -220,13 +213,13 @@ static unsigned int etraxfs_gpio_to_grou
- static unsigned int etraxfs_gpio_to_group_pin(struct etraxfs_gpio_chip *chip,
- unsigned int gpio)
- {
-- return 4 * etraxfs_gpio_chip_to_port(&chip->bgc.gc) + gpio / 8;
-+ return 4 * etraxfs_gpio_chip_to_port(&chip->gc) + gpio / 8;
- }
-
- static void etraxfs_gpio_irq_ack(struct irq_data *d)
- {
- struct etraxfs_gpio_chip *chip =
-- to_etraxfs(irq_data_get_irq_chip_data(d));
-+ gpiochip_get_data(irq_data_get_irq_chip_data(d));
- struct etraxfs_gpio_block *block = chip->block;
- unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
-
-@@ -236,7 +229,7 @@ static void etraxfs_gpio_irq_ack(struct
- static void etraxfs_gpio_irq_mask(struct irq_data *d)
- {
- struct etraxfs_gpio_chip *chip =
-- to_etraxfs(irq_data_get_irq_chip_data(d));
-+ gpiochip_get_data(irq_data_get_irq_chip_data(d));
- struct etraxfs_gpio_block *block = chip->block;
- unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
-
-@@ -249,7 +242,7 @@ static void etraxfs_gpio_irq_mask(struct
- static void etraxfs_gpio_irq_unmask(struct irq_data *d)
- {
- struct etraxfs_gpio_chip *chip =
-- to_etraxfs(irq_data_get_irq_chip_data(d));
-+ gpiochip_get_data(irq_data_get_irq_chip_data(d));
- struct etraxfs_gpio_block *block = chip->block;
- unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
-
-@@ -262,7 +255,7 @@ static void etraxfs_gpio_irq_unmask(stru
- static int etraxfs_gpio_irq_set_type(struct irq_data *d, u32 type)
- {
- struct etraxfs_gpio_chip *chip =
-- to_etraxfs(irq_data_get_irq_chip_data(d));
-+ gpiochip_get_data(irq_data_get_irq_chip_data(d));
- struct etraxfs_gpio_block *block = chip->block;
- unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
- u32 cfg;
-@@ -299,7 +292,7 @@ static int etraxfs_gpio_irq_set_type(str
- static int etraxfs_gpio_irq_request_resources(struct irq_data *d)
- {
- struct etraxfs_gpio_chip *chip =
-- to_etraxfs(irq_data_get_irq_chip_data(d));
-+ gpiochip_get_data(irq_data_get_irq_chip_data(d));
- struct etraxfs_gpio_block *block = chip->block;
- unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
- int ret = -EBUSY;
-@@ -308,7 +301,7 @@ static int etraxfs_gpio_irq_request_reso
- if (block->group[grpirq])
- goto out;
-
-- ret = gpiochip_lock_as_irq(&chip->bgc.gc, d->hwirq);
-+ ret = gpiochip_lock_as_irq(&chip->gc, d->hwirq);
- if (ret)
- goto out;
-
-@@ -330,13 +323,13 @@ out:
- static void etraxfs_gpio_irq_release_resources(struct irq_data *d)
- {
- struct etraxfs_gpio_chip *chip =
-- to_etraxfs(irq_data_get_irq_chip_data(d));
-+ gpiochip_get_data(irq_data_get_irq_chip_data(d));
- struct etraxfs_gpio_block *block = chip->block;
- unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
-
- spin_lock(&block->lock);
- block->group[grpirq] = 0;
-- gpiochip_unlock_as_irq(&chip->bgc.gc, d->hwirq);
-+ gpiochip_unlock_as_irq(&chip->gc, d->hwirq);
- spin_unlock(&block->lock);
- }
-
-@@ -419,7 +412,7 @@ static int etraxfs_gpio_probe(struct pla
-
- for (i = 0; i < info->num_ports; i++) {
- struct etraxfs_gpio_chip *chip = &chips[i];
-- struct bgpio_chip *bgc = &chip->bgc;
-+ struct gpio_chip *gc = &chip->gc;
- const struct etraxfs_gpio_port *port = &info->ports[i];
- unsigned long flags = BGPIOF_READ_OUTPUT_REG_SET;
- void __iomem *dat = regs + port->din;
-@@ -433,7 +426,7 @@ static int etraxfs_gpio_probe(struct pla
- flags = BGPIOF_NO_OUTPUT;
- }
-
-- ret = bgpio_init(bgc, dev, 4,
-+ ret = bgpio_init(gc, dev, 4,
- dat, set, NULL, dirout, NULL,
- flags);
- if (ret) {
-@@ -442,28 +435,28 @@ static int etraxfs_gpio_probe(struct pla
- continue;
- }
-
-- bgc->gc.ngpio = port->ngpio;
-- bgc->gc.label = port->label;
-+ gc->ngpio = port->ngpio;
-+ gc->label = port->label;
-
-- bgc->gc.of_node = dev->of_node;
-- bgc->gc.of_gpio_n_cells = 3;
-- bgc->gc.of_xlate = etraxfs_gpio_of_xlate;
-+ gc->of_node = dev->of_node;
-+ gc->of_gpio_n_cells = 3;
-+ gc->of_xlate = etraxfs_gpio_of_xlate;
-
-- ret = gpiochip_add(&bgc->gc);
-+ ret = gpiochip_add_data(gc, chip);
- if (ret) {
- dev_err(dev, "Unable to register port %s\n",
-- bgc->gc.label);
-+ gc->label);
- continue;
- }
-
- if (i > 0 && !allportsirq)
- continue;
-
-- ret = gpiochip_irqchip_add(&bgc->gc, &etraxfs_gpio_irq_chip, 0,
-+ ret = gpiochip_irqchip_add(gc, &etraxfs_gpio_irq_chip, 0,
- handle_level_irq, IRQ_TYPE_NONE);
- if (ret) {
- dev_err(dev, "Unable to add irqchip to port %s\n",
-- bgc->gc.label);
-+ gc->label);
- }
- }
-
---- a/drivers/gpio/gpio-ge.c
-+++ b/drivers/gpio/gpio-ge.c
-@@ -24,7 +24,7 @@
- #include <linux/of_gpio.h>
- #include <linux/of_address.h>
- #include <linux/module.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
-
- #define GEF_GPIO_DIRECT 0x00
- #define GEF_GPIO_IN 0x04
-@@ -55,19 +55,19 @@ static int __init gef_gpio_probe(struct
- {
- const struct of_device_id *of_id =
- of_match_device(gef_gpio_ids, &pdev->dev);
-- struct bgpio_chip *bgc;
-+ struct gpio_chip *gc;
- void __iomem *regs;
- int ret;
-
-- bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL);
-- if (!bgc)
-+ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
-+ if (!gc)
- return -ENOMEM;
-
- regs = of_iomap(pdev->dev.of_node, 0);
- if (!regs)
- return -ENOMEM;
-
-- ret = bgpio_init(bgc, &pdev->dev, 4, regs + GEF_GPIO_IN,
-+ ret = bgpio_init(gc, &pdev->dev, 4, regs + GEF_GPIO_IN,
- regs + GEF_GPIO_OUT, NULL, NULL,
- regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER);
- if (ret) {
-@@ -76,20 +76,20 @@ static int __init gef_gpio_probe(struct
- }
-
- /* Setup pointers to chip functions */
-- bgc->gc.label = devm_kstrdup(&pdev->dev, pdev->dev.of_node->full_name,
-+ gc->label = devm_kstrdup(&pdev->dev, pdev->dev.of_node->full_name,
- GFP_KERNEL);
-- if (!bgc->gc.label) {
-+ if (!gc->label) {
- ret = -ENOMEM;
- goto err0;
- }
-
-- bgc->gc.base = -1;
-- bgc->gc.ngpio = (u16)(uintptr_t)of_id->data;
-- bgc->gc.of_gpio_n_cells = 2;
-- bgc->gc.of_node = pdev->dev.of_node;
-+ gc->base = -1;
-+ gc->ngpio = (u16)(uintptr_t)of_id->data;
-+ gc->of_gpio_n_cells = 2;
-+ gc->of_node = pdev->dev.of_node;
-
- /* This function adds a memory mapped GPIO chip */
-- ret = gpiochip_add(&bgc->gc);
-+ ret = gpiochip_add_data(gc, NULL);
- if (ret)
- goto err0;
-
---- a/drivers/gpio/gpio-generic.c
-+++ b/drivers/gpio/gpio-generic.c
-@@ -56,11 +56,10 @@ o ` ~~~~\___/
- #include <linux/log2.h>
- #include <linux/ioport.h>
- #include <linux/io.h>
--#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/slab.h>
- #include <linux/platform_device.h>
- #include <linux/mod_devicetable.h>
--#include <linux/basic_mmio_gpio.h>
-
- static void bgpio_write8(void __iomem *reg, unsigned long data)
- {
-@@ -124,33 +123,30 @@ static unsigned long bgpio_read32be(void
- return ioread32be(reg);
- }
-
--static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin)
-+static unsigned long bgpio_pin2mask(struct gpio_chip *gc, unsigned int pin)
- {
- return 1 << pin;
- }
-
--static unsigned long bgpio_pin2mask_be(struct bgpio_chip *bgc,
-+static unsigned long bgpio_pin2mask_be(struct gpio_chip *gc,
- unsigned int pin)
- {
-- return 1 << (bgc->bits - 1 - pin);
-+ return 1 << (gc->bgpio_bits - 1 - pin);
- }
-
- static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- unsigned long pinmask = bgc->pin2mask(bgc, gpio);
-+ unsigned long pinmask = gc->pin2mask(gc, gpio);
-
-- if (bgc->dir & pinmask)
-- return !!(bgc->read_reg(bgc->reg_set) & pinmask);
-+ if (gc->bgpio_dir & pinmask)
-+ return !!(gc->read_reg(gc->reg_set) & pinmask);
- else
-- return !!(bgc->read_reg(bgc->reg_dat) & pinmask);
-+ return !!(gc->read_reg(gc->reg_dat) & pinmask);
- }
-
- static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
--
-- return !!(bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio));
-+ return !!(gc->read_reg(gc->reg_dat) & gc->pin2mask(gc, gpio));
- }
-
- static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val)
-@@ -159,53 +155,50 @@ static void bgpio_set_none(struct gpio_c
-
- static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- unsigned long mask = bgc->pin2mask(bgc, gpio);
-+ unsigned long mask = gc->pin2mask(gc, gpio);
- unsigned long flags;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-
- if (val)
-- bgc->data |= mask;
-+ gc->bgpio_data |= mask;
- else
-- bgc->data &= ~mask;
-+ gc->bgpio_data &= ~mask;
-
-- bgc->write_reg(bgc->reg_dat, bgc->data);
-+ gc->write_reg(gc->reg_dat, gc->bgpio_data);
-
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
- }
-
- static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio,
- int val)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- unsigned long mask = bgc->pin2mask(bgc, gpio);
-+ unsigned long mask = gc->pin2mask(gc, gpio);
-
- if (val)
-- bgc->write_reg(bgc->reg_set, mask);
-+ gc->write_reg(gc->reg_set, mask);
- else
-- bgc->write_reg(bgc->reg_clr, mask);
-+ gc->write_reg(gc->reg_clr, mask);
- }
-
- static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- unsigned long mask = bgc->pin2mask(bgc, gpio);
-+ unsigned long mask = gc->pin2mask(gc, gpio);
- unsigned long flags;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-
- if (val)
-- bgc->data |= mask;
-+ gc->bgpio_data |= mask;
- else
-- bgc->data &= ~mask;
-+ gc->bgpio_data &= ~mask;
-
-- bgc->write_reg(bgc->reg_set, bgc->data);
-+ gc->write_reg(gc->reg_set, gc->bgpio_data);
-
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
- }
-
--static void bgpio_multiple_get_masks(struct bgpio_chip *bgc,
-+static void bgpio_multiple_get_masks(struct gpio_chip *gc,
- unsigned long *mask, unsigned long *bits,
- unsigned long *set_mask,
- unsigned long *clear_mask)
-@@ -215,19 +208,19 @@ static void bgpio_multiple_get_masks(str
- *set_mask = 0;
- *clear_mask = 0;
-
-- for (i = 0; i < bgc->bits; i++) {
-+ for (i = 0; i < gc->bgpio_bits; i++) {
- if (*mask == 0)
- break;
- if (__test_and_clear_bit(i, mask)) {
- if (test_bit(i, bits))
-- *set_mask |= bgc->pin2mask(bgc, i);
-+ *set_mask |= gc->pin2mask(gc, i);
- else
-- *clear_mask |= bgc->pin2mask(bgc, i);
-+ *clear_mask |= gc->pin2mask(gc, i);
- }
- }
- }
-
--static void bgpio_set_multiple_single_reg(struct bgpio_chip *bgc,
-+static void bgpio_set_multiple_single_reg(struct gpio_chip *gc,
- unsigned long *mask,
- unsigned long *bits,
- void __iomem *reg)
-@@ -235,47 +228,42 @@ static void bgpio_set_multiple_single_re
- unsigned long flags;
- unsigned long set_mask, clear_mask;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-
-- bgpio_multiple_get_masks(bgc, mask, bits, &set_mask, &clear_mask);
-+ bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
-
-- bgc->data |= set_mask;
-- bgc->data &= ~clear_mask;
-+ gc->bgpio_data |= set_mask;
-+ gc->bgpio_data &= ~clear_mask;
-
-- bgc->write_reg(reg, bgc->data);
-+ gc->write_reg(reg, gc->bgpio_data);
-
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
- }
-
- static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
- unsigned long *bits)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
--
-- bgpio_set_multiple_single_reg(bgc, mask, bits, bgc->reg_dat);
-+ bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat);
- }
-
- static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask,
- unsigned long *bits)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
--
-- bgpio_set_multiple_single_reg(bgc, mask, bits, bgc->reg_set);
-+ bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set);
- }
-
- static void bgpio_set_multiple_with_clear(struct gpio_chip *gc,
- unsigned long *mask,
- unsigned long *bits)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
- unsigned long set_mask, clear_mask;
-
-- bgpio_multiple_get_masks(bgc, mask, bits, &set_mask, &clear_mask);
-+ bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
-
- if (set_mask)
-- bgc->write_reg(bgc->reg_set, set_mask);
-+ gc->write_reg(gc->reg_set, set_mask);
- if (clear_mask)
-- bgc->write_reg(bgc->reg_clr, clear_mask);
-+ gc->write_reg(gc->reg_clr, clear_mask);
- }
-
- static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
-@@ -299,111 +287,103 @@ static int bgpio_simple_dir_out(struct g
-
- static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
- unsigned long flags;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-
-- bgc->dir &= ~bgc->pin2mask(bgc, gpio);
-- bgc->write_reg(bgc->reg_dir, bgc->dir);
-+ gc->bgpio_dir &= ~gc->pin2mask(gc, gpio);
-+ gc->write_reg(gc->reg_dir, gc->bgpio_dir);
-
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
- return 0;
- }
-
- static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
--
-- return (bgc->read_reg(bgc->reg_dir) & bgc->pin2mask(bgc, gpio)) ?
-- GPIOF_DIR_OUT : GPIOF_DIR_IN;
-+ /* Return 0 if output, 1 of input */
-+ return !(gc->read_reg(gc->reg_dir) & gc->pin2mask(gc, gpio));
- }
-
- static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
- unsigned long flags;
-
- gc->set(gc, gpio, val);
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-
-- bgc->dir |= bgc->pin2mask(bgc, gpio);
-- bgc->write_reg(bgc->reg_dir, bgc->dir);
-+ gc->bgpio_dir |= gc->pin2mask(gc, gpio);
-+ gc->write_reg(gc->reg_dir, gc->bgpio_dir);
-
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
- return 0;
- }
-
- static int bgpio_dir_in_inv(struct gpio_chip *gc, unsigned int gpio)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
- unsigned long flags;
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-
-- bgc->dir |= bgc->pin2mask(bgc, gpio);
-- bgc->write_reg(bgc->reg_dir, bgc->dir);
-+ gc->bgpio_dir |= gc->pin2mask(gc, gpio);
-+ gc->write_reg(gc->reg_dir, gc->bgpio_dir);
-
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
- return 0;
- }
-
- static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
- unsigned long flags;
-
- gc->set(gc, gpio, val);
-
-- spin_lock_irqsave(&bgc->lock, flags);
-+ spin_lock_irqsave(&gc->bgpio_lock, flags);
-
-- bgc->dir &= ~bgc->pin2mask(bgc, gpio);
-- bgc->write_reg(bgc->reg_dir, bgc->dir);
-+ gc->bgpio_dir &= ~gc->pin2mask(gc, gpio);
-+ gc->write_reg(gc->reg_dir, gc->bgpio_dir);
-
-- spin_unlock_irqrestore(&bgc->lock, flags);
-+ spin_unlock_irqrestore(&gc->bgpio_lock, flags);
-
- return 0;
- }
-
- static int bgpio_get_dir_inv(struct gpio_chip *gc, unsigned int gpio)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
--
-- return (bgc->read_reg(bgc->reg_dir) & bgc->pin2mask(bgc, gpio)) ?
-- GPIOF_DIR_IN : GPIOF_DIR_OUT;
-+ /* Return 0 if output, 1 if input */
-+ return !!(gc->read_reg(gc->reg_dir) & gc->pin2mask(gc, gpio));
- }
-
- static int bgpio_setup_accessors(struct device *dev,
-- struct bgpio_chip *bgc,
-+ struct gpio_chip *gc,
- bool bit_be,
- bool byte_be)
- {
-
-- switch (bgc->bits) {
-+ switch (gc->bgpio_bits) {
- case 8:
-- bgc->read_reg = bgpio_read8;
-- bgc->write_reg = bgpio_write8;
-+ gc->read_reg = bgpio_read8;
-+ gc->write_reg = bgpio_write8;
- break;
- case 16:
- if (byte_be) {
-- bgc->read_reg = bgpio_read16be;
-- bgc->write_reg = bgpio_write16be;
-+ gc->read_reg = bgpio_read16be;
-+ gc->write_reg = bgpio_write16be;
- } else {
-- bgc->read_reg = bgpio_read16;
-- bgc->write_reg = bgpio_write16;
-+ gc->read_reg = bgpio_read16;
-+ gc->write_reg = bgpio_write16;
- }
- break;
- case 32:
- if (byte_be) {
-- bgc->read_reg = bgpio_read32be;
-- bgc->write_reg = bgpio_write32be;
-+ gc->read_reg = bgpio_read32be;
-+ gc->write_reg = bgpio_write32be;
- } else {
-- bgc->read_reg = bgpio_read32;
-- bgc->write_reg = bgpio_write32;
-+ gc->read_reg = bgpio_read32;
-+ gc->write_reg = bgpio_write32;
- }
- break;
- #if BITS_PER_LONG >= 64
-@@ -413,17 +393,17 @@ static int bgpio_setup_accessors(struct
- "64 bit big endian byte order unsupported\n");
- return -EINVAL;
- } else {
-- bgc->read_reg = bgpio_read64;
-- bgc->write_reg = bgpio_write64;
-+ gc->read_reg = bgpio_read64;
-+ gc->write_reg = bgpio_write64;
- }
- break;
- #endif /* BITS_PER_LONG >= 64 */
- default:
-- dev_err(dev, "unsupported data width %u bits\n", bgc->bits);
-+ dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits);
- return -EINVAL;
- }
-
-- bgc->pin2mask = bit_be ? bgpio_pin2mask_be : bgpio_pin2mask;
-+ gc->pin2mask = bit_be ? bgpio_pin2mask_be : bgpio_pin2mask;
-
- return 0;
- }
-@@ -450,44 +430,44 @@ static int bgpio_setup_accessors(struct
- * - an input direction register (named "dirin") where a 1 bit indicates
- * the GPIO is an input.
- */
--static int bgpio_setup_io(struct bgpio_chip *bgc,
-+static int bgpio_setup_io(struct gpio_chip *gc,
- void __iomem *dat,
- void __iomem *set,
- void __iomem *clr,
- unsigned long flags)
- {
-
-- bgc->reg_dat = dat;
-- if (!bgc->reg_dat)
-+ gc->reg_dat = dat;
-+ if (!gc->reg_dat)
- return -EINVAL;
-
- if (set && clr) {
-- bgc->reg_set = set;
-- bgc->reg_clr = clr;
-- bgc->gc.set = bgpio_set_with_clear;
-- bgc->gc.set_multiple = bgpio_set_multiple_with_clear;
-+ gc->reg_set = set;
-+ gc->reg_clr = clr;
-+ gc->set = bgpio_set_with_clear;
-+ gc->set_multiple = bgpio_set_multiple_with_clear;
- } else if (set && !clr) {
-- bgc->reg_set = set;
-- bgc->gc.set = bgpio_set_set;
-- bgc->gc.set_multiple = bgpio_set_multiple_set;
-+ gc->reg_set = set;
-+ gc->set = bgpio_set_set;
-+ gc->set_multiple = bgpio_set_multiple_set;
- } else if (flags & BGPIOF_NO_OUTPUT) {
-- bgc->gc.set = bgpio_set_none;
-- bgc->gc.set_multiple = NULL;
-+ gc->set = bgpio_set_none;
-+ gc->set_multiple = NULL;
- } else {
-- bgc->gc.set = bgpio_set;
-- bgc->gc.set_multiple = bgpio_set_multiple;
-+ gc->set = bgpio_set;
-+ gc->set_multiple = bgpio_set_multiple;
- }
-
- if (!(flags & BGPIOF_UNREADABLE_REG_SET) &&
- (flags & BGPIOF_READ_OUTPUT_REG_SET))
-- bgc->gc.get = bgpio_get_set;
-+ gc->get = bgpio_get_set;
- else
-- bgc->gc.get = bgpio_get;
-+ gc->get = bgpio_get;
-
- return 0;
- }
-
--static int bgpio_setup_direction(struct bgpio_chip *bgc,
-+static int bgpio_setup_direction(struct gpio_chip *gc,
- void __iomem *dirout,
- void __iomem *dirin,
- unsigned long flags)
-@@ -495,21 +475,21 @@ static int bgpio_setup_direction(struct
- if (dirout && dirin) {
- return -EINVAL;
- } else if (dirout) {
-- bgc->reg_dir = dirout;
-- bgc->gc.direction_output = bgpio_dir_out;
-- bgc->gc.direction_input = bgpio_dir_in;
-- bgc->gc.get_direction = bgpio_get_dir;
-+ gc->reg_dir = dirout;
-+ gc->direction_output = bgpio_dir_out;
-+ gc->direction_input = bgpio_dir_in;
-+ gc->get_direction = bgpio_get_dir;
- } else if (dirin) {
-- bgc->reg_dir = dirin;
-- bgc->gc.direction_output = bgpio_dir_out_inv;
-- bgc->gc.direction_input = bgpio_dir_in_inv;
-- bgc->gc.get_direction = bgpio_get_dir_inv;
-+ gc->reg_dir = dirin;
-+ gc->direction_output = bgpio_dir_out_inv;
-+ gc->direction_input = bgpio_dir_in_inv;
-+ gc->get_direction = bgpio_get_dir_inv;
- } else {
- if (flags & BGPIOF_NO_OUTPUT)
-- bgc->gc.direction_output = bgpio_dir_out_err;
-+ gc->direction_output = bgpio_dir_out_err;
- else
-- bgc->gc.direction_output = bgpio_simple_dir_out;
-- bgc->gc.direction_input = bgpio_simple_dir_in;
-+ gc->direction_output = bgpio_simple_dir_out;
-+ gc->direction_input = bgpio_simple_dir_in;
- }
-
- return 0;
-@@ -523,14 +503,7 @@ static int bgpio_request(struct gpio_chi
- return -EINVAL;
- }
-
--int bgpio_remove(struct bgpio_chip *bgc)
--{
-- gpiochip_remove(&bgc->gc);
-- return 0;
--}
--EXPORT_SYMBOL_GPL(bgpio_remove);
--
--int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
-+int bgpio_init(struct gpio_chip *gc, struct device *dev,
- unsigned long sz, void __iomem *dat, void __iomem *set,
- void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
- unsigned long flags)
-@@ -540,36 +513,36 @@ int bgpio_init(struct bgpio_chip *bgc, s
- if (!is_power_of_2(sz))
- return -EINVAL;
-
-- bgc->bits = sz * 8;
-- if (bgc->bits > BITS_PER_LONG)
-+ gc->bgpio_bits = sz * 8;
-+ if (gc->bgpio_bits > BITS_PER_LONG)
- return -EINVAL;
-
-- spin_lock_init(&bgc->lock);
-- bgc->gc.dev = dev;
-- bgc->gc.label = dev_name(dev);
-- bgc->gc.base = -1;
-- bgc->gc.ngpio = bgc->bits;
-- bgc->gc.request = bgpio_request;
-+ spin_lock_init(&gc->bgpio_lock);
-+ gc->dev = dev;
-+ gc->label = dev_name(dev);
-+ gc->base = -1;
-+ gc->ngpio = gc->bgpio_bits;
-+ gc->request = bgpio_request;
-
-- ret = bgpio_setup_io(bgc, dat, set, clr, flags);
-+ ret = bgpio_setup_io(gc, dat, set, clr, flags);
- if (ret)
- return ret;
-
-- ret = bgpio_setup_accessors(dev, bgc, flags & BGPIOF_BIG_ENDIAN,
-+ ret = bgpio_setup_accessors(dev, gc, flags & BGPIOF_BIG_ENDIAN,
- flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER);
- if (ret)
- return ret;
-
-- ret = bgpio_setup_direction(bgc, dirout, dirin, flags);
-+ ret = bgpio_setup_direction(gc, dirout, dirin, flags);
- if (ret)
- return ret;
-
-- bgc->data = bgc->read_reg(bgc->reg_dat);
-- if (bgc->gc.set == bgpio_set_set &&
-+ gc->bgpio_data = gc->read_reg(gc->reg_dat);
-+ if (gc->set == bgpio_set_set &&
- !(flags & BGPIOF_UNREADABLE_REG_SET))
-- bgc->data = bgc->read_reg(bgc->reg_set);
-- if (bgc->reg_dir && !(flags & BGPIOF_UNREADABLE_REG_DIR))
-- bgc->dir = bgc->read_reg(bgc->reg_dir);
-+ gc->bgpio_data = gc->read_reg(gc->reg_set);
-+ if (gc->reg_dir && !(flags & BGPIOF_UNREADABLE_REG_DIR))
-+ gc->bgpio_dir = gc->read_reg(gc->reg_dir);
-
- return ret;
- }
-@@ -607,7 +580,7 @@ static int bgpio_pdev_probe(struct platf
- unsigned long sz;
- unsigned long flags = pdev->id_entry->driver_data;
- int err;
-- struct bgpio_chip *bgc;
-+ struct gpio_chip *gc;
- struct bgpio_pdata *pdata = dev_get_platdata(dev);
-
- r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
-@@ -636,32 +609,33 @@ static int bgpio_pdev_probe(struct platf
- if (IS_ERR(dirin))
- return PTR_ERR(dirin);
-
-- bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL);
-- if (!bgc)
-+ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
-+ if (!gc)
- return -ENOMEM;
-
-- err = bgpio_init(bgc, dev, sz, dat, set, clr, dirout, dirin, flags);
-+ err = bgpio_init(gc, dev, sz, dat, set, clr, dirout, dirin, flags);
- if (err)
- return err;
-
- if (pdata) {
- if (pdata->label)
-- bgc->gc.label = pdata->label;
-- bgc->gc.base = pdata->base;
-+ gc->label = pdata->label;
-+ gc->base = pdata->base;
- if (pdata->ngpio > 0)
-- bgc->gc.ngpio = pdata->ngpio;
-+ gc->ngpio = pdata->ngpio;
- }
-
-- platform_set_drvdata(pdev, bgc);
-+ platform_set_drvdata(pdev, gc);
-
-- return gpiochip_add(&bgc->gc);
-+ return gpiochip_add_data(gc, NULL);
- }
-
- static int bgpio_pdev_remove(struct platform_device *pdev)
- {
-- struct bgpio_chip *bgc = platform_get_drvdata(pdev);
-+ struct gpio_chip *gc = platform_get_drvdata(pdev);
-
-- return bgpio_remove(bgc);
-+ gpiochip_remove(gc);
-+ return 0;
- }
-
- static const struct platform_device_id bgpio_id_table[] = {
---- a/drivers/gpio/gpio-grgpio.c
-+++ b/drivers/gpio/gpio-grgpio.c
-@@ -31,7 +31,7 @@
- #include <linux/gpio.h>
- #include <linux/slab.h>
- #include <linux/err.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/interrupt.h>
- #include <linux/irq.h>
- #include <linux/irqdomain.h>
-@@ -63,7 +63,7 @@ struct grgpio_lirq {
- };
-
- struct grgpio_priv {
-- struct bgpio_chip bgc;
-+ struct gpio_chip gc;
- void __iomem *regs;
- struct device *dev;
-
-@@ -92,29 +92,22 @@ struct grgpio_priv {
- struct grgpio_lirq lirqs[GRGPIO_MAX_NGPIO];
- };
-
--static inline struct grgpio_priv *grgpio_gc_to_priv(struct gpio_chip *gc)
--{
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
--
-- return container_of(bgc, struct grgpio_priv, bgc);
--}
--
- static void grgpio_set_imask(struct grgpio_priv *priv, unsigned int offset,
- int val)
- {
-- struct bgpio_chip *bgc = &priv->bgc;
-- unsigned long mask = bgc->pin2mask(bgc, offset);
-+ struct gpio_chip *gc = &priv->gc;
-+ unsigned long mask = gc->pin2mask(gc, offset);
-
- if (val)
- priv->imask |= mask;
- else
- priv->imask &= ~mask;
-- bgc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask);
-+ gc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask);
- }
-
- static int grgpio_to_irq(struct gpio_chip *gc, unsigned offset)
- {
-- struct grgpio_priv *priv = grgpio_gc_to_priv(gc);
-+ struct grgpio_priv *priv = gpiochip_get_data(gc);
-
- if (offset >= gc->ngpio)
- return -ENXIO;
-@@ -158,15 +151,15 @@ static int grgpio_irq_set_type(struct ir
- return -EINVAL;
- }
-
-- spin_lock_irqsave(&priv->bgc.lock, flags);
-+ spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
-
-- ipol = priv->bgc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask;
-- iedge = priv->bgc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask;
-+ ipol = priv->gc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask;
-+ iedge = priv->gc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask;
-
-- priv->bgc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol);
-- priv->bgc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge);
-+ priv->gc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol);
-+ priv->gc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge);
-
-- spin_unlock_irqrestore(&priv->bgc.lock, flags);
-+ spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
-
- return 0;
- }
-@@ -177,11 +170,11 @@ static void grgpio_irq_mask(struct irq_d
- int offset = d->hwirq;
- unsigned long flags;
-
-- spin_lock_irqsave(&priv->bgc.lock, flags);
-+ spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
-
- grgpio_set_imask(priv, offset, 0);
-
-- spin_unlock_irqrestore(&priv->bgc.lock, flags);
-+ spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
- }
-
- static void grgpio_irq_unmask(struct irq_data *d)
-@@ -190,11 +183,11 @@ static void grgpio_irq_unmask(struct irq
- int offset = d->hwirq;
- unsigned long flags;
-
-- spin_lock_irqsave(&priv->bgc.lock, flags);
-+ spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
-
- grgpio_set_imask(priv, offset, 1);
-
-- spin_unlock_irqrestore(&priv->bgc.lock, flags);
-+ spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
- }
-
- static struct irq_chip grgpio_irq_chip = {
-@@ -207,12 +200,12 @@ static struct irq_chip grgpio_irq_chip =
- static irqreturn_t grgpio_irq_handler(int irq, void *dev)
- {
- struct grgpio_priv *priv = dev;
-- int ngpio = priv->bgc.gc.ngpio;
-+ int ngpio = priv->gc.ngpio;
- unsigned long flags;
- int i;
- int match = 0;
-
-- spin_lock_irqsave(&priv->bgc.lock, flags);
-+ spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
-
- /*
- * For each gpio line, call its interrupt handler if it its underlying
-@@ -228,7 +221,7 @@ static irqreturn_t grgpio_irq_handler(in
- }
- }
-
-- spin_unlock_irqrestore(&priv->bgc.lock, flags);
-+ spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
-
- if (!match)
- dev_warn(priv->dev, "No gpio line matched irq %d\n", irq);
-@@ -260,7 +253,7 @@ static int grgpio_irq_map(struct irq_dom
- dev_dbg(priv->dev, "Mapping irq %d for gpio line %d\n",
- irq, offset);
-
-- spin_lock_irqsave(&priv->bgc.lock, flags);
-+ spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
-
- /* Request underlying irq if not already requested */
- lirq->irq = irq;
-@@ -273,14 +266,14 @@ static int grgpio_irq_map(struct irq_dom
- "Could not request underlying irq %d\n",
- uirq->uirq);
-
-- spin_unlock_irqrestore(&priv->bgc.lock, flags);
-+ spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
-
- return ret;
- }
- }
- uirq->refcnt++;
-
-- spin_unlock_irqrestore(&priv->bgc.lock, flags);
-+ spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
-
- /* Setup irq */
- irq_set_chip_data(irq, priv);
-@@ -298,13 +291,13 @@ static void grgpio_irq_unmap(struct irq_
- struct grgpio_lirq *lirq;
- struct grgpio_uirq *uirq;
- unsigned long flags;
-- int ngpio = priv->bgc.gc.ngpio;
-+ int ngpio = priv->gc.ngpio;
- int i;
-
- irq_set_chip_and_handler(irq, NULL, NULL);
- irq_set_chip_data(irq, NULL);
-
-- spin_lock_irqsave(&priv->bgc.lock, flags);
-+ spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
-
- /* Free underlying irq if last user unmapped */
- index = -1;
-@@ -326,7 +319,7 @@ static void grgpio_irq_unmap(struct irq_
- free_irq(uirq->uirq, priv);
- }
-
-- spin_unlock_irqrestore(&priv->bgc.lock, flags);
-+ spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
- }
-
- static const struct irq_domain_ops grgpio_irq_domain_ops = {
-@@ -341,7 +334,6 @@ static int grgpio_probe(struct platform_
- struct device_node *np = ofdev->dev.of_node;
- void __iomem *regs;
- struct gpio_chip *gc;
-- struct bgpio_chip *bgc;
- struct grgpio_priv *priv;
- struct resource *res;
- int err;
-@@ -359,8 +351,8 @@ static int grgpio_probe(struct platform_
- if (IS_ERR(regs))
- return PTR_ERR(regs);
-
-- bgc = &priv->bgc;
-- err = bgpio_init(bgc, &ofdev->dev, 4, regs + GRGPIO_DATA,
-+ gc = &priv->gc;
-+ err = bgpio_init(gc, &ofdev->dev, 4, regs + GRGPIO_DATA,
- regs + GRGPIO_OUTPUT, NULL, regs + GRGPIO_DIR, NULL,
- BGPIOF_BIG_ENDIAN_BYTE_ORDER);
- if (err) {
-@@ -369,10 +361,9 @@ static int grgpio_probe(struct platform_
- }
-
- priv->regs = regs;
-- priv->imask = bgc->read_reg(regs + GRGPIO_IMASK);
-+ priv->imask = gc->read_reg(regs + GRGPIO_IMASK);
- priv->dev = &ofdev->dev;
-
-- gc = &bgc->gc;
- gc->of_node = np;
- gc->owner = THIS_MODULE;
- gc->to_irq = grgpio_to_irq;
-@@ -435,7 +426,7 @@ static int grgpio_probe(struct platform_
-
- platform_set_drvdata(ofdev, priv);
-
-- err = gpiochip_add(gc);
-+ err = gpiochip_add_data(gc, priv);
- if (err) {
- dev_err(&ofdev->dev, "Could not add gpiochip\n");
- if (priv->domain)
-@@ -456,7 +447,7 @@ static int grgpio_remove(struct platform
- int i;
- int ret = 0;
-
-- spin_lock_irqsave(&priv->bgc.lock, flags);
-+ spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
-
- if (priv->domain) {
- for (i = 0; i < GRGPIO_MAX_NGPIO; i++) {
-@@ -467,13 +458,13 @@ static int grgpio_remove(struct platform
- }
- }
-
-- gpiochip_remove(&priv->bgc.gc);
-+ gpiochip_remove(&priv->gc);
-
- if (priv->domain)
- irq_domain_remove(priv->domain);
-
- out:
-- spin_unlock_irqrestore(&priv->bgc.lock, flags);
-+ spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
-
- return ret;
- }
---- a/drivers/gpio/gpio-moxart.c
-+++ b/drivers/gpio/gpio-moxart.c
-@@ -14,7 +14,6 @@
- #include <linux/init.h>
- #include <linux/irq.h>
- #include <linux/io.h>
--#include <linux/gpio.h>
- #include <linux/platform_device.h>
- #include <linux/module.h>
- #include <linux/of_address.h>
-@@ -23,7 +22,7 @@
- #include <linux/delay.h>
- #include <linux/timer.h>
- #include <linux/bitops.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
-
- #define GPIO_DATA_OUT 0x00
- #define GPIO_DATA_IN 0x04
-@@ -33,12 +32,12 @@ static int moxart_gpio_probe(struct plat
- {
- struct device *dev = &pdev->dev;
- struct resource *res;
-- struct bgpio_chip *bgc;
-+ struct gpio_chip *gc;
- void __iomem *base;
- int ret;
-
-- bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL);
-- if (!bgc)
-+ gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
-+ if (!gc)
- return -ENOMEM;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-@@ -46,7 +45,7 @@ static int moxart_gpio_probe(struct plat
- if (IS_ERR(base))
- return PTR_ERR(base);
-
-- ret = bgpio_init(bgc, dev, 4, base + GPIO_DATA_IN,
-+ ret = bgpio_init(gc, dev, 4, base + GPIO_DATA_IN,
- base + GPIO_DATA_OUT, NULL,
- base + GPIO_PIN_DIRECTION, NULL,
- BGPIOF_READ_OUTPUT_REG_SET);
-@@ -55,16 +54,16 @@ static int moxart_gpio_probe(struct plat
- return ret;
- }
-
-- bgc->gc.label = "moxart-gpio";
-- bgc->gc.request = gpiochip_generic_request;
-- bgc->gc.free = gpiochip_generic_free;
-- bgc->data = bgc->read_reg(bgc->reg_set);
-- bgc->gc.base = 0;
-- bgc->gc.ngpio = 32;
-- bgc->gc.dev = dev;
-- bgc->gc.owner = THIS_MODULE;
-+ gc->label = "moxart-gpio";
-+ gc->request = gpiochip_generic_request;
-+ gc->free = gpiochip_generic_free;
-+ gc->bgpio_data = bgc->read_reg(bgc->reg_set);
-+ gc->base = 0;
-+ gc->ngpio = 32;
-+ gc->dev = dev;
-+ gc->owner = THIS_MODULE;
-
-- ret = gpiochip_add(&bgc->gc);
-+ ret = gpiochip_add_data(gc, NULL);
- if (ret) {
- dev_err(dev, "%s: gpiochip_add failed\n",
- dev->of_node->full_name);
---- a/drivers/gpio/gpio-mxc.c
-+++ b/drivers/gpio/gpio-mxc.c
-@@ -26,10 +26,11 @@
- #include <linux/irq.h>
- #include <linux/irqdomain.h>
- #include <linux/irqchip/chained_irq.h>
--#include <linux/gpio.h>
- #include <linux/platform_device.h>
- #include <linux/slab.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
-+/* FIXME: for gpio_get_value() replace this with direct register read */
-+#include <linux/gpio.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
- #include <linux/module.h>
-@@ -64,7 +65,7 @@ struct mxc_gpio_port {
- int irq;
- int irq_high;
- struct irq_domain *domain;
-- struct bgpio_chip bgc;
-+ struct gpio_chip gc;
- u32 both_edges;
- };
-
-@@ -172,7 +173,7 @@ static int gpio_set_irq_type(struct irq_
- struct mxc_gpio_port *port = gc->private;
- u32 bit, val;
- u32 gpio_idx = d->hwirq;
-- u32 gpio = port->bgc.gc.base + gpio_idx;
-+ u32 gpio = port->gc.base + gpio_idx;
- int edge;
- void __iomem *reg = port->base;
-
-@@ -398,9 +399,7 @@ static void mxc_gpio_get_hw(struct platf
-
- static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- struct mxc_gpio_port *port =
-- container_of(bgc, struct mxc_gpio_port, bgc);
-+ struct mxc_gpio_port *port = gpiochip_get_data(gc);
-
- return irq_find_mapping(port->domain, offset);
- }
-@@ -451,7 +450,7 @@ static int mxc_gpio_probe(struct platfor
- port);
- }
-
-- err = bgpio_init(&port->bgc, &pdev->dev, 4,
-+ err = bgpio_init(&port->gc, &pdev->dev, 4,
- port->base + GPIO_PSR,
- port->base + GPIO_DR, NULL,
- port->base + GPIO_GDIR, NULL,
-@@ -459,13 +458,13 @@ static int mxc_gpio_probe(struct platfor
- if (err)
- goto out_bgio;
-
-- port->bgc.gc.to_irq = mxc_gpio_to_irq;
-- port->bgc.gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 :
-+ port->gc.to_irq = mxc_gpio_to_irq;
-+ port->gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 :
- pdev->id * 32;
-
-- err = gpiochip_add(&port->bgc.gc);
-+ err = gpiochip_add_data(&port->gc, port);
- if (err)
-- goto out_bgpio_remove;
-+ goto out_bgio;
-
- irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
- if (irq_base < 0) {
-@@ -494,9 +493,7 @@ out_irqdomain_remove:
- out_irqdesc_free:
- irq_free_descs(irq_base, 32);
- out_gpiochip_remove:
-- gpiochip_remove(&port->bgc.gc);
--out_bgpio_remove:
-- bgpio_remove(&port->bgc);
-+ gpiochip_remove(&port->gc);
- out_bgio:
- dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err);
- return err;
---- a/drivers/gpio/gpio-mxs.c
-+++ b/drivers/gpio/gpio-mxs.c
-@@ -26,13 +26,14 @@
- #include <linux/io.h>
- #include <linux/irq.h>
- #include <linux/irqdomain.h>
--#include <linux/gpio.h>
- #include <linux/of.h>
- #include <linux/of_address.h>
- #include <linux/of_device.h>
- #include <linux/platform_device.h>
- #include <linux/slab.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
-+/* FIXME: for gpio_get_value(), replace this by direct register read */
-+#include <linux/gpio.h>
- #include <linux/module.h>
-
- #define MXS_SET 0x4
-@@ -64,7 +65,7 @@ struct mxs_gpio_port {
- int id;
- int irq;
- struct irq_domain *domain;
-- struct bgpio_chip bgc;
-+ struct gpio_chip gc;
- enum mxs_gpio_id devid;
- u32 both_edges;
- };
-@@ -93,7 +94,7 @@ static int mxs_gpio_set_irq_type(struct
- port->both_edges &= ~pin_mask;
- switch (type) {
- case IRQ_TYPE_EDGE_BOTH:
-- val = gpio_get_value(port->bgc.gc.base + d->hwirq);
-+ val = gpio_get_value(port->gc.base + d->hwirq);
- if (val)
- edge = GPIO_INT_FALL_EDGE;
- else
-@@ -225,18 +226,14 @@ static int __init mxs_gpio_init_gc(struc
-
- static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- struct mxs_gpio_port *port =
-- container_of(bgc, struct mxs_gpio_port, bgc);
-+ struct mxs_gpio_port *port = gpiochip_get_data(gc);
-
- return irq_find_mapping(port->domain, offset);
- }
-
- static int mxs_gpio_get_direction(struct gpio_chip *gc, unsigned offset)
- {
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
-- struct mxs_gpio_port *port =
-- container_of(bgc, struct mxs_gpio_port, bgc);
-+ struct mxs_gpio_port *port = gpiochip_get_data(gc);
- u32 mask = 1 << offset;
- u32 dir;
-
-@@ -330,26 +327,24 @@ static int mxs_gpio_probe(struct platfor
- irq_set_chained_handler_and_data(port->irq, mxs_gpio_irq_handler,
- port);
-
-- err = bgpio_init(&port->bgc, &pdev->dev, 4,
-+ err = bgpio_init(&port->gc, &pdev->dev, 4,
- port->base + PINCTRL_DIN(port),
- port->base + PINCTRL_DOUT(port) + MXS_SET,
- port->base + PINCTRL_DOUT(port) + MXS_CLR,
- port->base + PINCTRL_DOE(port), NULL, 0);
- if (err)
-- goto out_irqdesc_free;
-+ goto out_irqdomain_remove;
-
-- port->bgc.gc.to_irq = mxs_gpio_to_irq;
-- port->bgc.gc.get_direction = mxs_gpio_get_direction;
-- port->bgc.gc.base = port->id * 32;
-+ port->gc.to_irq = mxs_gpio_to_irq;
-+ port->gc.get_direction = mxs_gpio_get_direction;
-+ port->gc.base = port->id * 32;
-
-- err = gpiochip_add(&port->bgc.gc);
-+ err = gpiochip_add_data(&port->gc, port);
- if (err)
-- goto out_bgpio_remove;
-+ goto out_irqdomain_remove;
-
- return 0;
-
--out_bgpio_remove:
-- bgpio_remove(&port->bgc);
- out_irqdomain_remove:
- irq_domain_remove(port->domain);
- out_irqdesc_free:
---- a/drivers/gpio/gpio-sodaville.c
-+++ b/drivers/gpio/gpio-sodaville.c
-@@ -10,7 +10,6 @@
- */
-
- #include <linux/errno.h>
--#include <linux/gpio.h>
- #include <linux/init.h>
- #include <linux/io.h>
- #include <linux/irq.h>
-@@ -20,7 +19,7 @@
- #include <linux/pci.h>
- #include <linux/platform_device.h>
- #include <linux/of_irq.h>
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
-
- #define DRV_NAME "sdv_gpio"
- #define SDV_NUM_PUB_GPIOS 12
-@@ -43,7 +42,7 @@ struct sdv_gpio_chip_data {
- void __iomem *gpio_pub_base;
- struct irq_domain *id;
- struct irq_chip_generic *gc;
-- struct bgpio_chip bgpio;
-+ struct gpio_chip chip;
- };
-
- static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type)
-@@ -226,14 +225,14 @@ static int sdv_gpio_probe(struct pci_dev
- writel(mux_val, sd->gpio_pub_base + GPMUXCTL);
- }
-
-- ret = bgpio_init(&sd->bgpio, &pdev->dev, 4,
-+ ret = bgpio_init(&sd->chip, &pdev->dev, 4,
- sd->gpio_pub_base + GPINR, sd->gpio_pub_base + GPOUTR,
- NULL, sd->gpio_pub_base + GPOER, NULL, 0);
- if (ret)
- goto unmap;
-- sd->bgpio.gc.ngpio = SDV_NUM_PUB_GPIOS;
-+ sd->chip.ngpio = SDV_NUM_PUB_GPIOS;
-
-- ret = gpiochip_add(&sd->bgpio.gc);
-+ ret = gpiochip_add_data(&sd->chip, sd);
- if (ret < 0) {
- dev_err(&pdev->dev, "gpiochip_add() failed.\n");
- goto unmap;
-@@ -265,7 +264,7 @@ static void sdv_gpio_remove(struct pci_d
- free_irq(pdev->irq, sd);
- irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS);
-
-- gpiochip_remove(&sd->bgpio.gc);
-+ gpiochip_remove(&sd->chip);
- pci_release_region(pdev, GPIO_BAR);
- iounmap(sd->gpio_pub_base);
- pci_disable_device(pdev);
---- a/drivers/gpio/gpio-xgene-sb.c
-+++ b/drivers/gpio/gpio-xgene-sb.c
-@@ -23,10 +23,8 @@
- #include <linux/io.h>
- #include <linux/platform_device.h>
- #include <linux/of_gpio.h>
--#include <linux/gpio.h>
- #include <linux/gpio/driver.h>
- #include <linux/acpi.h>
--#include <linux/basic_mmio_gpio.h>
-
- #include "gpiolib.h"
-
-@@ -43,38 +41,31 @@
-
- /**
- * struct xgene_gpio_sb - GPIO-Standby private data structure.
-- * @bgc: memory-mapped GPIO controllers.
-+ * @gc: memory-mapped GPIO controllers.
- * @irq: Mapping GPIO pins and interrupt number
- * nirq: Number of GPIO pins that supports interrupt
- */
- struct xgene_gpio_sb {
-- struct bgpio_chip bgc;
-+ struct gpio_chip gc;
- u32 *irq;
- u32 nirq;
- };
-
--static inline struct xgene_gpio_sb *to_xgene_gpio_sb(struct gpio_chip *gc)
--{
-- struct bgpio_chip *bgc = to_bgpio_chip(gc);
--
-- return container_of(bgc, struct xgene_gpio_sb, bgc);
--}
--
--static void xgene_gpio_set_bit(struct bgpio_chip *bgc, void __iomem *reg, u32 gpio, int val)
-+static void xgene_gpio_set_bit(struct gpio_chip *gc, void __iomem *reg, u32 gpio, int val)
- {
- u32 data;
-
-- data = bgc->read_reg(reg);
-+ data = gc->read_reg(reg);
- if (val)
- data |= GPIO_MASK(gpio);
- else
- data &= ~GPIO_MASK(gpio);
-- bgc->write_reg(reg, data);
-+ gc->write_reg(reg, data);
- }
-
- static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio)
- {
-- struct xgene_gpio_sb *priv = to_xgene_gpio_sb(gc);
-+ struct xgene_gpio_sb *priv = gpiochip_get_data(gc);
-
- if (priv->irq[gpio])
- return priv->irq[gpio];
-@@ -99,15 +90,15 @@ static int xgene_gpio_sb_probe(struct pl
- if (IS_ERR(regs))
- return PTR_ERR(regs);
-
-- ret = bgpio_init(&priv->bgc, &pdev->dev, 4,
-+ ret = bgpio_init(&priv->gc, &pdev->dev, 4,
- regs + MPA_GPIO_IN_ADDR,
- regs + MPA_GPIO_OUT_ADDR, NULL,
- regs + MPA_GPIO_OE_ADDR, NULL, 0);
- if (ret)
- return ret;
-
-- priv->bgc.gc.to_irq = apm_gpio_sb_to_irq;
-- priv->bgc.gc.ngpio = XGENE_MAX_GPIO_DS;
-+ priv->gc.to_irq = apm_gpio_sb_to_irq;
-+ priv->gc.ngpio = XGENE_MAX_GPIO_DS;
-
- priv->nirq = XGENE_MAX_GPIO_DS_IRQ;
-
-@@ -118,14 +109,14 @@ static int xgene_gpio_sb_probe(struct pl
-
- for (i = 0; i < priv->nirq; i++) {
- priv->irq[default_lines[i]] = platform_get_irq(pdev, i);
-- xgene_gpio_set_bit(&priv->bgc, regs + MPA_GPIO_SEL_LO,
-+ xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_SEL_LO,
- default_lines[i] * 2, 1);
-- xgene_gpio_set_bit(&priv->bgc, regs + MPA_GPIO_INT_LVL, i, 1);
-+ xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_INT_LVL, i, 1);
- }
-
- platform_set_drvdata(pdev, priv);
-
-- ret = gpiochip_add(&priv->bgc.gc);
-+ ret = gpiochip_add_data(&priv->gc, priv);
- if (ret)
- dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n");
- else
-@@ -133,7 +124,7 @@ static int xgene_gpio_sb_probe(struct pl
-
- if (priv->nirq > 0) {
- /* Register interrupt handlers for gpio signaled acpi events */
-- acpi_gpiochip_request_interrupts(&priv->bgc.gc);
-+ acpi_gpiochip_request_interrupts(&priv->gc);
- }
-
- return ret;
-@@ -144,10 +135,11 @@ static int xgene_gpio_sb_remove(struct p
- struct xgene_gpio_sb *priv = platform_get_drvdata(pdev);
-
- if (priv->nirq > 0) {
-- acpi_gpiochip_free_interrupts(&priv->bgc.gc);
-+ acpi_gpiochip_free_interrupts(&priv->gc);
- }
-
-- return bgpio_remove(&priv->bgc);
-+ gpiochip_remove(&priv->gc);
-+ return 0;
- }
-
- static const struct of_device_id xgene_gpio_sb_of_match[] = {
---- a/drivers/mfd/vexpress-sysreg.c
-+++ b/drivers/mfd/vexpress-sysreg.c
-@@ -11,7 +11,7 @@
- * Copyright (C) 2012 ARM Limited
- */
-
--#include <linux/basic_mmio_gpio.h>
-+#include <linux/gpio/driver.h>
- #include <linux/err.h>
- #include <linux/io.h>
- #include <linux/mfd/core.h>
-@@ -164,7 +164,7 @@ static int vexpress_sysreg_probe(struct
- {
- struct resource *mem;
- void __iomem *base;
-- struct bgpio_chip *mmc_gpio_chip;
-+ struct gpio_chip *mmc_gpio_chip;
- int master;
- u32 dt_hbi;
-
-@@ -201,8 +201,8 @@ static int vexpress_sysreg_probe(struct
- return -ENOMEM;
- bgpio_init(mmc_gpio_chip, &pdev->dev, 0x4, base + SYS_MCI,
- NULL, NULL, NULL, NULL, 0);
-- mmc_gpio_chip->gc.ngpio = 2;
-- gpiochip_add(&mmc_gpio_chip->gc);
-+ mmc_gpio_chip->ngpio = 2;
-+ gpiochip_add(mmc_gpio_chip);
-
- return mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
- vexpress_sysreg_cells,
---- a/include/linux/basic_mmio_gpio.h
-+++ /dev/null
-@@ -1,80 +0,0 @@
--/*
-- * Basic memory-mapped GPIO controllers.
-- *
-- * Copyright 2008 MontaVista Software, Inc.
-- * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
-- *
-- * This program is free software; you can redistribute it and/or modify it
-- * under the terms of the GNU General Public License as published by the
-- * Free Software Foundation; either version 2 of the License, or (at your
-- * option) any later version.
-- */
--
--#ifndef __BASIC_MMIO_GPIO_H
--#define __BASIC_MMIO_GPIO_H
--
--#include <linux/gpio.h>
--#include <linux/types.h>
--#include <linux/compiler.h>
--#include <linux/spinlock_types.h>
--
--struct bgpio_pdata {
-- const char *label;
-- int base;
-- int ngpio;
--};
--
--struct device;
--
--struct bgpio_chip {
-- struct gpio_chip gc;
--
-- unsigned long (*read_reg)(void __iomem *reg);
-- void (*write_reg)(void __iomem *reg, unsigned long data);
--
-- void __iomem *reg_dat;
-- void __iomem *reg_set;
-- void __iomem *reg_clr;
-- void __iomem *reg_dir;
--
-- /* Number of bits (GPIOs): <register width> * 8. */
-- int bits;
--
-- /*
-- * Some GPIO controllers work with the big-endian bits notation,
-- * e.g. in a 8-bits register, GPIO7 is the least significant bit.
-- */
-- unsigned long (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin);
--
-- /*
-- * Used to lock bgpio_chip->data. Also, this is needed to keep
-- * shadowed and real data registers writes together.
-- */
-- spinlock_t lock;
--
-- /* Shadowed data register to clear/set bits safely. */
-- unsigned long data;
--
-- /* Shadowed direction registers to clear/set direction safely. */
-- unsigned long dir;
--};
--
--static inline struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
--{
-- return container_of(gc, struct bgpio_chip, gc);
--}
--
--int bgpio_remove(struct bgpio_chip *bgc);
--int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
-- unsigned long sz, void __iomem *dat, void __iomem *set,
-- void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
-- unsigned long flags);
--
--#define BGPIOF_BIG_ENDIAN BIT(0)
--#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
--#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
--#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
--#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
--#define BGPIOF_NO_OUTPUT BIT(5) /* only input */
--
--#endif /* __BASIC_MMIO_GPIO_H */
---- a/include/linux/gpio/driver.h
-+++ b/include/linux/gpio/driver.h
-@@ -8,6 +8,7 @@
- #include <linux/irqdomain.h>
- #include <linux/lockdep.h>
- #include <linux/pinctrl/pinctrl.h>
-+#include <linux/kconfig.h>
-
- struct device;
- struct gpio_desc;
-@@ -66,6 +67,23 @@ struct seq_file;
- * registers.
- * @irq_not_threaded: flag must be set if @can_sleep is set but the
- * IRQs don't need to be threaded
-+ * @read_reg: reader function for generic GPIO
-+ * @write_reg: writer function for generic GPIO
-+ * @pin2mask: some generic GPIO controllers work with the big-endian bits
-+ * notation, e.g. in a 8-bits register, GPIO7 is the least significant
-+ * bit. This callback assigns the right bit mask.
-+ * @reg_dat: data (in) register for generic GPIO
-+ * @reg_set: output set register (out=high) for generic GPIO
-+ * @reg_clk: output clear register (out=low) for generic GPIO
-+ * @reg_dir: direction setting register for generic GPIO
-+ * @bgpio_bits: number of register bits used for a generic GPIO i.e.
-+ * <register width> * 8
-+ * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
-+ * shadowed and real data registers writes together.
-+ * @bgpio_data: shadowed data register for generic GPIO to clear/set bits
-+ * safely.
-+ * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
-+ * direction safely.
- * @irqchip: GPIO IRQ chip impl, provided by GPIO driver
- * @irqdomain: Interrupt translation domain; responsible for mapping
- * between GPIO hwirq number and linux irq number
-@@ -129,6 +147,20 @@ struct gpio_chip {
- bool can_sleep;
- bool irq_not_threaded;
-
-+#if IS_ENABLED(CONFIG_GPIO_GENERIC)
-+ unsigned long (*read_reg)(void __iomem *reg);
-+ void (*write_reg)(void __iomem *reg, unsigned long data);
-+ unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin);
-+ void __iomem *reg_dat;
-+ void __iomem *reg_set;
-+ void __iomem *reg_clr;
-+ void __iomem *reg_dir;
-+ int bgpio_bits;
-+ spinlock_t bgpio_lock;
-+ unsigned long bgpio_data;
-+ unsigned long bgpio_dir;
-+#endif
-+
- #ifdef CONFIG_GPIOLIB_IRQCHIP
- /*
- * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
-@@ -189,6 +221,28 @@ static inline void *gpiochip_get_data(st
-
- struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
-
-+#if IS_ENABLED(CONFIG_GPIO_GENERIC)
-+
-+struct bgpio_pdata {
-+ const char *label;
-+ int base;
-+ int ngpio;
-+};
-+
-+int bgpio_init(struct gpio_chip *gc, struct device *dev,
-+ unsigned long sz, void __iomem *dat, void __iomem *set,
-+ void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
-+ unsigned long flags);
-+
-+#define BGPIOF_BIG_ENDIAN BIT(0)
-+#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
-+#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
-+#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
-+#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
-+#define BGPIOF_NO_OUTPUT BIT(5) /* only input */
-+
-+#endif
-+
- #ifdef CONFIG_GPIOLIB_IRQCHIP
-
- void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
+++ /dev/null
-From 0cf3292cde22f8843ae5d1eeb8466d8121243c1a Mon Sep 17 00:00:00 2001
-From: Laxman Dewangan <ldewangan@nvidia.com>
-Date: Mon, 15 Feb 2016 16:32:09 +0530
-Subject: [PATCH] gpio: Add devm_ apis for gpiochip_add_data and
- gpiochip_remove
-
-Add device managed APIs devm_gpiochip_add_data() and
-devm_gpiochip_remove() for the APIs gpiochip_add_data()
-and gpiochip_remove().
-
-This helps in reducing code in error path and sometimes
-removal of .remove callback for driver unbind.
-
-Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
----
- drivers/gpio/gpiolib.c | 74 +++++++++++++++++++++++++++++++++++++++++++++
- include/linux/gpio/driver.h | 4 +++
- 2 files changed, 78 insertions(+)
-
---- a/drivers/gpio/gpiolib.c
-+++ b/drivers/gpio/gpiolib.c
-@@ -433,6 +433,80 @@ void gpiochip_remove(struct gpio_chip *c
- }
- EXPORT_SYMBOL_GPL(gpiochip_remove);
-
-+static void devm_gpio_chip_release(struct device *dev, void *res)
-+{
-+ struct gpio_chip *chip = *(struct gpio_chip **)res;
-+
-+ gpiochip_remove(chip);
-+}
-+
-+static int devm_gpio_chip_match(struct device *dev, void *res, void *data)
-+
-+{
-+ struct gpio_chip **r = res;
-+
-+ if (!r || !*r) {
-+ WARN_ON(!r || !*r);
-+ return 0;
-+ }
-+
-+ return *r == data;
-+}
-+
-+/**
-+ * devm_gpiochip_add_data() - Resource manager piochip_add_data()
-+ * @dev: the device pointer on which irq_chip belongs to.
-+ * @chip: the chip to register, with chip->base initialized
-+ * Context: potentially before irqs will work
-+ *
-+ * Returns a negative errno if the chip can't be registered, such as
-+ * because the chip->base is invalid or already associated with a
-+ * different chip. Otherwise it returns zero as a success code.
-+ *
-+ * The gpio chip automatically be released when the device is unbound.
-+ */
-+int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
-+ void *data)
-+{
-+ struct gpio_chip **ptr;
-+ int ret;
-+
-+ ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr),
-+ GFP_KERNEL);
-+ if (!ptr)
-+ return -ENOMEM;
-+
-+ ret = gpiochip_add_data(chip, data);
-+ if (ret < 0) {
-+ devres_free(ptr);
-+ return ret;
-+ }
-+
-+ *ptr = chip;
-+ devres_add(dev, ptr);
-+
-+ return 0;
-+}
-+EXPORT_SYMBOL_GPL(devm_gpiochip_add_data);
-+
-+/**
-+ * devm_gpiochip_remove() - Resource manager of gpiochip_remove()
-+ * @dev: device for which which resource was allocated
-+ * @chip: the chip to remove
-+ *
-+ * A gpio_chip with any GPIOs still requested may not be removed.
-+ */
-+void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip)
-+{
-+ int ret;
-+
-+ ret = devres_release(dev, devm_gpio_chip_release,
-+ devm_gpio_chip_match, chip);
-+ if (!ret)
-+ WARN_ON(ret);
-+}
-+EXPORT_SYMBOL_GPL(devm_gpiochip_remove);
-+
- /**
- * gpiochip_find() - iterator for locating a specific gpio_chip
- * @data: data to pass to match function
---- a/include/linux/gpio/driver.h
-+++ b/include/linux/gpio/driver.h
-@@ -206,6 +206,10 @@ static inline int gpiochip_add(struct gp
- return gpiochip_add_data(chip, NULL);
- }
- extern void gpiochip_remove(struct gpio_chip *chip);
-+extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
-+ void *data);
-+extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip);
-+
- extern struct gpio_chip *gpiochip_find(void *data,
- int (*match)(struct gpio_chip *chip, void *data));
-
+++ /dev/null
-From 80e0f8d94d3090f0f7bf3faf3e6180e920ee0d22 Mon Sep 17 00:00:00 2001
-From: Laxman Dewangan <ldewangan@nvidia.com>
-Date: Wed, 24 Feb 2016 14:12:59 +0530
-Subject: [PATCH] pinctrl: Add devm_ apis for pinctrl_{register, unregister}
-
-Add device managed APIs devm_pinctrl_register() and
-devm_pinctrl_unregister() for the APIs pinctrl_register()
-and pinctrl_unregister().
-
-This helps in reducing code in error path and sometimes
-removal of .remove callback for driver unbind.
-
-Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
-Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
-Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/core.c | 63 +++++++++++++++++++++++++++++++++++++++++
- include/linux/pinctrl/pinctrl.h | 6 ++++
- 2 files changed, 69 insertions(+)
-
---- a/drivers/pinctrl/core.c
-+++ b/drivers/pinctrl/core.c
-@@ -1861,6 +1861,69 @@ void pinctrl_unregister(struct pinctrl_d
- }
- EXPORT_SYMBOL_GPL(pinctrl_unregister);
-
-+static void devm_pinctrl_dev_release(struct device *dev, void *res)
-+{
-+ struct pinctrl_dev *pctldev = *(struct pinctrl_dev **)res;
-+
-+ pinctrl_unregister(pctldev);
-+}
-+
-+static int devm_pinctrl_dev_match(struct device *dev, void *res, void *data)
-+{
-+ struct pctldev **r = res;
-+
-+ if (WARN_ON(!r || !*r))
-+ return 0;
-+
-+ return *r == data;
-+}
-+
-+/**
-+ * devm_pinctrl_register() - Resource managed version of pinctrl_register().
-+ * @dev: parent device for this pin controller
-+ * @pctldesc: descriptor for this pin controller
-+ * @driver_data: private pin controller data for this pin controller
-+ *
-+ * Returns an error pointer if pincontrol register failed. Otherwise
-+ * it returns valid pinctrl handle.
-+ *
-+ * The pinctrl device will be automatically released when the device is unbound.
-+ */
-+struct pinctrl_dev *devm_pinctrl_register(struct device *dev,
-+ struct pinctrl_desc *pctldesc,
-+ void *driver_data)
-+{
-+ struct pinctrl_dev **ptr, *pctldev;
-+
-+ ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL);
-+ if (!ptr)
-+ return ERR_PTR(-ENOMEM);
-+
-+ pctldev = pinctrl_register(pctldesc, dev, driver_data);
-+ if (IS_ERR(pctldev)) {
-+ devres_free(ptr);
-+ return pctldev;
-+ }
-+
-+ *ptr = pctldev;
-+ devres_add(dev, ptr);
-+
-+ return pctldev;
-+}
-+EXPORT_SYMBOL_GPL(devm_pinctrl_register);
-+
-+/**
-+ * devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister().
-+ * @dev: device for which which resource was allocated
-+ * @pctldev: the pinctrl device to unregister.
-+ */
-+void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev)
-+{
-+ WARN_ON(devres_release(dev, devm_pinctrl_dev_release,
-+ devm_pinctrl_dev_match, pctldev));
-+}
-+EXPORT_SYMBOL_GPL(devm_pinctrl_unregister);
-+
- static int __init pinctrl_init(void)
- {
- pr_info("initialized pinctrl subsystem\n");
---- a/include/linux/pinctrl/pinctrl.h
-+++ b/include/linux/pinctrl/pinctrl.h
-@@ -144,6 +144,12 @@ struct pinctrl_desc {
- extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
- struct device *dev, void *driver_data);
- extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
-+extern struct pinctrl_dev *devm_pinctrl_register(struct device *dev,
-+ struct pinctrl_desc *pctldesc,
-+ void *driver_data);
-+extern void devm_pinctrl_unregister(struct device *dev,
-+ struct pinctrl_dev *pctldev);
-+
- extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
- extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
- struct pinctrl_gpio_range *range);
+++ /dev/null
-From d32f7fd3bbc32732b094d938b95169521503a9fb Mon Sep 17 00:00:00 2001
-From: Irina Tirdea <irina.tirdea@intel.com>
-Date: Thu, 31 Mar 2016 14:44:42 +0300
-Subject: [PATCH] pinctrl: Rename pinctrl_utils_dt_free_map to
- pinctrl_utils_free_map
-
-Rename pinctrl_utils_dt_free_map to pinctrl_utils_free_map, since
-it does not depend on device tree despite the current name. This
-will enforce a consistent naming in pinctr-utils.c and will make
-it clear it can be called from outside device tree (e.g. from
-ACPI handling code).
-
-Signed-off-by: Irina Tirdea <irina.tirdea@intel.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/pinconf-generic.c | 2 +-
- drivers/pinctrl/pinctrl-utils.c | 4 ++--
- drivers/pinctrl/pinctrl-utils.h | 2 +-
- 3 files changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/pinctrl/pinconf-generic.c
-+++ b/drivers/pinctrl/pinconf-generic.c
-@@ -385,7 +385,7 @@ int pinconf_generic_dt_node_to_map(struc
- return 0;
-
- exit:
-- pinctrl_utils_dt_free_map(pctldev, *map, *num_maps);
-+ pinctrl_utils_free_map(pctldev, *map, *num_maps);
- return ret;
- }
- EXPORT_SYMBOL_GPL(pinconf_generic_dt_node_to_map);
---- a/drivers/pinctrl/pinctrl-utils.c
-+++ b/drivers/pinctrl/pinctrl-utils.c
-@@ -122,7 +122,7 @@ int pinctrl_utils_add_config(struct pinc
- }
- EXPORT_SYMBOL_GPL(pinctrl_utils_add_config);
-
--void pinctrl_utils_dt_free_map(struct pinctrl_dev *pctldev,
-+void pinctrl_utils_free_map(struct pinctrl_dev *pctldev,
- struct pinctrl_map *map, unsigned num_maps)
- {
- int i;
-@@ -139,4 +139,4 @@ void pinctrl_utils_dt_free_map(struct pi
- }
- kfree(map);
- }
--EXPORT_SYMBOL_GPL(pinctrl_utils_dt_free_map);
-+EXPORT_SYMBOL_GPL(pinctrl_utils_free_map);
---- a/drivers/pinctrl/pinctrl-utils.h
-+++ b/drivers/pinctrl/pinctrl-utils.h
-@@ -37,7 +37,7 @@ int pinctrl_utils_add_map_configs(struct
- int pinctrl_utils_add_config(struct pinctrl_dev *pctldev,
- unsigned long **configs, unsigned *num_configs,
- unsigned long config);
--void pinctrl_utils_dt_free_map(struct pinctrl_dev *pctldev,
-+void pinctrl_utils_free_map(struct pinctrl_dev *pctldev,
- struct pinctrl_map *map, unsigned num_maps);
-
- #endif /* __PINCTRL_UTILS_H__ */
+++ /dev/null
-From 59451e1233bd315c5379a631838a03d80e689581 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Thu, 5 May 2016 17:31:47 -0700
-Subject: [PATCH 01/10] mtd: spi-nor: change return value of read/write
-
-Change the return value of spi-nor device read and write methods to
-allow returning amount of data transferred and errors as
-read(2)/write(2) does.
-
-Also, start handling positive returns in spi_nor_read(), since we want
-to convert drivers to start returning the read-length both via *retlen
-and the return code. (We don't need to do the same transition process
-for spi_nor_write(), since ->write() didn't used to have a return code
-at all.)
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com>
-Acked-by: Michal Suchanek <hramrach@gmail.com>
-Tested-by: Michal Suchanek <hramrach@gmail.com>
----
- drivers/mtd/devices/m25p80.c | 5 +++--
- drivers/mtd/spi-nor/fsl-quadspi.c | 5 +++--
- drivers/mtd/spi-nor/nxp-spifi.c | 12 ++++++------
- drivers/mtd/spi-nor/spi-nor.c | 5 ++++-
- include/linux/mtd/spi-nor.h | 4 ++--
- 6 files changed, 36 insertions(+), 21 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -73,7 +73,7 @@ static int m25p80_write_reg(struct spi_n
- return spi_write(spi, flash->command, len + 1);
- }
-
--static void m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
-+static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
- size_t *retlen, const u_char *buf)
- {
- struct m25p *flash = nor->priv;
-@@ -101,6 +101,7 @@ static void m25p80_write(struct spi_nor
- spi_sync(spi, &m);
-
- *retlen += m.actual_length - cmd_sz;
-+ return 0;
- }
-
- static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
-@@ -119,7 +120,7 @@ static inline unsigned int m25p80_rx_nbi
- * Read an address range from the nor chip. The address range
- * may be any size provided it is within the physical boundaries.
- */
--static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
-+static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
- size_t *retlen, u_char *buf)
- {
- struct m25p *flash = nor->priv;
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -822,7 +822,7 @@ static int fsl_qspi_write_reg(struct spi
- return ret;
- }
-
--static void fsl_qspi_write(struct spi_nor *nor, loff_t to,
-+static ssize_t fsl_qspi_write(struct spi_nor *nor, loff_t to,
- size_t len, size_t *retlen, const u_char *buf)
- {
- struct fsl_qspi *q = nor->priv;
-@@ -832,9 +832,10 @@ static void fsl_qspi_write(struct spi_no
-
- /* invalid the data in the AHB buffer. */
- fsl_qspi_invalid(q);
-+ return 0;
- }
-
--static int fsl_qspi_read(struct spi_nor *nor, loff_t from,
-+static ssize_t fsl_qspi_read(struct spi_nor *nor, loff_t from,
- size_t len, size_t *retlen, u_char *buf)
- {
- struct fsl_qspi *q = nor->priv;
---- a/drivers/mtd/spi-nor/nxp-spifi.c
-+++ b/drivers/mtd/spi-nor/nxp-spifi.c
-@@ -172,8 +172,8 @@ static int nxp_spifi_write_reg(struct sp
- return nxp_spifi_wait_for_cmd(spifi);
- }
-
--static int nxp_spifi_read(struct spi_nor *nor, loff_t from, size_t len,
-- size_t *retlen, u_char *buf)
-+static ssize_t nxp_spifi_read(struct spi_nor *nor, loff_t from, size_t len,
-+ size_t *retlen, u_char *buf)
- {
- struct nxp_spifi *spifi = nor->priv;
- int ret;
-@@ -188,8 +188,8 @@ static int nxp_spifi_read(struct spi_nor
- return 0;
- }
-
--static void nxp_spifi_write(struct spi_nor *nor, loff_t to, size_t len,
-- size_t *retlen, const u_char *buf)
-+static ssize_t nxp_spifi_write(struct spi_nor *nor, loff_t to, size_t len,
-+ size_t *retlen, const u_char *buf)
- {
- struct nxp_spifi *spifi = nor->priv;
- u32 cmd;
-@@ -197,7 +197,7 @@ static void nxp_spifi_write(struct spi_n
-
- ret = nxp_spifi_set_memory_mode_off(spifi);
- if (ret)
-- return;
-+ return ret;
-
- writel(to, spifi->io_base + SPIFI_ADDR);
- *retlen += len;
-@@ -212,7 +212,7 @@ static void nxp_spifi_write(struct spi_n
- while (len--)
- writeb(*buf++, spifi->io_base + SPIFI_DATA);
-
-- nxp_spifi_wait_for_cmd(spifi);
-+ return nxp_spifi_wait_for_cmd(spifi);
- }
-
- static int nxp_spifi_erase(struct spi_nor *nor, loff_t offs)
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -893,7 +893,10 @@ static int spi_nor_read(struct mtd_info
- ret = nor->read(nor, from, len, retlen, buf);
-
- spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
-- return ret;
-+ if (ret < 0)
-+ return ret;
-+
-+ return 0;
- }
-
- static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -169,9 +169,9 @@ struct spi_nor {
- int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
- int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
-
-- int (*read)(struct spi_nor *nor, loff_t from,
-+ ssize_t (*read)(struct spi_nor *nor, loff_t from,
- size_t len, size_t *retlen, u_char *read_buf);
-- void (*write)(struct spi_nor *nor, loff_t to,
-+ ssize_t (*write)(struct spi_nor *nor, loff_t to,
- size_t len, size_t *retlen, const u_char *write_buf);
- int (*erase)(struct spi_nor *nor, loff_t offs);
-
+++ /dev/null
-From 1992297b0810a42d78ec7b4de15304eb0489fd97 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Thu, 5 May 2016 17:31:48 -0700
-Subject: [PATCH 02/10] mtd: m25p80: return amount of data transferred or error
- in read/write
-
-Add checking of SPI transfer errors and return them from read/write
-functions. Also return the amount of data transferred.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Acked-by: Michal Suchanek <hramrach@gmail.com>
-Tested-by: Michal Suchanek <hramrach@gmail.com>
----
- drivers/mtd/devices/m25p80.c | 29 +++++++++++++++++++++--------
- 1 file changed, 21 insertions(+), 8 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -81,6 +81,7 @@ static ssize_t m25p80_write(struct spi_n
- struct spi_transfer t[2] = {};
- struct spi_message m;
- int cmd_sz = m25p_cmdsz(nor);
-+ ssize_t ret;
-
- spi_message_init(&m);
-
-@@ -98,10 +99,15 @@ static ssize_t m25p80_write(struct spi_n
- t[1].len = len;
- spi_message_add_tail(&t[1], &m);
-
-- spi_sync(spi, &m);
-+ ret = spi_sync(spi, &m);
-+ if (ret)
-+ return ret;
-
-- *retlen += m.actual_length - cmd_sz;
-- return 0;
-+ ret = m.actual_length - cmd_sz;
-+ if (ret < 0)
-+ return -EIO;
-+ *retlen += ret;
-+ return ret;
- }
-
- static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
-@@ -128,13 +134,13 @@ static ssize_t m25p80_read(struct spi_no
- struct spi_transfer t[2];
- struct spi_message m;
- unsigned int dummy = nor->read_dummy;
-+ ssize_t ret;
-
- /* convert the dummy cycles to the number of bytes */
- dummy /= 8;
-
- if (spi_flash_read_supported(spi)) {
- struct spi_flash_read_message msg;
-- int ret;
-
- memset(&msg, 0, sizeof(msg));
-
-@@ -151,7 +157,9 @@ static ssize_t m25p80_read(struct spi_no
-
- ret = spi_flash_read(spi, &msg);
- *retlen = msg.retlen;
-- return ret;
-+ if (ret < 0)
-+ return ret;
-+ return msg.retlen;
- }
-
- spi_message_init(&m);
-@@ -169,10 +177,15 @@ static ssize_t m25p80_read(struct spi_no
- t[1].len = len;
- spi_message_add_tail(&t[1], &m);
-
-- spi_sync(spi, &m);
-+ ret = spi_sync(spi, &m);
-+ if (ret)
-+ return ret;
-
-- *retlen = m.actual_length - m25p_cmdsz(nor) - dummy;
-- return 0;
-+ ret = m.actual_length - m25p_cmdsz(nor) - dummy;
-+ if (ret < 0)
-+ return -EIO;
-+ *retlen += ret;
-+ return ret;
- }
-
- static int m25p80_erase(struct spi_nor *nor, loff_t offset)
+++ /dev/null
-From fc0d7e542a0d4193521899d15f8f4999dc295323 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Thu, 5 May 2016 17:31:49 -0700
-Subject: [PATCH 03/10] mtd: fsl-quadspi: return amount of data read/written or
- error
-
-Return amount of data read/written or error as read(2)/write(2) does.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c | 17 +++++++++++------
- 1 file changed, 11 insertions(+), 6 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -575,7 +575,7 @@ static inline void fsl_qspi_invalid(stru
- writel(reg, q->iobase + QUADSPI_MCR);
- }
-
--static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
-+static ssize_t fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
- u8 opcode, unsigned int to, u32 *txbuf,
- unsigned count, size_t *retlen)
- {
-@@ -604,8 +604,11 @@ static int fsl_qspi_nor_write(struct fsl
- /* Trigger it */
- ret = fsl_qspi_runcmd(q, opcode, to, count);
-
-- if (ret == 0 && retlen)
-- *retlen += count;
-+ if (ret == 0) {
-+ if (retlen)
-+ *retlen += count;
-+ return count;
-+ }
-
- return ret;
- }
-@@ -814,6 +817,8 @@ static int fsl_qspi_write_reg(struct spi
- } else if (len > 0) {
- ret = fsl_qspi_nor_write(q, nor, opcode, 0,
- (u32 *)buf, len, NULL);
-+ if (ret > 0)
-+ return 0;
- } else {
- dev_err(q->dev, "invalid cmd %d\n", opcode);
- ret = -EINVAL;
-@@ -827,12 +832,12 @@ static ssize_t fsl_qspi_write(struct spi
- {
- struct fsl_qspi *q = nor->priv;
-
-- fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
-+ ssize_t ret = fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
- (u32 *)buf, len, retlen);
-
- /* invalid the data in the AHB buffer. */
- fsl_qspi_invalid(q);
-- return 0;
-+ return ret;
- }
-
- static ssize_t fsl_qspi_read(struct spi_nor *nor, loff_t from,
-@@ -879,7 +884,7 @@ static ssize_t fsl_qspi_read(struct spi_
- len);
-
- *retlen += len;
-- return 0;
-+ return len;
- }
-
- static int fsl_qspi_erase(struct spi_nor *nor, loff_t offs)
+++ /dev/null
-From bc418cd2652f47a327e27f978caa3d85f9558b09 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Thu, 5 May 2016 17:31:51 -0700
-Subject: [PATCH 05/10] mtd: nxp-spifi: return amount of data transferred or
- error in read/write
-
-Add checking of SPI transfer errors and return them from read/write
-functions. Also return the amount of data transferred.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
- drivers/mtd/spi-nor/nxp-spifi.c | 13 +++++++++----
- 1 file changed, 9 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/spi-nor/nxp-spifi.c
-+++ b/drivers/mtd/spi-nor/nxp-spifi.c
-@@ -185,7 +185,7 @@ static ssize_t nxp_spifi_read(struct spi
- memcpy_fromio(buf, spifi->flash_base + from, len);
- *retlen += len;
-
-- return 0;
-+ return len;
- }
-
- static ssize_t nxp_spifi_write(struct spi_nor *nor, loff_t to, size_t len,
-@@ -194,6 +194,7 @@ static ssize_t nxp_spifi_write(struct sp
- struct nxp_spifi *spifi = nor->priv;
- u32 cmd;
- int ret;
-+ size_t i;
-
- ret = nxp_spifi_set_memory_mode_off(spifi);
- if (ret)
-@@ -209,10 +210,14 @@ static ssize_t nxp_spifi_write(struct sp
- SPIFI_CMD_FRAMEFORM(spifi->nor.addr_width + 1);
- writel(cmd, spifi->io_base + SPIFI_CMD);
-
-- while (len--)
-- writeb(*buf++, spifi->io_base + SPIFI_DATA);
-+ for (i = 0; i < len; i++)
-+ writeb(buf[i], spifi->io_base + SPIFI_DATA);
-
-- return nxp_spifi_wait_for_cmd(spifi);
-+ ret = nxp_spifi_wait_for_cmd(spifi);
-+ if (ret)
-+ return ret;
-+
-+ return len;
- }
-
- static int nxp_spifi_erase(struct spi_nor *nor, loff_t offs)
+++ /dev/null
-From 0bad7b9304d543dd7627f4cd564aea5d7338b950 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Thu, 5 May 2016 17:31:52 -0700
-Subject: [PATCH 06/10] mtd: spi-nor: check return value from write
-
-SPI NOR hardware drivers now return useful value from their write
-functions so check them.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com>
-Acked-by: Michal Suchanek <hramrach@gmail.com>
-Tested-by: Michal Suchanek <hramrach@gmail.com>
----
- drivers/mtd/spi-nor/spi-nor.c | 45 ++++++++++++++++++++++++++++++-------------
- 1 file changed, 32 insertions(+), 13 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -922,10 +922,14 @@ static int sst_write(struct mtd_info *mt
- nor->program_opcode = SPINOR_OP_BP;
-
- /* write one byte. */
-- nor->write(nor, to, 1, retlen, buf);
-+ ret = nor->write(nor, to, 1, retlen, buf);
-+ if (ret < 0)
-+ goto sst_write_err;
-+ WARN(ret != 1, "While writing 1 byte written %i bytes\n",
-+ (int)ret);
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
-- goto time_out;
-+ goto sst_write_err;
- }
- to += actual;
-
-@@ -934,10 +938,14 @@ static int sst_write(struct mtd_info *mt
- nor->program_opcode = SPINOR_OP_AAI_WP;
-
- /* write two bytes. */
-- nor->write(nor, to, 2, retlen, buf + actual);
-+ ret = nor->write(nor, to, 2, retlen, buf + actual);
-+ if (ret < 0)
-+ goto sst_write_err;
-+ WARN(ret != 2, "While writing 2 bytes written %i bytes\n",
-+ (int)ret);
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
-- goto time_out;
-+ goto sst_write_err;
- to += 2;
- nor->sst_write_second = true;
- }
-@@ -946,21 +954,24 @@ static int sst_write(struct mtd_info *mt
- write_disable(nor);
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
-- goto time_out;
-+ goto sst_write_err;
-
- /* Write out trailing byte if it exists. */
- if (actual != len) {
- write_enable(nor);
-
- nor->program_opcode = SPINOR_OP_BP;
-- nor->write(nor, to, 1, retlen, buf + actual);
--
-+ ret = nor->write(nor, to, 1, retlen, buf + actual);
-+ if (ret < 0)
-+ goto sst_write_err;
-+ WARN(ret != 1, "While writing 1 byte written %i bytes\n",
-+ (int)ret);
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
-- goto time_out;
-+ goto sst_write_err;
- write_disable(nor);
- }
--time_out:
-+sst_write_err:
- spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
- return ret;
- }
-@@ -989,14 +1000,18 @@ static int spi_nor_write(struct mtd_info
-
- /* do all the bytes fit onto one page? */
- if (page_offset + len <= nor->page_size) {
-- nor->write(nor, to, len, retlen, buf);
-+ ret = nor->write(nor, to, len, retlen, buf);
-+ if (ret < 0)
-+ goto write_err;
- } else {
- /* the size of data remaining on the first page */
- page_size = nor->page_size - page_offset;
-- nor->write(nor, to, page_size, retlen, buf);
-+ ret = nor->write(nor, to, page_size, retlen, buf);
-+ if (ret < 0)
-+ goto write_err;
-
- /* write everything in nor->page_size chunks */
-- for (i = page_size; i < len; i += page_size) {
-+ for (i = ret; i < len; ) {
- page_size = len - i;
- if (page_size > nor->page_size)
- page_size = nor->page_size;
-@@ -1007,7 +1022,11 @@ static int spi_nor_write(struct mtd_info
-
- write_enable(nor);
-
-- nor->write(nor, to + i, page_size, retlen, buf + i);
-+ ret = nor->write(nor, to + i, page_size, retlen,
-+ buf + i);
-+ if (ret < 0)
-+ goto write_err;
-+ i += ret;
- }
- }
-
+++ /dev/null
-From 2dd087b16946cf168f401526adf26afa771bb740 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Thu, 5 May 2016 17:31:53 -0700
-Subject: [PATCH 07/10] mtd: spi-nor: stop passing around retlen
-
-Do not pass retlen to hardware driver read/write functions. Update it in
-spi-nor generic driver instead.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com>
-Acked-by: Michal Suchanek <hramrach@gmail.com>
-Tested-by: Michal Suchanek <hramrach@gmail.com>
----
- drivers/mtd/devices/m25p80.c | 7 ++-----
- drivers/mtd/spi-nor/fsl-quadspi.c | 17 ++++++-----------
- drivers/mtd/spi-nor/nxp-spifi.c | 6 ++----
- drivers/mtd/spi-nor/spi-nor.c | 21 +++++++++++++--------
- include/linux/mtd/spi-nor.h | 4 ++--
- 6 files changed, 28 insertions(+), 35 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -74,7 +74,7 @@ static int m25p80_write_reg(struct spi_n
- }
-
- static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
-- size_t *retlen, const u_char *buf)
-+ const u_char *buf)
- {
- struct m25p *flash = nor->priv;
- struct spi_device *spi = flash->spi;
-@@ -106,7 +106,6 @@ static ssize_t m25p80_write(struct spi_n
- ret = m.actual_length - cmd_sz;
- if (ret < 0)
- return -EIO;
-- *retlen += ret;
- return ret;
- }
-
-@@ -127,7 +126,7 @@ static inline unsigned int m25p80_rx_nbi
- * may be any size provided it is within the physical boundaries.
- */
- static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
-- size_t *retlen, u_char *buf)
-+ u_char *buf)
- {
- struct m25p *flash = nor->priv;
- struct spi_device *spi = flash->spi;
-@@ -156,7 +155,6 @@ static ssize_t m25p80_read(struct spi_no
- msg.data_nbits = m25p80_rx_nbits(nor);
-
- ret = spi_flash_read(spi, &msg);
-- *retlen = msg.retlen;
- if (ret < 0)
- return ret;
- return msg.retlen;
-@@ -184,7 +182,6 @@ static ssize_t m25p80_read(struct spi_no
- ret = m.actual_length - m25p_cmdsz(nor) - dummy;
- if (ret < 0)
- return -EIO;
-- *retlen += ret;
- return ret;
- }
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -577,7 +577,7 @@ static inline void fsl_qspi_invalid(stru
-
- static ssize_t fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
- u8 opcode, unsigned int to, u32 *txbuf,
-- unsigned count, size_t *retlen)
-+ unsigned count)
- {
- int ret, i, j;
- u32 tmp;
-@@ -604,11 +604,8 @@ static ssize_t fsl_qspi_nor_write(struct
- /* Trigger it */
- ret = fsl_qspi_runcmd(q, opcode, to, count);
-
-- if (ret == 0) {
-- if (retlen)
-- *retlen += count;
-+ if (ret == 0)
- return count;
-- }
-
- return ret;
- }
-@@ -816,7 +813,7 @@ static int fsl_qspi_write_reg(struct spi
-
- } else if (len > 0) {
- ret = fsl_qspi_nor_write(q, nor, opcode, 0,
-- (u32 *)buf, len, NULL);
-+ (u32 *)buf, len);
- if (ret > 0)
- return 0;
- } else {
-@@ -828,12 +825,11 @@ static int fsl_qspi_write_reg(struct spi
- }
-
- static ssize_t fsl_qspi_write(struct spi_nor *nor, loff_t to,
-- size_t len, size_t *retlen, const u_char *buf)
-+ size_t len, const u_char *buf)
- {
- struct fsl_qspi *q = nor->priv;
--
- ssize_t ret = fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
-- (u32 *)buf, len, retlen);
-+ (u32 *)buf, len);
-
- /* invalid the data in the AHB buffer. */
- fsl_qspi_invalid(q);
-@@ -841,7 +837,7 @@ static ssize_t fsl_qspi_write(struct spi
- }
-
- static ssize_t fsl_qspi_read(struct spi_nor *nor, loff_t from,
-- size_t len, size_t *retlen, u_char *buf)
-+ size_t len, u_char *buf)
- {
- struct fsl_qspi *q = nor->priv;
- u8 cmd = nor->read_opcode;
-@@ -883,7 +879,6 @@ static ssize_t fsl_qspi_read(struct spi_
- memcpy(buf, q->ahb_addr + q->chip_base_addr + from - q->memmap_offs,
- len);
-
-- *retlen += len;
- return len;
- }
-
---- a/drivers/mtd/spi-nor/nxp-spifi.c
-+++ b/drivers/mtd/spi-nor/nxp-spifi.c
-@@ -173,7 +173,7 @@ static int nxp_spifi_write_reg(struct sp
- }
-
- static ssize_t nxp_spifi_read(struct spi_nor *nor, loff_t from, size_t len,
-- size_t *retlen, u_char *buf)
-+ u_char *buf)
- {
- struct nxp_spifi *spifi = nor->priv;
- int ret;
-@@ -183,13 +183,12 @@ static ssize_t nxp_spifi_read(struct spi
- return ret;
-
- memcpy_fromio(buf, spifi->flash_base + from, len);
-- *retlen += len;
-
- return len;
- }
-
- static ssize_t nxp_spifi_write(struct spi_nor *nor, loff_t to, size_t len,
-- size_t *retlen, const u_char *buf)
-+ const u_char *buf)
- {
- struct nxp_spifi *spifi = nor->priv;
- u32 cmd;
-@@ -201,7 +200,6 @@ static ssize_t nxp_spifi_write(struct sp
- return ret;
-
- writel(to, spifi->io_base + SPIFI_ADDR);
-- *retlen += len;
-
- cmd = SPIFI_CMD_DOUT |
- SPIFI_CMD_DATALEN(len) |
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -890,12 +890,13 @@ static int spi_nor_read(struct mtd_info
- if (ret)
- return ret;
-
-- ret = nor->read(nor, from, len, retlen, buf);
-+ ret = nor->read(nor, from, len, buf);
-
- spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
- if (ret < 0)
- return ret;
-
-+ *retlen += ret;
- return 0;
- }
-
-@@ -922,7 +923,7 @@ static int sst_write(struct mtd_info *mt
- nor->program_opcode = SPINOR_OP_BP;
-
- /* write one byte. */
-- ret = nor->write(nor, to, 1, retlen, buf);
-+ ret = nor->write(nor, to, 1, buf);
- if (ret < 0)
- goto sst_write_err;
- WARN(ret != 1, "While writing 1 byte written %i bytes\n",
-@@ -938,7 +939,7 @@ static int sst_write(struct mtd_info *mt
- nor->program_opcode = SPINOR_OP_AAI_WP;
-
- /* write two bytes. */
-- ret = nor->write(nor, to, 2, retlen, buf + actual);
-+ ret = nor->write(nor, to, 2, buf + actual);
- if (ret < 0)
- goto sst_write_err;
- WARN(ret != 2, "While writing 2 bytes written %i bytes\n",
-@@ -961,7 +962,7 @@ static int sst_write(struct mtd_info *mt
- write_enable(nor);
-
- nor->program_opcode = SPINOR_OP_BP;
-- ret = nor->write(nor, to, 1, retlen, buf + actual);
-+ ret = nor->write(nor, to, 1, buf + actual);
- if (ret < 0)
- goto sst_write_err;
- WARN(ret != 1, "While writing 1 byte written %i bytes\n",
-@@ -970,8 +971,10 @@ static int sst_write(struct mtd_info *mt
- if (ret)
- goto sst_write_err;
- write_disable(nor);
-+ actual += 1;
- }
- sst_write_err:
-+ *retlen += actual;
- spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
- return ret;
- }
-@@ -1000,15 +1003,17 @@ static int spi_nor_write(struct mtd_info
-
- /* do all the bytes fit onto one page? */
- if (page_offset + len <= nor->page_size) {
-- ret = nor->write(nor, to, len, retlen, buf);
-+ ret = nor->write(nor, to, len, buf);
- if (ret < 0)
- goto write_err;
-+ *retlen += ret;
- } else {
- /* the size of data remaining on the first page */
- page_size = nor->page_size - page_offset;
-- ret = nor->write(nor, to, page_size, retlen, buf);
-+ ret = nor->write(nor, to, page_size, buf);
- if (ret < 0)
- goto write_err;
-+ *retlen += ret;
-
- /* write everything in nor->page_size chunks */
- for (i = ret; i < len; ) {
-@@ -1022,10 +1027,10 @@ static int spi_nor_write(struct mtd_info
-
- write_enable(nor);
-
-- ret = nor->write(nor, to + i, page_size, retlen,
-- buf + i);
-+ ret = nor->write(nor, to + i, page_size, buf + i);
- if (ret < 0)
- goto write_err;
-+ *retlen += ret;
- i += ret;
- }
- }
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -170,9 +170,9 @@ struct spi_nor {
- int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
-
- ssize_t (*read)(struct spi_nor *nor, loff_t from,
-- size_t len, size_t *retlen, u_char *read_buf);
-+ size_t len, u_char *read_buf);
- ssize_t (*write)(struct spi_nor *nor, loff_t to,
-- size_t len, size_t *retlen, const u_char *write_buf);
-+ size_t len, const u_char *write_buf);
- int (*erase)(struct spi_nor *nor, loff_t offs);
-
- int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
+++ /dev/null
-From e5d05cbd6d8b01f08c95c427a36c66aac769af4f Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Thu, 5 May 2016 17:31:54 -0700
-Subject: [PATCH 08/10] mtd: spi-nor: simplify write loop
-
-The spi-nor write loop assumes that what is passed to the hardware
-driver write() is what gets written.
-
-When write() writes less than page size at once data is dropped on the
-floor. Check the amount of data writen and exit if it does not match
-requested amount.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com>
-Acked-by: Michal Suchanek <hramrach@gmail.com>
-Tested-by: Michal Suchanek <hramrach@gmail.com>
----
- drivers/mtd/spi-nor/spi-nor.c | 58 +++++++++++++++++++------------------------
- 1 file changed, 25 insertions(+), 33 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -988,8 +988,8 @@ static int spi_nor_write(struct mtd_info
- size_t *retlen, const u_char *buf)
- {
- struct spi_nor *nor = mtd_to_spi_nor(mtd);
-- u32 page_offset, page_size, i;
-- int ret;
-+ size_t page_offset, page_remain, i;
-+ ssize_t ret;
-
- dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
-
-@@ -997,45 +997,37 @@ static int spi_nor_write(struct mtd_info
- if (ret)
- return ret;
-
-- write_enable(nor);
-+ for (i = 0; i < len; ) {
-+ ssize_t written;
-
-- page_offset = to & (nor->page_size - 1);
--
-- /* do all the bytes fit onto one page? */
-- if (page_offset + len <= nor->page_size) {
-- ret = nor->write(nor, to, len, buf);
-- if (ret < 0)
-- goto write_err;
-- *retlen += ret;
-- } else {
-+ page_offset = (to + i) & (nor->page_size - 1);
-+ WARN_ONCE(page_offset,
-+ "Writing at offset %zu into a NOR page. Writing partial pages may decrease reliability and increase wear of NOR flash.",
-+ page_offset);
- /* the size of data remaining on the first page */
-- page_size = nor->page_size - page_offset;
-- ret = nor->write(nor, to, page_size, buf);
-+ page_remain = min_t(size_t,
-+ nor->page_size - page_offset, len - i);
-+
-+ write_enable(nor);
-+ ret = nor->write(nor, to + i, page_remain, buf + i);
- if (ret < 0)
- goto write_err;
-- *retlen += ret;
-+ written = ret;
-
-- /* write everything in nor->page_size chunks */
-- for (i = ret; i < len; ) {
-- page_size = len - i;
-- if (page_size > nor->page_size)
-- page_size = nor->page_size;
--
-- ret = spi_nor_wait_till_ready(nor);
-- if (ret)
-- goto write_err;
--
-- write_enable(nor);
--
-- ret = nor->write(nor, to + i, page_size, buf + i);
-- if (ret < 0)
-- goto write_err;
-- *retlen += ret;
-- i += ret;
-+ ret = spi_nor_wait_till_ready(nor);
-+ if (ret)
-+ goto write_err;
-+ *retlen += written;
-+ i += written;
-+ if (written != page_remain) {
-+ dev_err(nor->dev,
-+ "While writing %zu bytes written %zd bytes\n",
-+ page_remain, written);
-+ ret = -EIO;
-+ goto write_err;
- }
- }
-
-- ret = spi_nor_wait_till_ready(nor);
- write_err:
- spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
- return ret;
+++ /dev/null
-From 26f9bcad29a6c240881bd4efc90f16a9990dd6c2 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Thu, 5 May 2016 17:31:55 -0700
-Subject: [PATCH 09/10] mtd: spi-nor: add read loop
-
-mtdblock and ubi do not handle the situation when read returns less data
-than requested. Loop in spi-nor until buffer is filled or an error is
-returned.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com>
-Acked-by: Michal Suchanek <hramrach@gmail.com>
-Tested-by: Michal Suchanek <hramrach@gmail.com>
----
- drivers/mtd/spi-nor/spi-nor.c | 25 +++++++++++++++++++------
- 1 file changed, 19 insertions(+), 6 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -890,14 +890,27 @@ static int spi_nor_read(struct mtd_info
- if (ret)
- return ret;
-
-- ret = nor->read(nor, from, len, buf);
-+ while (len) {
-+ ret = nor->read(nor, from, len, buf);
-+ if (ret == 0) {
-+ /* We shouldn't see 0-length reads */
-+ ret = -EIO;
-+ goto read_err;
-+ }
-+ if (ret < 0)
-+ goto read_err;
-
-- spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
-- if (ret < 0)
-- return ret;
-+ WARN_ON(ret > len);
-+ *retlen += ret;
-+ buf += ret;
-+ from += ret;
-+ len -= ret;
-+ }
-+ ret = 0;
-
-- *retlen += ret;
-- return 0;
-+read_err:
-+ spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
-+ return ret;
- }
-
- static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
+++ /dev/null
-From 95193796256cfce16e5d881318e15b6b04062c15 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Thu, 5 May 2016 17:31:56 -0700
-Subject: [PATCH 10/10] mtd: m25p80: read in spi_max_transfer_size chunks
-
-Take into account transfer size limitation of SPI master.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Acked-by: Michal Suchanek <hramrach@gmail.com>
-Tested-by: Michal Suchanek <hramrach@gmail.com>
----
- drivers/mtd/devices/m25p80.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -172,7 +172,7 @@ static ssize_t m25p80_read(struct spi_no
-
- t[1].rx_buf = buf;
- t[1].rx_nbits = m25p80_rx_nbits(nor);
-- t[1].len = len;
-+ t[1].len = min(len, spi_max_transfer_size(spi));
- spi_message_add_tail(&t[1], &m);
-
- ret = spi_sync(spi, &m);
+++ /dev/null
-From a59388668d0ce19dadea909e09f4eb905a27b1ce Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 8 Jun 2016 12:08:43 +0200
-Subject: [PATCH] serial/bcm63xx_uart: use correct alias naming
-
-The bcm63xx_uart driver uses the of alias for determing its id. Recent
-changes in dts files changed the expected 'uartX' to the recommended
-'serialX', breaking serial output. Fix this by checking for a 'serialX'
-alias as well.
-
-Fixes: e3b992d028f8 ("MIPS: BMIPS: Improve BCM6328 device tree")
-Fixes: 2d52ee82b475 ("MIPS: BMIPS: Improve BCM6368 device tree")
-Fixes: 7537d273e2f3 ("MIPS: BMIPS: Add device tree example for BCM6358")
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
-Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/tty/serial/bcm63xx_uart.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
---- a/drivers/tty/serial/bcm63xx_uart.c
-+++ b/drivers/tty/serial/bcm63xx_uart.c
-@@ -813,8 +813,12 @@ static int bcm_uart_probe(struct platfor
- struct clk *clk;
- int ret;
-
-- if (pdev->dev.of_node)
-- pdev->id = of_alias_get_id(pdev->dev.of_node, "uart");
-+ if (pdev->dev.of_node) {
-+ pdev->id = of_alias_get_id(pdev->dev.of_node, "serial");
-+
-+ if (pdev->id < 0)
-+ pdev->id = of_alias_get_id(pdev->dev.of_node, "uart");
-+ }
-
- if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS)
- return -EINVAL;
+++ /dev/null
-From 5090cc6ae2f79ee779e5faf7c8a28edf42b7d738 Mon Sep 17 00:00:00 2001
-From: Heiner Kallweit <hkallweit1@gmail.com>
-Date: Wed, 17 Aug 2016 21:08:01 +0200
-Subject: [PATCH] spi: introduce max_message_size hook in spi_master
-
-Recently a maximum transfer size was was introduced in struct spi_master.
-However there are also spi controllers with a maximum message size, e.g.
-fsl-espi has a max message size of 64KB.
-Introduce a hook max_message_size to deal with such limitations.
-
-Also make sure that spi_max_transfer_size doesn't return greater values
-than spi_max_message_size, even if hook max_transfer_size is not set.
-
-Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- include/linux/spi/spi.h | 25 +++++++++++++++++++++----
- 1 file changed, 21 insertions(+), 4 deletions(-)
-
---- a/include/linux/spi/spi.h
-+++ b/include/linux/spi/spi.h
-@@ -304,6 +304,8 @@ static inline void spi_unregister_driver
- * @min_speed_hz: Lowest supported transfer speed
- * @max_speed_hz: Highest supported transfer speed
- * @flags: other constraints relevant to this driver
-+ * @max_message_size: function that returns the max message size for
-+ * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
- * @bus_lock_spinlock: spinlock for SPI bus locking
- * @bus_lock_mutex: mutex for SPI bus locking
- * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
-@@ -429,10 +431,11 @@ struct spi_master {
- #define SPI_MASTER_MUST_TX BIT(4) /* requires tx */
-
- /*
-- * on some hardware transfer size may be constrained
-+ * on some hardware transfer / message size may be constrained
- * the limit may depend on device transfer settings
- */
- size_t (*max_transfer_size)(struct spi_device *spi);
-+ size_t (*max_message_size)(struct spi_device *spi);
-
- /* lock and mutex for SPI bus locking */
- spinlock_t bus_lock_spinlock;
-@@ -844,12 +847,26 @@ extern int spi_async_locked(struct spi_d
- struct spi_message *message);
-
- static inline size_t
--spi_max_transfer_size(struct spi_device *spi)
-+spi_max_message_size(struct spi_device *spi)
- {
- struct spi_master *master = spi->master;
-- if (!master->max_transfer_size)
-+ if (!master->max_message_size)
- return SIZE_MAX;
-- return master->max_transfer_size(spi);
-+ return master->max_message_size(spi);
-+}
-+
-+static inline size_t
-+spi_max_transfer_size(struct spi_device *spi)
-+{
-+ struct spi_master *master = spi->master;
-+ size_t tr_max = SIZE_MAX;
-+ size_t msg_max = spi_max_message_size(spi);
-+
-+ if (master->max_transfer_size)
-+ tr_max = master->max_transfer_size(spi);
-+
-+ /* transfer size limit must not be greater than messsage size limit */
-+ return min(tr_max, msg_max);
- }
-
- /*---------------------------------------------------------------------------*/
+++ /dev/null
-From 80a79a889ce5df16c5261ab2f1e8e63b94b78102 Mon Sep 17 00:00:00 2001
-From: Heiner Kallweit <hkallweit1@gmail.com>
-Date: Fri, 28 Oct 2016 07:58:46 +0200
-Subject: [PATCH 1/8] mtd: m25p80: consider max message size in m25p80_read
-
-Consider a message size limit when calculating the maximum amount
-of data that can be read.
-
-The message size limit has been introduced with 4.9, so cc it
-to stable.
-
-Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
-Cc: <stable@vger.kernel.org> # 4.9.x
-Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
----
- drivers/mtd/devices/m25p80.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -172,7 +172,8 @@ static ssize_t m25p80_read(struct spi_no
-
- t[1].rx_buf = buf;
- t[1].rx_nbits = m25p80_rx_nbits(nor);
-- t[1].len = min(len, spi_max_transfer_size(spi));
-+ t[1].len = min3(len, spi_max_transfer_size(spi),
-+ spi_max_message_size(spi) - t[0].len);
- spi_message_add_tail(&t[1], &m);
-
- ret = spi_sync(spi, &m);
+++ /dev/null
-From bc0e151514d09cadb56e473a10c783e64e48ce0b Mon Sep 17 00:00:00 2001
-From: Cyrille Pitchen <cyrille.pitchen@atmel.com>
-Date: Tue, 6 Dec 2016 18:14:24 +0100
-Subject: [PATCH] mtd: spi-nor: remove WARN_ONCE() message in spi_nor_write()
-
-This patch removes the WARN_ONCE() test in spi_nor_write().
-This macro triggers the display of a warning message almost every time we
-use a UBI file-system because a write operation is performed at offset 64,
-which is in the middle of the SPI NOR memory page. This is a valid
-operation for ubifs.
-
-Hence this warning is pretty annoying and useless so we just remove it.
-
-Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
-Suggested-by: Richard Weinberger <richard@nod.at>
-Suggested-by: Andras Szemzo <szemzo.andras@gmail.com>
-Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/spi-nor/spi-nor.c | 3 ---
- 1 file changed, 3 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1014,9 +1014,6 @@ static int spi_nor_write(struct mtd_info
- ssize_t written;
-
- page_offset = (to + i) & (nor->page_size - 1);
-- WARN_ONCE(page_offset,
-- "Writing at offset %zu into a NOR page. Writing partial pages may decrease reliability and increase wear of NOR flash.",
-- page_offset);
- /* the size of data remaining on the first page */
- page_remain = min_t(size_t,
- nor->page_size - page_offset, len - i);
+++ /dev/null
-From 3fcc36962c32ad0af2d5904103e2b2b824b6b1aa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 4 Feb 2017 12:32:59 +0100
-Subject: [PATCH 2/8] spi/bcm63xx: make spi subsystem aware of message size
- limits
-
-The bcm63xx LS SPI controller does not allow manual control of the CS
-lines and will toggle it automatically before after sending data, so we
-are limited to messages that fit in the FIFO buffer. Since the CS lines
-aren't available as GPIOs either, we will need to make slave drivers
-aware of this limitation and handle it accordingly.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/spi/spi-bcm63xx.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/drivers/spi/spi-bcm63xx.c
-+++ b/drivers/spi/spi-bcm63xx.c
-@@ -429,6 +429,13 @@ static irqreturn_t bcm63xx_spi_interrupt
- return IRQ_HANDLED;
- }
-
-+static size_t bcm63xx_spi_max_length(struct spi_device *spi)
-+{
-+ struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
-+
-+ return bs->fifo_size;
-+}
-+
- static const unsigned long bcm6348_spi_reg_offsets[] = {
- [SPI_CMD] = SPI_6348_CMD,
- [SPI_INT_STATUS] = SPI_6348_INT_STATUS,
-@@ -542,6 +549,8 @@ static int bcm63xx_spi_probe(struct plat
- master->transfer_one_message = bcm63xx_spi_transfer_one;
- master->mode_bits = MODEBITS;
- master->bits_per_word_mask = SPI_BPW_MASK(8);
-+ master->max_transfer_size = bcm63xx_spi_max_length;
-+ master->max_message_size = bcm63xx_spi_max_length;
- master->auto_runtime_pm = true;
- bs->msg_type_shift = bs->reg_offsets[SPI_MSG_TYPE_SHIFT];
- bs->msg_ctl_width = bs->reg_offsets[SPI_MSG_CTL_WIDTH];
+++ /dev/null
-From 0a0c39044332a75eaf4a3c5654079df953b0d839 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 7 Sep 2015 21:00:38 +0200
-Subject: [PATCH 3/8] spi/bcm63xx: document device tree bindings
-
-Add documentation for the bindings of the low speed SPI controller found
-on most bcm63xx SoCs.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- .../devicetree/bindings/spi/spi-bcm63xx.txt | 33 ++++++++++++++++++++++
- 1 file changed, 33 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
-@@ -0,0 +1,33 @@
-+Binding for Broadcom BCM6348/BCM6358 SPI controller
-+
-+Required properties:
-+- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi".
-+- reg: Base address and size of the controllers memory area.
-+- interrupts: Interrupt for the SPI block.
-+- clocks: phandle of the SPI clock.
-+- clock-names: has to be "spi".
-+- #address-cells: <1>, as required by generic SPI binding.
-+- #size-cells: <0>, also as required by generic SPI binding.
-+
-+Optional properties:
-+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
-+ if absent.
-+
-+Child nodes as per the generic SPI binding.
-+
-+Example:
-+
-+ spi@10000800 {
-+ compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi";
-+ reg = <0x10000800 0x70c>;
-+
-+ interrupts = <1>;
-+
-+ clocks = <&clkctl 9>;
-+ clock-names = "spi";
-+
-+ num-cs = <5>;
-+
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
+++ /dev/null
-From 3353228a04a004ec67073871f40cf58dc4e209aa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 7 Sep 2015 21:01:38 +0200
-Subject: [PATCH 4/8] spi/bcm63xx: add support for probing through devicetree
-
-Add required binding support to probe through device tree.
-
-Use the compatible instead of the resource size for identifiying the
-block type, and allow reducing the number of cs lines through OF.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/spi/spi-bcm63xx.c | 42 ++++++++++++++++++++++++++++++++++++------
- 1 file changed, 36 insertions(+), 6 deletions(-)
-
---- a/drivers/spi/spi-bcm63xx.c
-+++ b/drivers/spi/spi-bcm63xx.c
-@@ -26,6 +26,7 @@
- #include <linux/completion.h>
- #include <linux/err.h>
- #include <linux/pm_runtime.h>
-+#include <linux/of.h>
-
- /* BCM 6338/6348 SPI core */
- #define SPI_6348_RSET_SIZE 64
-@@ -485,21 +486,48 @@ static const struct platform_device_id b
- },
- };
-
-+static const struct of_device_id bcm63xx_spi_of_match[] = {
-+ { .compatible = "brcm,bcm6348-spi", .data = &bcm6348_spi_reg_offsets },
-+ { .compatible = "brcm,bcm6358-spi", .data = &bcm6358_spi_reg_offsets },
-+ { },
-+};
-+
- static int bcm63xx_spi_probe(struct platform_device *pdev)
- {
- struct resource *r;
- const unsigned long *bcm63xx_spireg;
- struct device *dev = &pdev->dev;
-- int irq;
-+ int irq, bus_num;
- struct spi_master *master;
- struct clk *clk;
- struct bcm63xx_spi *bs;
- int ret;
-+ u32 num_cs = BCM63XX_SPI_MAX_CS;
-
-- if (!pdev->id_entry->driver_data)
-- return -EINVAL;
-+ if (dev->of_node) {
-+ const struct of_device_id *match;
-
-- bcm63xx_spireg = (const unsigned long *)pdev->id_entry->driver_data;
-+ match = of_match_node(bcm63xx_spi_of_match, dev->of_node);
-+ if (!match)
-+ return -EINVAL;
-+ bcm63xx_spireg = match->data;
-+
-+ of_property_read_u32(dev->of_node, "num-cs", &num_cs);
-+ if (num_cs > BCM63XX_SPI_MAX_CS) {
-+ dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n",
-+ num_cs);
-+ num_cs = BCM63XX_SPI_MAX_CS;
-+ }
-+
-+ bus_num = -1;
-+ } else if (pdev->id_entry->driver_data) {
-+ const struct platform_device_id *match = pdev->id_entry;
-+
-+ bcm63xx_spireg = (const unsigned long *)match->driver_data;
-+ bus_num = BCM63XX_SPI_BUS_NUM;
-+ } else {
-+ return -EINVAL;
-+ }
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
-@@ -544,8 +572,9 @@ static int bcm63xx_spi_probe(struct plat
- goto out_err;
- }
-
-- master->bus_num = BCM63XX_SPI_BUS_NUM;
-- master->num_chipselect = BCM63XX_SPI_MAX_CS;
-+ master->dev.of_node = dev->of_node;
-+ master->bus_num = bus_num;
-+ master->num_chipselect = num_cs;
- master->transfer_one_message = bcm63xx_spi_transfer_one;
- master->mode_bits = MODEBITS;
- master->bits_per_word_mask = SPI_BPW_MASK(8);
-@@ -634,6 +663,7 @@ static struct platform_driver bcm63xx_sp
- .driver = {
- .name = "bcm63xx-spi",
- .pm = &bcm63xx_spi_pm_ops,
-+ .of_match_table = bcm63xx_spi_of_match,
- },
- .id_table = bcm63xx_spi_dev_match,
- .probe = bcm63xx_spi_probe,
+++ /dev/null
-From d03f23df6ff47898d76f06b3aa5dadcfa1ec8f4f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 19 Feb 2017 23:40:22 +0100
-Subject: [PATCH 1/3] spi/bcm63xx-hsspi: allow providing clock rate through a
- second clock
-
-Instead of requiring the hsspi clock to have a rate, allow using a second
-clock for providing the Hz rate, which is probably more correct anyway.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/spi/spi-bcm63xx-hsspi.c | 12 ++++++++++--
- 1 file changed, 10 insertions(+), 2 deletions(-)
-
---- a/drivers/spi/spi-bcm63xx-hsspi.c
-+++ b/drivers/spi/spi-bcm63xx-hsspi.c
-@@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct pl
- return PTR_ERR(clk);
-
- rate = clk_get_rate(clk);
-- if (!rate)
-- return -EINVAL;
-+ if (!rate) {
-+ struct clk *pll_clk = devm_clk_get(dev, "pll");
-+
-+ if (IS_ERR(pll_clk))
-+ return PTR_ERR(pll_clk);
-+
-+ rate = clk_get_rate(pll_clk);
-+ if (!rate)
-+ return -EINVAL;
-+ }
-
- ret = clk_prepare_enable(clk);
- if (ret)
+++ /dev/null
-From ff759cc25db31bbb3469abb16a0306f110c4c7fa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 10 Sep 2015 14:52:32 +0200
-Subject: [PATCH 2/3] dt-bindings: spi: document bcm63xx HS SPI devicetree
- bindings
-
-Add documentation for the bindings of the high speed SPI controller found
-on newer bcm63xx SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../devicetree/bindings/spi/spi-bcm63xx-hsspi.txt | 33 ++++++++++++++++++++++
- 1 file changed, 33 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
-@@ -0,0 +1,33 @@
-+Binding for Broadcom BCM6328 High Speed SPI controller
-+
-+Required properties:
-+- compatible: must contain of "brcm,bcm6328-hsspi".
-+- reg: Base address and size of the controllers memory area.
-+- interrupts: Interrupt for the SPI block.
-+- clocks: phandles of the SPI clock and the PLL clock.
-+- clock-names: must be "hsspi", "pll".
-+- #address-cells: <1>, as required by generic SPI binding.
-+- #size-cells: <0>, also as required by generic SPI binding.
-+
-+Optional properties:
-+- num-cs: some controllers have less than 8 cs signals. Defaults to 8
-+ if absent.
-+
-+Child nodes as per the generic SPI binding.
-+
-+Example:
-+
-+ spi@10001000 {
-+ compatible = "brcm,bcm6328-hsspi";
-+ reg = <0x10001000 0x600>;
-+
-+ interrupts = <29>;
-+
-+ clocks = <&clkctl 9>, <&hsspi_pll>;
-+ clock-names = "hsspi", "pll";
-+
-+ num-cs = <2>;
-+
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
+++ /dev/null
-From 776041498c2b285a7f745c924e10fc11ef720eae Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 10 Sep 2015 14:53:53 +0200
-Subject: [PATCH 3/3] spi/bcm63xx-hsspi: allow for probing through devicetree
-
-Add required binding support to probe through device tree.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/spi/spi-bcm63xx-hsspi.c | 23 ++++++++++++++++++++---
- 1 file changed, 20 insertions(+), 3 deletions(-)
-
---- a/drivers/spi/spi-bcm63xx-hsspi.c
-+++ b/drivers/spi/spi-bcm63xx-hsspi.c
-@@ -19,6 +19,7 @@
- #include <linux/interrupt.h>
- #include <linux/spi/spi.h>
- #include <linux/mutex.h>
-+#include <linux/of.h>
-
- #define HSSPI_GLOBAL_CTRL_REG 0x0
- #define GLOBAL_CTRL_CS_POLARITY_SHIFT 0
-@@ -91,6 +92,7 @@
-
- #define HSSPI_MAX_SYNC_CLOCK 30000000
-
-+#define HSSPI_SPI_MAX_CS 8
- #define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */
-
- struct bcm63xx_hsspi {
-@@ -332,7 +334,7 @@ static int bcm63xx_hsspi_probe(struct pl
- struct device *dev = &pdev->dev;
- struct clk *clk;
- int irq, ret;
-- u32 reg, rate;
-+ u32 reg, rate, num_cs = HSSPI_SPI_MAX_CS;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
-@@ -382,8 +384,17 @@ static int bcm63xx_hsspi_probe(struct pl
- mutex_init(&bs->bus_mutex);
- init_completion(&bs->done);
-
-- master->bus_num = HSSPI_BUS_NUM;
-- master->num_chipselect = 8;
-+ master->dev.of_node = dev->of_node;
-+ if (!dev->of_node)
-+ master->bus_num = HSSPI_BUS_NUM;
-+
-+ of_property_read_u32(dev->of_node, "num-cs", &num_cs);
-+ if (num_cs > 8) {
-+ dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n",
-+ num_cs);
-+ num_cs = HSSPI_SPI_MAX_CS;
-+ }
-+ master->num_chipselect = num_cs;
- master->setup = bcm63xx_hsspi_setup;
- master->transfer_one_message = bcm63xx_hsspi_transfer_one;
- master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
-@@ -469,10 +480,16 @@ static int bcm63xx_hsspi_resume(struct d
- static SIMPLE_DEV_PM_OPS(bcm63xx_hsspi_pm_ops, bcm63xx_hsspi_suspend,
- bcm63xx_hsspi_resume);
-
-+static const struct of_device_id bcm63xx_hsspi_of_match[] = {
-+ { .compatible = "brcm,bcm6328-hsspi", },
-+ { },
-+};
-+
- static struct platform_driver bcm63xx_hsspi_driver = {
- .driver = {
- .name = "bcm63xx-hsspi",
- .pm = &bcm63xx_hsspi_pm_ops,
-+ .of_match_table = bcm63xx_hsspi_of_match,
- },
- .probe = bcm63xx_hsspi_probe,
- .remove = bcm63xx_hsspi_remove,
+++ /dev/null
-From 69226896ad636b94f6d2e55d75ff21a29c4de83b Mon Sep 17 00:00:00 2001
-From: Roger Quadros <rogerq@ti.com>
-Date: Fri, 21 Apr 2017 16:15:38 +0300
-Subject: [PATCH] mdio_bus: Issue GPIO RESET to PHYs.
-
-Some boards [1] leave the PHYs at an invalid state
-during system power-up or reset thus causing unreliability
-issues with the PHY which manifests as PHY not being detected
-or link not functional. To fix this, these PHYs need to be RESET
-via a GPIO connected to the PHY's RESET pin.
-
-Some boards have a single GPIO controlling the PHY RESET pin of all
-PHYs on the bus whereas some others have separate GPIOs controlling
-individual PHY RESETs.
-
-In both cases, the RESET de-assertion cannot be done in the PHY driver
-as the PHY will not probe till its reset is de-asserted.
-So do the RESET de-assertion in the MDIO bus driver.
-
-[1] - am572x-idk, am571x-idk, a437x-idk
-
-Signed-off-by: Roger Quadros <rogerq@ti.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- Documentation/devicetree/bindings/net/mdio.txt | 33 ++++++++++++++++++
- drivers/net/phy/mdio_bus.c | 47 ++++++++++++++++++++++++++
- drivers/of/of_mdio.c | 7 ++++
- include/linux/phy.h | 7 ++++
- 4 files changed, 94 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/net/mdio.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/net/mdio.txt
-@@ -0,0 +1,33 @@
-+Common MDIO bus properties.
-+
-+These are generic properties that can apply to any MDIO bus.
-+
-+Optional properties:
-+- reset-gpios: List of one or more GPIOs that control the RESET lines
-+ of the PHYs on that MDIO bus.
-+- reset-delay-us: RESET pulse width in microseconds as per PHY datasheet.
-+
-+A list of child nodes, one per device on the bus is expected. These
-+should follow the generic phy.txt, or a device specific binding document.
-+
-+Example :
-+This example shows these optional properties, plus other properties
-+required for the TI Davinci MDIO driver.
-+
-+ davinci_mdio: ethernet@0x5c030000 {
-+ compatible = "ti,davinci_mdio";
-+ reg = <0x5c030000 0x1000>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
-+ reset-delay-us = <2>; /* PHY datasheet states 1us min */
-+
-+ ethphy0: ethernet-phy@1 {
-+ reg = <1>;
-+ };
-+
-+ ethphy1: ethernet-phy@3 {
-+ reg = <3>;
-+ };
-+ };
---- a/drivers/net/phy/mdio_bus.c
-+++ b/drivers/net/phy/mdio_bus.c
-@@ -22,8 +22,11 @@
- #include <linux/init.h>
- #include <linux/delay.h>
- #include <linux/device.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/consumer.h>
- #include <linux/of_device.h>
- #include <linux/of_mdio.h>
-+#include <linux/of_gpio.h>
- #include <linux/netdevice.h>
- #include <linux/etherdevice.h>
- #include <linux/skbuff.h>
-@@ -252,6 +255,7 @@ static inline void of_mdiobus_link_phyde
- int __mdiobus_register(struct mii_bus *bus, struct module *owner)
- {
- int i, err;
-+ struct gpio_desc *gpiod;
-
- if (NULL == bus || NULL == bus->name ||
- NULL == bus->read || NULL == bus->write)
-@@ -278,6 +282,35 @@ int __mdiobus_register(struct mii_bus *b
- if (bus->reset)
- bus->reset(bus);
-
-+ /* de-assert bus level PHY GPIO resets */
-+ if (bus->num_reset_gpios > 0) {
-+ bus->reset_gpiod = devm_kcalloc(&bus->dev,
-+ bus->num_reset_gpios,
-+ sizeof(struct gpio_desc *),
-+ GFP_KERNEL);
-+ if (!bus->reset_gpiod)
-+ return -ENOMEM;
-+ }
-+
-+ for (i = 0; i < bus->num_reset_gpios; i++) {
-+ gpiod = devm_gpiod_get_index(&bus->dev, "reset", i,
-+ GPIOD_OUT_LOW);
-+ if (IS_ERR(gpiod)) {
-+ err = PTR_ERR(gpiod);
-+ if (err != -ENOENT) {
-+ dev_err(&bus->dev,
-+ "mii_bus %s couldn't get reset GPIO\n",
-+ bus->id);
-+ return err;
-+ }
-+ } else {
-+ bus->reset_gpiod[i] = gpiod;
-+ gpiod_set_value_cansleep(gpiod, 1);
-+ udelay(bus->reset_delay_us);
-+ gpiod_set_value_cansleep(gpiod, 0);
-+ }
-+ }
-+
- for (i = 0; i < PHY_MAX_ADDR; i++) {
- if ((bus->phy_mask & (1 << i)) == 0) {
- struct phy_device *phydev;
-@@ -302,6 +335,13 @@ error:
- phy_device_free(phydev);
- }
- }
-+
-+ /* Put PHYs in RESET to save power */
-+ for (i = 0; i < bus->num_reset_gpios; i++) {
-+ if (bus->reset_gpiod[i])
-+ gpiod_set_value_cansleep(bus->reset_gpiod[i], 1);
-+ }
-+
- device_del(&bus->dev);
- return err;
- }
-@@ -321,6 +361,13 @@ void mdiobus_unregister(struct mii_bus *
- phy_device_free(phydev);
- }
- }
-+
-+ /* Put PHYs in RESET to save power */
-+ for (i = 0; i < bus->num_reset_gpios; i++) {
-+ if (bus->reset_gpiod[i])
-+ gpiod_set_value_cansleep(bus->reset_gpiod[i], 1);
-+ }
-+
- device_del(&bus->dev);
- }
- EXPORT_SYMBOL(mdiobus_unregister);
---- a/drivers/of/of_mdio.c
-+++ b/drivers/of/of_mdio.c
-@@ -21,6 +21,8 @@
- #include <linux/of_mdio.h>
- #include <linux/module.h>
-
-+#define DEFAULT_GPIO_RESET_DELAY 10 /* in microseconds */
-+
- MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
- MODULE_LICENSE("GPL");
-
-@@ -140,6 +142,11 @@ int of_mdiobus_register(struct mii_bus *
-
- mdio->dev.of_node = np;
-
-+ /* Get bus level PHY reset GPIO details */
-+ mdio->reset_delay_us = DEFAULT_GPIO_RESET_DELAY;
-+ of_property_read_u32(np, "reset-delay-us", &mdio->reset_delay_us);
-+ mdio->num_reset_gpios = of_gpio_named_count(np, "reset-gpios");
-+
- /* Register the MDIO bus */
- rc = mdiobus_register(mdio);
- if (rc)
---- a/include/linux/phy.h
-+++ b/include/linux/phy.h
-@@ -187,6 +187,13 @@ struct mii_bus {
- * interrupt at the index matching its address
- */
- int *irq;
-+
-+ /* GPIO reset pulse width in microseconds */
-+ int reset_delay_us;
-+ /* Number of reset GPIOs */
-+ int num_reset_gpios;
-+ /* Array of RESET GPIO descriptors */
-+ struct gpio_desc **reset_gpiod;
- };
- #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
-
+++ /dev/null
-From df0c8d911abf6ba97b2c2fc3c5a12769e0b081a3 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <f.fainelli@gmail.com>
-Date: Thu, 11 May 2017 11:24:16 -0700
-Subject: [PATCH] net: phy: Call bus->reset() after releasing PHYs from reset
-
-The API convention makes it that a given MDIO bus reset should be able
-to access PHY devices in its reset() callback and perform additional
-MDIO accesses in order to bring the bus and PHYs in a working state.
-
-Commit 69226896ad63 ("mdio_bus: Issue GPIO RESET to PHYs.") broke that
-contract by first calling bus->reset() and then release all PHYs from
-reset using their shared GPIO line, so restore the expected
-functionality here.
-
-Fixes: 69226896ad63 ("mdio_bus: Issue GPIO RESET to PHYs.")
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/phy/mdio_bus.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/net/phy/mdio_bus.c
-+++ b/drivers/net/phy/mdio_bus.c
-@@ -279,9 +279,6 @@ int __mdiobus_register(struct mii_bus *b
-
- mutex_init(&bus->mdio_lock);
-
-- if (bus->reset)
-- bus->reset(bus);
--
- /* de-assert bus level PHY GPIO resets */
- if (bus->num_reset_gpios > 0) {
- bus->reset_gpiod = devm_kcalloc(&bus->dev,
-@@ -311,6 +308,9 @@ int __mdiobus_register(struct mii_bus *b
- }
- }
-
-+ if (bus->reset)
-+ bus->reset(bus);
-+
- for (i = 0; i < PHY_MAX_ADDR; i++) {
- if ((bus->phy_mask & (1 << i)) == 0) {
- struct phy_device *phydev;
+++ /dev/null
-From dc90895d776d7b8017bc3b14f588d569d8edbe1f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 11 May 2017 13:36:52 +0200
-Subject: [PATCH] leds: bcm6328: fix signal source assignment for high leds
-
-Each nibble represents 4 LEDs, and in case of the higher register, bit 0
-represents LED 4, so we need to use modulus for the LED number as well.
-
-Fixes: fd7b025a238d0a5440bfa26c585eb78097bf48dc ("leds: add BCM6328 LED driver")
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/leds/leds-bcm6328.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/leds/leds-bcm6328.c
-+++ b/drivers/leds/leds-bcm6328.c
-@@ -224,7 +224,7 @@ static int bcm6328_hwled(struct device *
-
- spin_lock_irqsave(lock, flags);
- val = bcm6328_led_read(addr);
-- val |= (BIT(reg) << (((sel % 4) * 4) + 16));
-+ val |= (BIT(reg % 4) << (((sel % 4) * 4) + 16));
- bcm6328_led_write(addr, val);
- spin_unlock_irqrestore(lock, flags);
- }
-@@ -251,7 +251,7 @@ static int bcm6328_hwled(struct device *
-
- spin_lock_irqsave(lock, flags);
- val = bcm6328_led_read(addr);
-- val |= (BIT(reg) << ((sel % 4) * 4));
-+ val |= (BIT(reg % 4) << ((sel % 4) * 4));
- bcm6328_led_write(addr, val);
- spin_unlock_irqrestore(lock, flags);
- }
+++ /dev/null
-From d396e84c56047b303cac378dde4b2e5cc430b336 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 12 Jun 2017 23:55:38 +0300
-Subject: [PATCH] mdio_bus: handle only single PHY reset GPIO
-
-Commit 4c5e7a2c0501 ("dt-bindings: mdio: Clarify binding document")
-declared that a MDIO reset GPIO property should have only a single GPIO
-reference/specifier, however the supporting code was left intact, still
-burdening the kernel with now apparently useless loops -- get rid of them.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/phy/mdio_bus.c | 53 +++++++++++++++++-----------------------------
- drivers/of/of_mdio.c | 1 -
- include/linux/phy.h | 6 ++----
- 3 files changed, 21 insertions(+), 39 deletions(-)
-
---- a/drivers/net/phy/mdio_bus.c
-+++ b/drivers/net/phy/mdio_bus.c
-@@ -279,33 +279,22 @@ int __mdiobus_register(struct mii_bus *b
-
- mutex_init(&bus->mdio_lock);
-
-- /* de-assert bus level PHY GPIO resets */
-- if (bus->num_reset_gpios > 0) {
-- bus->reset_gpiod = devm_kcalloc(&bus->dev,
-- bus->num_reset_gpios,
-- sizeof(struct gpio_desc *),
-- GFP_KERNEL);
-- if (!bus->reset_gpiod)
-- return -ENOMEM;
-- }
--
-- for (i = 0; i < bus->num_reset_gpios; i++) {
-- gpiod = devm_gpiod_get_index(&bus->dev, "reset", i,
-- GPIOD_OUT_LOW);
-- if (IS_ERR(gpiod)) {
-- err = PTR_ERR(gpiod);
-- if (err != -ENOENT) {
-- dev_err(&bus->dev,
-- "mii_bus %s couldn't get reset GPIO\n",
-- bus->id);
-- return err;
-- }
-- } else {
-- bus->reset_gpiod[i] = gpiod;
-- gpiod_set_value_cansleep(gpiod, 1);
-- udelay(bus->reset_delay_us);
-- gpiod_set_value_cansleep(gpiod, 0);
-+ /* de-assert bus level PHY GPIO reset */
-+ gpiod = devm_gpiod_get(&bus->dev, "reset", GPIOD_OUT_LOW);
-+ if (IS_ERR(gpiod)) {
-+ err = PTR_ERR(gpiod);
-+ if (err != -ENOENT) {
-+ dev_err(&bus->dev,
-+ "mii_bus %s couldn't get reset GPIO\n",
-+ bus->id);
-+ return err;
- }
-+ } else {
-+ bus->reset_gpiod = gpiod;
-+
-+ gpiod_set_value_cansleep(gpiod, 1);
-+ udelay(bus->reset_delay_us);
-+ gpiod_set_value_cansleep(gpiod, 0);
- }
-
- if (bus->reset)
-@@ -337,10 +326,8 @@ error:
- }
-
- /* Put PHYs in RESET to save power */
-- for (i = 0; i < bus->num_reset_gpios; i++) {
-- if (bus->reset_gpiod[i])
-- gpiod_set_value_cansleep(bus->reset_gpiod[i], 1);
-- }
-+ if (bus->reset_gpiod)
-+ gpiod_set_value_cansleep(bus->reset_gpiod, 1);
-
- device_del(&bus->dev);
- return err;
-@@ -363,10 +350,8 @@ void mdiobus_unregister(struct mii_bus *
- }
-
- /* Put PHYs in RESET to save power */
-- for (i = 0; i < bus->num_reset_gpios; i++) {
-- if (bus->reset_gpiod[i])
-- gpiod_set_value_cansleep(bus->reset_gpiod[i], 1);
-- }
-+ if (bus->reset_gpiod)
-+ gpiod_set_value_cansleep(bus->reset_gpiod, 1);
-
- device_del(&bus->dev);
- }
---- a/drivers/of/of_mdio.c
-+++ b/drivers/of/of_mdio.c
-@@ -145,7 +145,6 @@ int of_mdiobus_register(struct mii_bus *
- /* Get bus level PHY reset GPIO details */
- mdio->reset_delay_us = DEFAULT_GPIO_RESET_DELAY;
- of_property_read_u32(np, "reset-delay-us", &mdio->reset_delay_us);
-- mdio->num_reset_gpios = of_gpio_named_count(np, "reset-gpios");
-
- /* Register the MDIO bus */
- rc = mdiobus_register(mdio);
---- a/include/linux/phy.h
-+++ b/include/linux/phy.h
-@@ -190,10 +190,8 @@ struct mii_bus {
-
- /* GPIO reset pulse width in microseconds */
- int reset_delay_us;
-- /* Number of reset GPIOs */
-- int num_reset_gpios;
-- /* Array of RESET GPIO descriptors */
-- struct gpio_desc **reset_gpiod;
-+ /* RESET GPIO descriptor pointer */
-+ struct gpio_desc *reset_gpiod;
- };
- #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
-
+++ /dev/null
-From fe0e4052fb11d5c713961ab7e136520be40052a3 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 12 Jun 2017 23:55:39 +0300
-Subject: [PATCH] mdio_bus: use devm_gpiod_get_optional()
-
-The MDIO reset GPIO is really a classical optional GPIO property case,
-so devm_gpiod_get_optional() should have been used, not devm_gpiod_get().
-Doing this saves several LoCs...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/phy/mdio_bus.c | 14 +++++---------
- 1 file changed, 5 insertions(+), 9 deletions(-)
-
---- a/drivers/net/phy/mdio_bus.c
-+++ b/drivers/net/phy/mdio_bus.c
-@@ -280,16 +280,12 @@ int __mdiobus_register(struct mii_bus *b
- mutex_init(&bus->mdio_lock);
-
- /* de-assert bus level PHY GPIO reset */
-- gpiod = devm_gpiod_get(&bus->dev, "reset", GPIOD_OUT_LOW);
-+ gpiod = devm_gpiod_get_optional(&bus->dev, "reset", GPIOD_OUT_LOW);
- if (IS_ERR(gpiod)) {
-- err = PTR_ERR(gpiod);
-- if (err != -ENOENT) {
-- dev_err(&bus->dev,
-- "mii_bus %s couldn't get reset GPIO\n",
-- bus->id);
-- return err;
-- }
-- } else {
-+ dev_err(&bus->dev, "mii_bus %s couldn't get reset GPIO\n",
-+ bus->id);
-+ return PTR_ERR(gpiod);
-+ } else if (gpiod) {
- bus->reset_gpiod = gpiod;
-
- gpiod_set_value_cansleep(gpiod, 1);
+++ /dev/null
-From e74caf41aec5338b8cbbd0a1483650848f16f532 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:23:47 +0200
-Subject: [PATCH V2 1/8] MIPS: BCM63XX: add clkdev lookup support
-
-Enable clkdev lookup support to allow us providing clocks under
-different names to devices more easily, so we don't need to care
-about clock name clashes anymore.
-
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/Kconfig | 1 +
- arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++-----------
- 2 files changed, 116 insertions(+), 35 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -214,6 +214,7 @@ config BCM63XX
- select ARCH_REQUIRE_GPIOLIB
- select HAVE_CLK
- select MIPS_L1_CACHE_SHIFT_4
-+ select CLKDEV_LOOKUP
- help
- Support for BCM63XX based boards
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -10,6 +10,7 @@
- #include <linux/mutex.h>
- #include <linux/err.h>
- #include <linux/clk.h>
-+#include <linux/clkdev.h>
- #include <linux/delay.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_io.h>
-@@ -352,44 +353,103 @@ long clk_round_rate(struct clk *clk, uns
- }
- EXPORT_SYMBOL_GPL(clk_round_rate);
-
--struct clk *clk_get(struct device *dev, const char *id)
--{
-- if (!strcmp(id, "enet0"))
-- return &clk_enet0;
-- if (!strcmp(id, "enet1"))
-- return &clk_enet1;
-- if (!strcmp(id, "enetsw"))
-- return &clk_enetsw;
-- if (!strcmp(id, "ephy"))
-- return &clk_ephy;
-- if (!strcmp(id, "usbh"))
-- return &clk_usbh;
-- if (!strcmp(id, "usbd"))
-- return &clk_usbd;
-- if (!strcmp(id, "spi"))
-- return &clk_spi;
-- if (!strcmp(id, "hsspi"))
-- return &clk_hsspi;
-- if (!strcmp(id, "xtm"))
-- return &clk_xtm;
-- if (!strcmp(id, "periph"))
-- return &clk_periph;
-- if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
-- return &clk_pcm;
-- if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
-- return &clk_ipsec;
-- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
-- return &clk_pcie;
-- return ERR_PTR(-ENOENT);
--}
--
--EXPORT_SYMBOL(clk_get);
--
--void clk_put(struct clk *clk)
--{
--}
--
--EXPORT_SYMBOL(clk_put);
-+static struct clk_lookup bcm3368_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+};
-+
-+static struct clk_lookup bcm6328_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+};
-+
-+static struct clk_lookup bcm6338_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+};
-+
-+static struct clk_lookup bcm6345_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+};
-+
-+static struct clk_lookup bcm6348_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+};
-+
-+static struct clk_lookup bcm6358_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+};
-+
-+static struct clk_lookup bcm6362_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
-+};
-+
-+static struct clk_lookup bcm6368_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "xtm", &clk_xtm),
-+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
-+};
-
- #define HSSPI_PLL_HZ_6328 133333333
- #define HSSPI_PLL_HZ_6362 400000000
-@@ -397,11 +457,31 @@ EXPORT_SYMBOL(clk_put);
- static int __init bcm63xx_clk_init(void)
- {
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM3368_CPU_ID:
-+ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
-+ break;
- case BCM6328_CPU_ID:
- clk_hsspi.rate = HSSPI_PLL_HZ_6328;
-+ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
-+ break;
-+ case BCM6338_CPU_ID:
-+ clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks));
-+ break;
-+ case BCM6345_CPU_ID:
-+ clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks));
-+ break;
-+ case BCM6348_CPU_ID:
-+ clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks));
-+ break;
-+ case BCM6358_CPU_ID:
-+ clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
- break;
- case BCM6362_CPU_ID:
- clk_hsspi.rate = HSSPI_PLL_HZ_6362;
-+ clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
-+ break;
-+ case BCM6368_CPU_ID:
-+ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
- break;
- }
-
+++ /dev/null
-From d0322bf7bebe87012b4f95c85be6b5ba0cb6f344 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:31:44 +0200
-Subject: [PATCH V2 2/8] MIPS: BCM63XX: provide periph clock as refclk for uart
-
-Add a lookup as "refclk" to describe its function for the uarts.
-
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -356,6 +356,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
- static struct clk_lookup bcm3368_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -369,6 +371,8 @@ static struct clk_lookup bcm3368_clks[]
- static struct clk_lookup bcm6328_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[]
- static struct clk_lookup bcm6338_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -392,6 +397,7 @@ static struct clk_lookup bcm6338_clks[]
- static struct clk_lookup bcm6345_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -404,6 +410,7 @@ static struct clk_lookup bcm6345_clks[]
- static struct clk_lookup bcm6348_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -416,6 +423,8 @@ static struct clk_lookup bcm6348_clks[]
- static struct clk_lookup bcm6358_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -429,6 +438,8 @@ static struct clk_lookup bcm6358_clks[]
- static struct clk_lookup bcm6362_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -442,6 +453,8 @@ static struct clk_lookup bcm6362_clks[]
- static struct clk_lookup bcm6368_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+++ /dev/null
-From 8124706e6040b1cf0d2dd3a05759df6cec4bddfb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:32:37 +0200
-Subject: [PATCH V2 3/8] tty/bcm63xx_uart: use refclk for the expected clock
- name
-
-We now have the clock available under refclk, so use that.
-
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/tty/serial/bcm63xx_uart.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/tty/serial/bcm63xx_uart.c
-+++ b/drivers/tty/serial/bcm63xx_uart.c
-@@ -842,7 +842,7 @@ static int bcm_uart_probe(struct platfor
- return -ENODEV;
-
- clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
-- clk_get(&pdev->dev, "periph");
-+ clk_get(&pdev->dev, "refclk");
- if (IS_ERR(clk))
- return -ENODEV;
-
+++ /dev/null
-From 317f8659bba01b307cbe4e9902d4e3d333fd7164 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:39:17 +0200
-Subject: [PATCH V2 4/8] tty/bcm63xx_uart: allow naming clock in device tree
-
-Codify using a named clock for the refclk of the uart. This makes it
-easier if we might need to add a gating clock (like present on the
-BCM6345).
-
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt | 6 ++++++
- drivers/tty/serial/bcm63xx_uart.c | 6 ++++--
- 2 files changed, 10 insertions(+), 2 deletions(-)
-
---- a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
-+++ b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
-@@ -11,6 +11,11 @@ Required properties:
- - clocks: Clock driving the hardware; used to figure out the baud rate
- divisor.
-
-+
-+Optional properties:
-+
-+- clock-names: Should be "refclk".
-+
- Example:
-
- uart0: serial@14e00520 {
-@@ -19,6 +24,7 @@ Example:
- interrupt-parent = <&periph_intc>;
- interrupts = <2>;
- clocks = <&periph_clk>;
-+ clock-names = "refclk";
- };
-
- clocks {
---- a/drivers/tty/serial/bcm63xx_uart.c
-+++ b/drivers/tty/serial/bcm63xx_uart.c
-@@ -841,8 +841,10 @@ static int bcm_uart_probe(struct platfor
- if (!res_irq)
- return -ENODEV;
-
-- clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
-- clk_get(&pdev->dev, "refclk");
-+ clk = clk_get(&pdev->dev, "refclk");
-+ if (IS_ERR(clk) && pdev->dev.of_node)
-+ clk = of_clk_get(pdev->dev.of_node, 0);
-+
- if (IS_ERR(clk))
- return -ENODEV;
-
+++ /dev/null
-From cb86630379c8f3432c916d62045b5176f17f4123 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:57:21 +0200
-Subject: [PATCH V2 6/8] MIPS: BCM63XX: move the HSSPI PLL HZ into its own
- clock
-
-Split up the HSSPL clock into rate and a gate clock, to more closely
-match the actual hardware.
-
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -247,6 +247,10 @@ static struct clk clk_hsspi = {
- .set = hsspi_set,
- };
-
-+/*
-+ * HSSPI PLL
-+ */
-+static struct clk clk_hsspi_pll;
-
- /*
- * XTM clock
-@@ -373,6 +377,7 @@ static struct clk_lookup bcm6328_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -440,6 +445,7 @@ static struct clk_lookup bcm6362_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -474,7 +480,7 @@ static int __init bcm63xx_clk_init(void)
- clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
- break;
- case BCM6328_CPU_ID:
-- clk_hsspi.rate = HSSPI_PLL_HZ_6328;
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
- clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
- break;
- case BCM6338_CPU_ID:
-@@ -490,7 +496,7 @@ static int __init bcm63xx_clk_init(void)
- clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
- break;
- case BCM6362_CPU_ID:
-- clk_hsspi.rate = HSSPI_PLL_HZ_6362;
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
- clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
- break;
- case BCM6368_CPU_ID:
+++ /dev/null
-From 6d43970a2eb1c7ee88caf7328d201f9c001262e9 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:48:41 +0200
-Subject: [PATCH V2 7/8] MIPS: BCM63XX: provide enet clocks as "enet" to the
- ethernet devices
-
-Add lookups to provide the appropriate enetX clocks as just "enet" to
-the ethernet devices.
-
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -370,6 +370,8 @@ static struct clk_lookup bcm3368_clks[]
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
- CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
-+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
-
- static struct clk_lookup bcm6328_clks[] = {
-@@ -397,6 +399,7 @@ static struct clk_lookup bcm6338_clks[]
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
- };
-
- static struct clk_lookup bcm6345_clks[] = {
-@@ -410,6 +413,7 @@ static struct clk_lookup bcm6345_clks[]
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
- };
-
- static struct clk_lookup bcm6348_clks[] = {
-@@ -423,6 +427,8 @@ static struct clk_lookup bcm6348_clks[]
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
-+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc),
- };
-
- static struct clk_lookup bcm6358_clks[] = {
-@@ -438,6 +444,8 @@ static struct clk_lookup bcm6358_clks[]
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
- CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
-+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
-
- static struct clk_lookup bcm6362_clks[] = {
+++ /dev/null
-From b98027285bd1fa95da0645a4234a5fc1f1a83f92 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 26 Feb 2017 11:59:52 +0100
-Subject: [PATCH V2 8/8] MIPS: BCM63XX: split out swpkt_sar/usb clocks
-
-Make the secondary switch clocks their own clocks. This allows proper
-enable reference counting between SAR/XTM and the main switch clocks,
-and controlling them individually from drivers.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 61 +++++++++++++++++++++++++++++++++++++++++--------
- 1 file changed, 51 insertions(+), 10 deletions(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -121,21 +121,56 @@ static struct clk clk_ephy = {
- };
-
- /*
-+ * Ethernet switch SAR clock
-+ */
-+static void swpkt_sar_set(struct clk *clk, int enable)
-+{
-+ if (BCMCPU_IS_6368())
-+ bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable);
-+ else
-+ return;
-+}
-+
-+static struct clk clk_swpkt_sar = {
-+ .set = swpkt_sar_set,
-+};
-+
-+/*
-+ * Ethernet switch USB clock
-+ */
-+static void swpkt_usb_set(struct clk *clk, int enable)
-+{
-+ if (BCMCPU_IS_6368())
-+ bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable);
-+ else
-+ return;
-+}
-+
-+static struct clk clk_swpkt_usb = {
-+ .set = swpkt_usb_set,
-+};
-+
-+/*
- * Ethernet switch clock
- */
- static void enetsw_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
-- else if (BCMCPU_IS_6362())
-+ } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
-- else if (BCMCPU_IS_6368())
-- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
-- CKCTL_6368_SWPKT_USB_EN |
-- CKCTL_6368_SWPKT_SAR_EN,
-- enable);
-- else
-+ } else if (BCMCPU_IS_6368()) {
-+ if (enable) {
-+ clk_enable_unlocked(&clk_swpkt_sar);
-+ clk_enable_unlocked(&clk_swpkt_usb);
-+ } else {
-+ clk_disable_unlocked(&clk_swpkt_usb);
-+ clk_disable_unlocked(&clk_swpkt_sar);
-+ }
-+ bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
-+ } else {
- return;
-+ }
-
- if (enable) {
- /* reset switch core afer clock change */
-@@ -260,8 +295,12 @@ static void xtm_set(struct clk *clk, int
- if (!BCMCPU_IS_6368())
- return;
-
-- bcm_hwclock_set(CKCTL_6368_SAR_EN |
-- CKCTL_6368_SWPKT_SAR_EN, enable);
-+ if (enable)
-+ clk_enable_unlocked(&clk_swpkt_sar);
-+ else
-+ clk_disable_unlocked(&clk_swpkt_sar);
-+
-+ bcm_hwclock_set(CKCTL_6368_SAR_EN, enable);
-
- if (enable) {
- /* reset sar core afer clock change */
-@@ -444,6 +483,8 @@ static struct clk_lookup bcm6358_clks[]
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
- CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+ CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar),
-+ CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb),
- CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
- CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
+++ /dev/null
-From d0423d3e4fa7ae305729cb50369427f075ccb279 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 25 Feb 2017 12:41:28 +0100
-Subject: [PATCH 1/6] bcm63xx_enet: correct clock usage
-
-Check the return code of prepare_enable and change one last instance of
-enable only to prepare_enable. Also properly disable and release the
-clock in error paths and on remove for enetsw.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 31 +++++++++++++++++++++-------
- 1 file changed, 23 insertions(+), 8 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1787,7 +1787,9 @@ static int bcm_enet_probe(struct platfor
- ret = PTR_ERR(priv->mac_clk);
- goto out;
- }
-- clk_prepare_enable(priv->mac_clk);
-+ ret = clk_prepare_enable(priv->mac_clk);
-+ if (ret)
-+ goto out_put_clk_mac;
-
- /* initialize default and fetch platform data */
- priv->rx_ring_size = BCMENET_DEF_RX_DESC;
-@@ -1819,9 +1821,11 @@ static int bcm_enet_probe(struct platfor
- if (IS_ERR(priv->phy_clk)) {
- ret = PTR_ERR(priv->phy_clk);
- priv->phy_clk = NULL;
-- goto out_put_clk_mac;
-+ goto out_disable_clk_mac;
- }
-- clk_prepare_enable(priv->phy_clk);
-+ ret = clk_prepare_enable(priv->phy_clk);
-+ if (ret)
-+ goto out_put_clk_phy;
- }
-
- /* do minimal hardware init to be able to probe mii bus */
-@@ -1921,13 +1925,16 @@ out_free_mdio:
- out_uninit_hw:
- /* turn off mdc clock */
- enet_writel(priv, 0, ENET_MIISC_REG);
-- if (priv->phy_clk) {
-+ if (priv->phy_clk)
- clk_disable_unprepare(priv->phy_clk);
-+
-+out_put_clk_phy:
-+ if (priv->phy_clk)
- clk_put(priv->phy_clk);
-- }
-
--out_put_clk_mac:
-+out_disable_clk_mac:
- clk_disable_unprepare(priv->mac_clk);
-+out_put_clk_mac:
- clk_put(priv->mac_clk);
- out:
- free_netdev(dev);
-@@ -2772,7 +2779,9 @@ static int bcm_enetsw_probe(struct platf
- ret = PTR_ERR(priv->mac_clk);
- goto out_unmap;
- }
-- clk_enable(priv->mac_clk);
-+ ret = clk_prepare_enable(priv->mac_clk);
-+ if (ret)
-+ goto out_put_clk;
-
- priv->rx_chan = 0;
- priv->tx_chan = 1;
-@@ -2793,7 +2802,7 @@ static int bcm_enetsw_probe(struct platf
-
- ret = register_netdev(dev);
- if (ret)
-- goto out_put_clk;
-+ goto out_disable_clk;
-
- netif_carrier_off(dev);
- platform_set_drvdata(pdev, dev);
-@@ -2802,6 +2811,9 @@ static int bcm_enetsw_probe(struct platf
-
- return 0;
-
-+out_disable_clk:
-+ clk_disable_unprepare(priv->mac_clk);
-+
- out_put_clk:
- clk_put(priv->mac_clk);
-
-@@ -2833,6 +2845,9 @@ static int bcm_enetsw_remove(struct plat
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- release_mem_region(res->start, resource_size(res));
-
-+ clk_disable_unprepare(priv->mac_clk);
-+ clk_put(priv->mac_clk);
-+
- free_netdev(dev);
- return 0;
- }
+++ /dev/null
-From 23d94cb855b6f4f0ee1c01679224472104ac6440 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 30 Sep 2017 14:10:18 +0200
-Subject: [PATCH 2/6] bcm63xx_enet: do not write to random DMA channel on
- BCM6345
-
-The DMA controller regs actually point to DMA channel 0, so the write to
-ENETDMA_CFG_REG will actually modify a random DMA channel.
-
-Since DMA controller registers do not exist on BCM6345, guard the write
-with the usual check for dma_has_sram.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1063,7 +1063,8 @@ static int bcm_enet_open(struct net_devi
- val = enet_readl(priv, ENET_CTL_REG);
- val |= ENET_CTL_ENABLE_MASK;
- enet_writel(priv, val, ENET_CTL_REG);
-- enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
-+ if (priv->dma_has_sram)
-+ enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
- enet_dmac_writel(priv, priv->dma_chan_en_mask,
- ENETDMAC_CHANCFG, priv->rx_chan);
-
+++ /dev/null
-From 71710bb6cbc82f411a4e5faafa0c3178e48e7137 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 30 May 2017 13:31:45 +0200
-Subject: [PATCH 3/6] bcm63xx_enet: do not rely on probe order
-
-Do not rely on the shared device being probed before the enet(sw)
-devices. This makes it easier to eventually move out the shared
-device as a dma controller driver (what it should be).
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 9 ++-------
- 1 file changed, 2 insertions(+), 7 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1736,10 +1736,8 @@ static int bcm_enet_probe(struct platfor
- const char *clk_name;
- int i, ret;
-
-- /* stop if shared driver failed, assume driver->probe will be
-- * called in the same order we register devices (correct ?) */
- if (!bcm_enet_shared_base[0])
-- return -ENODEV;
-+ return -EPROBE_DEFER;
-
- res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- res_irq_rx = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
-@@ -2720,11 +2718,8 @@ static int bcm_enetsw_probe(struct platf
- struct resource *res_mem;
- int ret, irq_rx, irq_tx;
-
-- /* stop if shared driver failed, assume driver->probe will be
-- * called in the same order we register devices (correct ?)
-- */
- if (!bcm_enet_shared_base[0])
-- return -ENODEV;
-+ return -EPROBE_DEFER;
-
- res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- irq_rx = platform_get_irq(pdev, 0);
+++ /dev/null
-From 179a445ae4ef36ec44f4aea18e5f42d21334d186 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 25 Feb 2017 12:39:25 +0100
-Subject: [PATCH 4/6] bcm63xx_enet: use managed functions for clock/ioremap
-
-Use managed functions where possible to reduce the amount of resource
-handling on error and remove paths.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 54 +++++++---------------------
- 1 file changed, 12 insertions(+), 42 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1781,14 +1781,14 @@ static int bcm_enet_probe(struct platfor
- clk_name = "enet1";
- }
-
-- priv->mac_clk = clk_get(&pdev->dev, clk_name);
-+ priv->mac_clk = devm_clk_get(&pdev->dev, clk_name);
- if (IS_ERR(priv->mac_clk)) {
- ret = PTR_ERR(priv->mac_clk);
- goto out;
- }
- ret = clk_prepare_enable(priv->mac_clk);
- if (ret)
-- goto out_put_clk_mac;
-+ goto out;
-
- /* initialize default and fetch platform data */
- priv->rx_ring_size = BCMENET_DEF_RX_DESC;
-@@ -1816,7 +1816,7 @@ static int bcm_enet_probe(struct platfor
-
- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
- /* using internal PHY, enable clock */
-- priv->phy_clk = clk_get(&pdev->dev, "ephy");
-+ priv->phy_clk = devm_clk_get(&pdev->dev, "ephy");
- if (IS_ERR(priv->phy_clk)) {
- ret = PTR_ERR(priv->phy_clk);
- priv->phy_clk = NULL;
-@@ -1824,7 +1824,7 @@ static int bcm_enet_probe(struct platfor
- }
- ret = clk_prepare_enable(priv->phy_clk);
- if (ret)
-- goto out_put_clk_phy;
-+ goto out_disable_clk_mac;
- }
-
- /* do minimal hardware init to be able to probe mii bus */
-@@ -1927,14 +1927,8 @@ out_uninit_hw:
- if (priv->phy_clk)
- clk_disable_unprepare(priv->phy_clk);
-
--out_put_clk_phy:
-- if (priv->phy_clk)
-- clk_put(priv->phy_clk);
--
- out_disable_clk_mac:
- clk_disable_unprepare(priv->mac_clk);
--out_put_clk_mac:
-- clk_put(priv->mac_clk);
- out:
- free_netdev(dev);
- return ret;
-@@ -1970,12 +1964,10 @@ static int bcm_enet_remove(struct platfo
- }
-
- /* disable hw block clocks */
-- if (priv->phy_clk) {
-+ if (priv->phy_clk)
- clk_disable_unprepare(priv->phy_clk);
-- clk_put(priv->phy_clk);
-- }
-+
- clk_disable_unprepare(priv->mac_clk);
-- clk_put(priv->mac_clk);
-
- free_netdev(dev);
- return 0;
-@@ -2758,26 +2750,20 @@ static int bcm_enetsw_probe(struct platf
- if (ret)
- goto out;
-
-- if (!request_mem_region(res_mem->start, resource_size(res_mem),
-- "bcm63xx_enetsw")) {
-- ret = -EBUSY;
-+ priv->base = devm_ioremap_resource(&pdev->dev, res_mem);
-+ if (IS_ERR(priv->base)) {
-+ ret = PTR_ERR(priv->base);
- goto out;
- }
-
-- priv->base = ioremap(res_mem->start, resource_size(res_mem));
-- if (priv->base == NULL) {
-- ret = -ENOMEM;
-- goto out_release_mem;
-- }
--
-- priv->mac_clk = clk_get(&pdev->dev, "enetsw");
-+ priv->mac_clk = devm_clk_get(&pdev->dev, "enetsw");
- if (IS_ERR(priv->mac_clk)) {
- ret = PTR_ERR(priv->mac_clk);
-- goto out_unmap;
-+ goto out;
- }
- ret = clk_prepare_enable(priv->mac_clk);
- if (ret)
-- goto out_put_clk;
-+ goto out;
-
- priv->rx_chan = 0;
- priv->tx_chan = 1;
-@@ -2809,15 +2795,6 @@ static int bcm_enetsw_probe(struct platf
-
- out_disable_clk:
- clk_disable_unprepare(priv->mac_clk);
--
--out_put_clk:
-- clk_put(priv->mac_clk);
--
--out_unmap:
-- iounmap(priv->base);
--
--out_release_mem:
-- release_mem_region(res_mem->start, resource_size(res_mem));
- out:
- free_netdev(dev);
- return ret;
-@@ -2829,20 +2806,13 @@ static int bcm_enetsw_remove(struct plat
- {
- struct bcm_enet_priv *priv;
- struct net_device *dev;
-- struct resource *res;
-
- /* stop netdevice */
- dev = platform_get_drvdata(pdev);
- priv = netdev_priv(dev);
- unregister_netdev(dev);
-
-- /* release device resources */
-- iounmap(priv->base);
-- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-- release_mem_region(res->start, resource_size(res));
--
- clk_disable_unprepare(priv->mac_clk);
-- clk_put(priv->mac_clk);
-
- free_netdev(dev);
- return 0;
+++ /dev/null
-From 555baec974ede81e616ca88ac6d3fca09239368f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 18 Jul 2017 13:18:01 +0200
-Subject: [PATCH 5/6] bcm63xx_enet: drop unneeded NULL phy_clk check
-
-clk_disable and clk_unprepare are NULL-safe, so need to duplicate the
-NULL check of the functions.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 7 ++-----
- 1 file changed, 2 insertions(+), 5 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1924,8 +1924,7 @@ out_free_mdio:
- out_uninit_hw:
- /* turn off mdc clock */
- enet_writel(priv, 0, ENET_MIISC_REG);
-- if (priv->phy_clk)
-- clk_disable_unprepare(priv->phy_clk);
-+ clk_disable_unprepare(priv->phy_clk);
-
- out_disable_clk_mac:
- clk_disable_unprepare(priv->mac_clk);
-@@ -1964,9 +1963,7 @@ static int bcm_enet_remove(struct platfo
- }
-
- /* disable hw block clocks */
-- if (priv->phy_clk)
-- clk_disable_unprepare(priv->phy_clk);
--
-+ clk_disable_unprepare(priv->phy_clk);
- clk_disable_unprepare(priv->mac_clk);
-
- free_netdev(dev);
+++ /dev/null
-From 77364ce98037972fb1c57d0ee0418eb1c2b26521 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 29 May 2017 13:11:14 +0200
-Subject: [PATCH 6/6] bcm63xx_enet: remove unneeded include
-
-We don't use anyhing from that file, so drop it.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.h | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -8,7 +8,6 @@
- #include <linux/platform_device.h>
-
- #include <bcm63xx_regs.h>
--#include <bcm63xx_irq.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_iudma.h>
-
+++ /dev/null
-From 943b0832e0cf3afe5bd40ffb1885d06106122c5d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:49:49 +0200
-Subject: [PATCH 1/4] bcm63xx_enet: just use "enet" as the clock name
-
-Now that we have the individual clocks available as "enet" we
-don't need to rely on the device id for them anymore.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1733,7 +1733,6 @@ static int bcm_enet_probe(struct platfor
- struct bcm63xx_enet_platform_data *pd;
- struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx;
- struct mii_bus *bus;
-- const char *clk_name;
- int i, ret;
-
- if (!bcm_enet_shared_base[0])
-@@ -1774,14 +1773,12 @@ static int bcm_enet_probe(struct platfor
- if (priv->mac_id == 0) {
- priv->rx_chan = 0;
- priv->tx_chan = 1;
-- clk_name = "enet0";
- } else {
- priv->rx_chan = 2;
- priv->tx_chan = 3;
-- clk_name = "enet1";
- }
-
-- priv->mac_clk = devm_clk_get(&pdev->dev, clk_name);
-+ priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
- if (IS_ERR(priv->mac_clk)) {
- ret = PTR_ERR(priv->mac_clk);
- goto out;
+++ /dev/null
-From b7d1d1f345bb3b25c360c1df812d98866e2ee7fb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 30 Sep 2017 13:50:03 +0200
-Subject: [PATCH 2/4] bcm63xx_enet: use platform data for dma channel numbers
-
-To reduce the reliance on device ids, pass the dma channel numbers to
-the enet devices as platform data.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/dev-enet.c | 8 ++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 4 ++++
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 11 ++---------
- 3 files changed, 14 insertions(+), 9 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -265,6 +265,14 @@ int __init bcm63xx_enet_register(int uni
- dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
- }
-
-+ if (unit == 0) {
-+ dpd->rx_chan = 0;
-+ dpd->tx_chan = 1;
-+ } else {
-+ dpd->rx_chan = 2;
-+ dpd->tx_chan = 3;
-+ }
-+
- ret = platform_device_register(pdev);
- if (ret)
- return ret;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -54,6 +54,10 @@ struct bcm63xx_enet_platform_data {
-
- /* DMA descriptor shift */
- unsigned int dma_desc_shift;
-+
-+ /* dma channel ids */
-+ int rx_chan;
-+ int tx_chan;
- };
-
- /*
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1769,15 +1769,6 @@ static int bcm_enet_probe(struct platfor
- priv->irq_tx = res_irq_tx->start;
- priv->mac_id = pdev->id;
-
-- /* get rx & tx dma channel id for this mac */
-- if (priv->mac_id == 0) {
-- priv->rx_chan = 0;
-- priv->tx_chan = 1;
-- } else {
-- priv->rx_chan = 2;
-- priv->tx_chan = 3;
-- }
--
- priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
- if (IS_ERR(priv->mac_clk)) {
- ret = PTR_ERR(priv->mac_clk);
-@@ -1809,6 +1800,8 @@ static int bcm_enet_probe(struct platfor
- priv->dma_chan_width = pd->dma_chan_width;
- priv->dma_has_sram = pd->dma_has_sram;
- priv->dma_desc_shift = pd->dma_desc_shift;
-+ priv->rx_chan = pd->rx_chan;
-+ priv->tx_chan = pd->tx_chan;
- }
-
- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
+++ /dev/null
-From 8c61608e5dd2e15575c171ee9cd558ddc3b94962 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 17 Dec 2017 12:54:30 +0100
-Subject: [PATCH 3/4] bcm63xx_enet: remove pointless mac_id check
-
-Enabling the ephy clock for mac 1 is harmless, and the actual usage of
-the ephy is not restricted to mac 0, so we might as well remove the
-check.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1804,7 +1804,7 @@ static int bcm_enet_probe(struct platfor
- priv->tx_chan = pd->tx_chan;
- }
-
-- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
-+ if (priv->has_phy && !priv->use_external_mii) {
- /* using internal PHY, enable clock */
- priv->phy_clk = devm_clk_get(&pdev->dev, "ephy");
- if (IS_ERR(priv->phy_clk)) {
+++ /dev/null
-From faea89cd893a1a7af81185f026a64dad603ef72f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 17 Dec 2017 12:58:12 +0100
-Subject: [PATCH 4/4] bcm63xx_enet: use platform device id directly for miibus
- name
-
-Directly use the platform device for generating the miibus name. This removes
-the last user of bcm_enet_priv::mac_id and we can remove the field.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 +--
- drivers/net/ethernet/broadcom/bcm63xx_enet.h | 3 ---
- 2 files changed, 1 insertion(+), 5 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1767,7 +1767,6 @@ static int bcm_enet_probe(struct platfor
- dev->irq = priv->irq = res_irq->start;
- priv->irq_rx = res_irq_rx->start;
- priv->irq_tx = res_irq_tx->start;
-- priv->mac_id = pdev->id;
-
- priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
- if (IS_ERR(priv->mac_clk)) {
-@@ -1835,7 +1834,7 @@ static int bcm_enet_probe(struct platfor
- bus->priv = priv;
- bus->read = bcm_enet_mdio_read_phylib;
- bus->write = bcm_enet_mdio_write_phylib;
-- sprintf(bus->id, "%s-%d", pdev->name, priv->mac_id);
-+ sprintf(bus->id, "%s-%d", pdev->name, pdev->id);
-
- /* only probe bus where we think the PHY is, because
- * the mdio read operation return 0 instead of 0xffff
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -192,9 +192,6 @@ struct bcm_enet_mib_counters {
-
- struct bcm_enet_priv {
-
-- /* mac id (from platform device id) */
-- int mac_id;
--
- /* base remapped address of device */
- void __iomem *base;
-
+++ /dev/null
-From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:19 +0100
-Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
-
-Knowledge of the clock setup delay should remain at the clock level (so
-it can be clock specific and CPU specific). Add the 100 milliseconds
-required clock delay for the USB host clock when it gets enabled.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/clk.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -213,6 +213,11 @@ static void usbh_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-+ else
-+ return;
-+
-+ if (enable)
-+ msleep(100);
- }
-
- static struct clk clk_usbh = {
+++ /dev/null
-From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:20 +0100
-Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
- clock code
-
-This patch adds the required 10 micro seconds delay to the USB device
-clock enable operation. Put this where the correct clock knowledege is,
-which is in the clock code, and remove this delay from the bcm63xx_udc
-gadget driver where it was before.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/clk.c | 5 +++++
- drivers/usb/gadget/bcm63xx_udc.c | 1 -
- 2 files changed, 5 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -235,6 +235,11 @@ static void usbd_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-+ else
-+ return;
-+
-+ if (enable)
-+ udelay(10);
- }
-
- static struct clk clk_usbd = {
---- a/drivers/usb/gadget/udc/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
-@@ -411,7 +411,6 @@ static inline void set_clocks(struct bcm
- if (is_enabled) {
- clk_enable(udc->usbh_clk);
- clk_enable(udc->usbd_clk);
-- udelay(10);
- } else {
- clk_disable(udc->usbd_clk);
- clk_disable(udc->usbh_clk);
+++ /dev/null
-From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:21 +0100
-Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
- register
-
-This patch moves the code touching the USB private register in the
-bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
-preparation for adding support for OHCI and EHCI host controllers which
-will also touch the USB private register.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++
- drivers/usb/gadget/bcm63xx_udc.c | 27 ++--------
- 4 files changed, 67 insertions(+), 24 deletions(-)
- create mode 100644 arch/mips/bcm63xx/usb-common.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
-- dev-wdt.o dev-usb-usbd.o
-+ dev-wdt.o dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -0,0 +1,53 @@
-+/*
-+ * Broadcom BCM63xx common USB device configuration code
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
-+ * Copyright (C) 2012 Broadcom Corporation
-+ *
-+ */
-+#include <linux/export.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+
-+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
-+{
-+ u32 val;
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-+ if (is_device) {
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ } else {
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ }
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ if (is_device)
-+ val |= USBH_PRIV_SWAP_USBD_MASK;
-+ else
-+ val &= ~USBH_PRIV_SWAP_USBD_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+}
-+EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
-+
-+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
-+{
-+ u32 val;
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-+ if (is_on)
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ else
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+}
-+EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-@@ -0,0 +1,9 @@
-+#ifndef BCM63XX_USB_PRIV_H_
-+#define BCM63XX_USB_PRIV_H_
-+
-+#include <linux/types.h>
-+
-+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
-+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
-+
-+#endif /* BCM63XX_USB_PRIV_H_ */
---- a/drivers/usb/gadget/udc/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
-@@ -40,6 +40,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-+#include <bcm63xx_usb_priv.h>
-
- #define DRV_MODULE_NAME "bcm63xx_udc"
-
-@@ -888,22 +889,7 @@ static void bcm63xx_select_phy_mode(stru
- bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
- }
-
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-- if (is_device) {
-- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- } else {
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- }
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
--
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-- if (is_device)
-- val |= USBH_PRIV_SWAP_USBD_MASK;
-- else
-- val &= ~USBH_PRIV_SWAP_USBD_MASK;
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+ bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
- }
-
- /**
-@@ -917,14 +903,9 @@ static void bcm63xx_select_phy_mode(stru
- */
- static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
- {
-- u32 val, portmask = BIT(udc->pd->port_no);
-+ u32 portmask = BIT(udc->pd->port_no);
-
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-- if (is_on)
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- else
-- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+ bcm63xx_usb_priv_select_pullup(portmask, is_on);
- }
-
- /**
+++ /dev/null
-From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:22 +0100
-Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
- common USB code
-
-This patch updates the common USB code touching the USB private
-registers with the specific bits to properly enable OHCI and EHCI
-controllers on BCM63xx SoCs. As a result we now need to protect access
-to Read Modify Write sequences using a spinlock because we cannot
-guarantee that any of the exposed helper will not be called
-concurrently.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 +
- 2 files changed, 99 insertions(+)
-
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -5,10 +5,12 @@
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
- * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
- * Copyright (C) 2012 Broadcom Corporation
- *
- */
-+#include <linux/spinlock.h>
- #include <linux/export.h>
-
- #include <bcm63xx_cpu.h>
-@@ -16,9 +18,14 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_usb_priv.h>
-
-+static DEFINE_SPINLOCK(usb_priv_reg_lock);
-+
- void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
- {
- u32 val;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
- if (is_device) {
-@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
- else
- val &= ~USBH_PRIV_SWAP_USBD_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
- }
- EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
-
- void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
- {
- u32 val;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
- if (is_on)
-@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
- else
- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
- }
- EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
-+
-+/* The following array represents the meaning of the DESC/DATA
-+ * endian swapping with respect to the CPU configured endianness
-+ *
-+ * DATA ENDN mmio descriptor
-+ * 0 0 BE invalid
-+ * 0 1 BE LE
-+ * 1 0 BE BE
-+ * 1 1 BE invalid
-+ *
-+ * Since BCM63XX SoCs are configured to be in big-endian mode
-+ * we want configuration at line 3.
-+ */
-+void bcm63xx_usb_priv_ohci_cfg_set(void)
-+{
-+ u32 reg;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-+
-+ if (BCMCPU_IS_6348())
-+ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
-+ else if (BCMCPU_IS_6358()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
-+ /*
-+ * The magic value comes for the original vendor BSP
-+ * and is needed for USB to work. Datasheet does not
-+ * help, so the magic value is used as-is.
-+ */
-+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
-+ USBH_PRIV_TEST_6358_REG);
-+
-+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ }
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-+}
-+
-+void bcm63xx_usb_priv_ehci_cfg_set(void)
-+{
-+ u32 reg;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-+
-+ if (BCMCPU_IS_6358()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
-+
-+ /*
-+ * The magic value comes for the original vendor BSP
-+ * and is needed for USB to work. Datasheet does not
-+ * help, so the magic value is used as-is.
-+ */
-+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
-+ USBH_PRIV_TEST_6358_REG);
-+
-+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ }
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-@@ -5,5 +5,7 @@
-
- void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
- void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
-+void bcm63xx_usb_priv_ohci_cfg_set(void);
-+void bcm63xx_usb_priv_ehci_cfg_set(void);
-
- #endif /* BCM63XX_USB_PRIV_H_ */
+++ /dev/null
-From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:23 +0100
-Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
- symbol
-
-This configuration symbol can be used by CPUs supporting the on-chip
-OHCI controller, and ensures that all relevant OHCI-related
-configuration options are correctly selected. So far, OHCI support is
-available for the 6328, 6348, 6358 and 6358 SoCs.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -6,10 +6,17 @@ config BCM63XX_CPU_3368
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-
-+config BCM63XX_OHCI
-+ bool
-+ select USB_ARCH_HAS_OHCI
-+ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
-+ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -24,21 +31,25 @@ config BCM63XX_CPU_6348
- bool "support 6348 CPU"
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6358
- bool "support 6358 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:24 +0100
-Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
- controller
-
-Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
-driven by the ohci-platform generic driver by using specific power
-on/off/suspend callback to manage clocks and hardware specific
-configuration.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++
- 3 files changed, 101 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
-- dev-wdt.o dev-usb-usbd.o usb-common.o
-+ dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
-@@ -0,0 +1,94 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/usb/ohci_pdriver.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+
-+static struct resource ohci_resources[] = {
-+ {
-+ .start = -1, /* filled at runtime */
-+ .end = -1, /* filled at runtime */
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = -1, /* filled at runtime */
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static u64 ohci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct clk *usb_host_clock;
-+
-+static int bcm63xx_ohci_power_on(struct platform_device *pdev)
-+{
-+ usb_host_clock = clk_get(&pdev->dev, "usbh");
-+ if (IS_ERR_OR_NULL(usb_host_clock))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(usb_host_clock);
-+
-+ bcm63xx_usb_priv_ohci_cfg_set();
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_ohci_power_off(struct platform_device *pdev)
-+{
-+ if (!IS_ERR_OR_NULL(usb_host_clock)) {
-+ clk_disable_unprepare(usb_host_clock);
-+ clk_put(usb_host_clock);
-+ }
-+}
-+
-+static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
-+ .big_endian_desc = 1,
-+ .big_endian_mmio = 1,
-+ .no_big_frame_no = 1,
-+ .num_ports = 1,
-+ .power_on = bcm63xx_ohci_power_on,
-+ .power_off = bcm63xx_ohci_power_off,
-+ .power_suspend = bcm63xx_ohci_power_off,
-+};
-+
-+static struct platform_device bcm63xx_ohci_device = {
-+ .name = "ohci-platform",
-+ .id = -1,
-+ .num_resources = ARRAY_SIZE(ohci_resources),
-+ .resource = ohci_resources,
-+ .dev = {
-+ .platform_data = &bcm63xx_ohci_pdata,
-+ .dma_mask = &ohci_dmamask,
-+ .coherent_dma_mask = DMA_BIT_MASK(32),
-+ },
-+};
-+
-+int __init bcm63xx_ohci_register(void)
-+{
-+ if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
-+ return -ENODEV;
-+
-+ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
-+ ohci_resources[0].end = ohci_resources[0].start;
-+ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
-+ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
-+
-+ return platform_device_register(&bcm63xx_ohci_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_OHCI_H_
-+#define BCM63XX_DEV_USB_OHCI_H_
-+
-+int bcm63xx_ohci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_OHCI_H_ */
+++ /dev/null
-From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:25 +0100
-Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
- enables it
-
-BCM63XX-based boards can control the registration of the OHCI controller
-by setting their has_ohci0 flag to 1. Handle this in the generic
-code dealing with board registration and call the actual helper to
-register the OHCI controller.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -28,6 +28,7 @@
- #include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-@@ -898,6 +899,9 @@ int __init board_register_devices(void)
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
-+ if (board.has_ohci0)
-+ bcm63xx_ohci_register();
-+
- if (board.has_dsp)
- bcm63xx_dsp_register(&board.dsp);
-
+++ /dev/null
-From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:26 +0100
-Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
- symbol
-
-This configuration symbol can be used by CPUs supporting the on-chip
-EHCI controller, and ensures that all relevant EHCI-related
-configuration options are selected. So far BCM6328, BCM6358 and BCM6368
-have an EHCI controller and do select this symbol. Update
-drivers/usb/host/Kconfig with BCM63XX to update direct unmet
-dependencies.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 9 +++++++++
- drivers/usb/host/Kconfig | 5 +++--
- 2 files changed, 12 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -12,11 +12,18 @@ config BCM63XX_OHCI
- select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
- select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
-
-+config BCM63XX_EHCI
-+ bool
-+ select USB_ARCH_HAS_EHCI
-+ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
-+ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -38,18 +45,21 @@ config BCM63XX_CPU_6358
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:27 +0100
-Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
- controller
-
-Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
-driven by the generic ehci-platform driver by using specific power
-on/off/suspend callbacks to manage clocks and hardware specific
-configuration.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++
- 3 files changed, 99 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,8 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
-- dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
-+ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
-+ usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -0,0 +1,92 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/usb/ehci_pdriver.h>
-+#include <linux/dma-mapping.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+
-+static struct resource ehci_resources[] = {
-+ {
-+ .start = -1, /* filled at runtime */
-+ .end = -1, /* filled at runtime */
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = -1, /* filled at runtime */
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static u64 ehci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct clk *usb_host_clock;
-+
-+static int bcm63xx_ehci_power_on(struct platform_device *pdev)
-+{
-+ usb_host_clock = clk_get(&pdev->dev, "usbh");
-+ if (IS_ERR_OR_NULL(usb_host_clock))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(usb_host_clock);
-+
-+ bcm63xx_usb_priv_ehci_cfg_set();
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_ehci_power_off(struct platform_device *pdev)
-+{
-+ if (!IS_ERR_OR_NULL(usb_host_clock)) {
-+ clk_disable_unprepare(usb_host_clock);
-+ clk_put(usb_host_clock);
-+ }
-+}
-+
-+static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
-+ .big_endian_desc = 1,
-+ .big_endian_mmio = 1,
-+ .power_on = bcm63xx_ehci_power_on,
-+ .power_off = bcm63xx_ehci_power_off,
-+ .power_suspend = bcm63xx_ehci_power_off,
-+};
-+
-+static struct platform_device bcm63xx_ehci_device = {
-+ .name = "ehci-platform",
-+ .id = -1,
-+ .num_resources = ARRAY_SIZE(ehci_resources),
-+ .resource = ehci_resources,
-+ .dev = {
-+ .platform_data = &bcm63xx_ehci_pdata,
-+ .dma_mask = &ehci_dmamask,
-+ .coherent_dma_mask = DMA_BIT_MASK(32),
-+ },
-+};
-+
-+int __init bcm63xx_ehci_register(void)
-+{
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ return 0;
-+
-+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
-+ ehci_resources[0].end = ehci_resources[0].start;
-+ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
-+ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
-+
-+ return platform_device_register(&bcm63xx_ehci_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_EHCI_H_
-+#define BCM63XX_DEV_USB_EHCI_H_
-+
-+int bcm63xx_ehci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_EHCI_H_ */
+++ /dev/null
-From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:28 +0100
-Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
- enables it
-
-BCM63XX-based board can control the registration of the EHCI controller
-by setting their has_ehci0 flag to 1. Handle this in the generic
-code dealing with board registration and call the actual helper to register
-the EHCI controller.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -28,6 +28,7 @@
- #include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ehci.h>
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-@@ -899,6 +900,9 @@ int __init board_register_devices(void)
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
-+ if (board.has_ehci0)
-+ bcm63xx_ehci_register();
-+
- if (board.has_ohci0)
- bcm63xx_ohci_register();
-
+++ /dev/null
-From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:30 +0100
-Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
- overcurrent
-
-This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
-does not support proper overcurrent reporting.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/dev-usb-ehci.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
- static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
- .big_endian_desc = 1,
- .big_endian_mmio = 1,
-+ .ignore_oc = 1,
- .power_on = bcm63xx_ehci_power_on,
- .power_off = bcm63xx_ehci_power_off,
- .power_suspend = bcm63xx_ehci_power_off,
+++ /dev/null
-From patchwork Tue Jul 18 10:17:27 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [6/9] MIPS: BCM63XX: allow NULL clock for clk_get_rate
-X-Patchwork-Submitter: Jonas Gorski <jonas.gorski@gmail.com>
-X-Patchwork-Id: 16776
-Message-Id: <20170718101730.2541-7-jonas.gorski@gmail.com>
-To: unlisted-recipients:; (no To-header on input)
-Cc: Ralf Baechle <ralf@linux-mips.org>,
- Florian Fainelli <f.fainelli@gmail.com>,
- bcm-kernel-feedback-list@broadcom.com,
- James Hogan <james.hogan@imgtec.com>,
- linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
-Date: Tue, 18 Jul 2017 12:17:27 +0200
-From: Jonas Gorski <jonas.gorski@gmail.com>
-List-Id: linux-mips <linux-mips.eddie.linux-mips.org>
-
-Make the behaviour of clk_get_rate consistent with common clk's
-clk_get_rate by accepting NULL clocks as parameter. Some device
-drivers rely on this, and will cause an OOPS otherwise.
-
-Fixes: e7300d04bd08 ("MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.")
-Cc: Ralf Baechle <ralf@linux-mips.org>
-Cc: Florian Fainelli <f.fainelli@gmail.com>
-Cc: bcm-kernel-feedback-list@broadcom.com
-Cc: James Hogan <james.hogan@imgtec.com>
-Cc: linux-mips@linux-mips.org
-Cc: linux-kernel@vger.kernel.org
-Reported-by: Mathias Kresin <dev@kresin.me>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -389,6 +389,9 @@ EXPORT_SYMBOL(clk_disable);
-
- unsigned long clk_get_rate(struct clk *clk)
- {
-+ if (!clk)
-+ return 0;
-+
- return clk->rate;
- }
-
+++ /dev/null
---- a/drivers/mtd/mtdpart.c
-+++ b/drivers/mtd/mtdpart.c
-@@ -978,8 +978,8 @@ int parse_mtd_partitions(struct mtd_info
- int ret, err = 0;
- const char *const *types_of = NULL;
-
-- if (data && data->of_node) {
-- types_of = of_get_probes(data->of_node);
-+ if (mtd_get_of_node(master)) {
-+ types_of = of_get_probes(mtd_get_of_node(master));
- if (types_of != NULL)
- types = types_of;
- }
+++ /dev/null
-From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:07:42 +0200
-Subject: [PATCH 01/13] pinctrl: add bcm63xx base code
-
-Setup directory and add a helper for bcm63xx pinctrl support.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/Kconfig | 1 +
- drivers/pinctrl/Makefile | 1 +
- drivers/pinctrl/bcm63xx/Kconfig | 3 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++
- drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h | 14 +++
- 7 files changed, 163 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/Kconfig
- create mode 100644 drivers/pinctrl/bcm63xx/Makefile
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
-
---- a/drivers/pinctrl/Kconfig
-+++ b/drivers/pinctrl/Kconfig
-@@ -248,6 +248,7 @@ config PINCTRL_ZYNQ
- This selectes the pinctrl driver for Xilinx Zynq.
-
- source "drivers/pinctrl/bcm/Kconfig"
-+source "drivers/pinctrl/bcm63xx/Kconfig"
- source "drivers/pinctrl/berlin/Kconfig"
- source "drivers/pinctrl/freescale/Kconfig"
- source "drivers/pinctrl/intel/Kconfig"
---- a/drivers/pinctrl/Makefile
-+++ b/drivers/pinctrl/Makefile
-@@ -41,6 +41,7 @@ obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.
- obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
-
- obj-$(CONFIG_ARCH_BCM) += bcm/
-+obj-y += bcm63xx/
- obj-$(CONFIG_ARCH_BERLIN) += berlin/
- obj-y += freescale/
- obj-$(CONFIG_X86) += intel/
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -0,0 +1,3 @@
-+config PINCTRL_BCM63XX
-+ bool
-+ select GPIO_GENERIC
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -0,0 +1 @@
-+obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
-@@ -0,0 +1,155 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/device.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/of_irq.h>
-+
-+#include "pinctrl-bcm63xx.h"
-+#include "../core.h"
-+
-+#define BANK_SIZE sizeof(u32)
-+#define PINS_PER_BANK (BANK_SIZE * BITS_PER_BYTE)
-+
-+#ifdef CONFIG_OF
-+static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc,
-+ const struct of_phandle_args *gpiospec,
-+ u32 *flags)
-+{
-+ struct gpio_chip *base = gpiochip_get_data(gc);
-+ int pin = gpiospec->args[0];
-+
-+ if (gc != &base[pin / PINS_PER_BANK])
-+ return -EINVAL;
-+
-+ pin = pin % PINS_PER_BANK;
-+
-+ if (pin >= gc->ngpio)
-+ return -EINVAL;
-+
-+ if (flags)
-+ *flags = gpiospec->args[1];
-+
-+ return pin;
-+}
-+#endif
-+
-+static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
-+{
-+ struct gpio_chip *base = gpiochip_get_data(chip);
-+ char irq_name[7]; /* "gpioXX" */
-+
-+ /* FIXME: this is ugly */
-+ sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base));
-+ return of_irq_get_byname(chip->of_node, irq_name);
-+}
-+
-+static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc,
-+ void __iomem *dirout, void __iomem *data,
-+ size_t sz, int ngpio)
-+
-+{
-+ int banks, chips, i, ret = -EINVAL;
-+
-+ chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
-+ banks = sz / BANK_SIZE;
-+
-+ for (i = 0; i < chips; i++) {
-+ int offset, pins;
-+ int reg_offset;
-+ char *label;
-+
-+ label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i);
-+ if (!label)
-+ return -ENOMEM;
-+
-+ offset = i * PINS_PER_BANK;
-+ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
-+
-+ /* the registers are treated like a huge big endian register */
-+ reg_offset = (banks - i - 1) * BANK_SIZE;
-+
-+ ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset,
-+ NULL, NULL, dirout + reg_offset, NULL,
-+ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
-+ if (ret)
-+ return ret;
-+
-+ gc[i].request = gpiochip_generic_request;
-+ gc[i].free = gpiochip_generic_free;
-+
-+ if (of_get_property(dev->of_node, "interrupt-names", NULL))
-+ gc[i].to_irq = bcm63xx_gpio_to_irq;
-+
-+#ifdef CONFIG_OF
-+ gc[i].of_gpio_n_cells = 2;
-+ gc[i].of_xlate = bcm63xx_gpio_of_xlate;
-+#endif
-+
-+ gc[i].label = label;
-+ gc[i].ngpio = pins;
-+
-+ devm_gpiochip_add_data(dev, &gc[i], gc);
-+ }
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name,
-+ int ngpio)
-+{
-+ int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
-+
-+ for (i = 0; i < chips; i++) {
-+ int offset, pins;
-+
-+ offset = i * PINS_PER_BANK;
-+ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
-+
-+ gpiochip_add_pin_range(&gc[i], name, 0, offset, pins);
-+ }
-+}
-+
-+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
-+ struct pinctrl_desc *desc,
-+ void *priv, struct gpio_chip *gc,
-+ int ngpio)
-+{
-+ struct pinctrl_dev *pctldev;
-+ struct resource *res;
-+ void __iomem *dirout, *data;
-+ size_t sz;
-+ int ret;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout");
-+ dirout = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(dirout))
-+ return ERR_CAST(dirout);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
-+ data = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(data))
-+ return ERR_CAST(data);
-+
-+ sz = resource_size(res);
-+
-+ ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio);
-+ if (ret)
-+ return ERR_PTR(ret);
-+
-+ pctldev = devm_pinctrl_register(&pdev->dev, desc, priv);
-+ if (IS_ERR(pctldev))
-+ return pctldev;
-+
-+ bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio);
-+
-+ dev_info(&pdev->dev, "registered at mmio %p\n", dirout);
-+
-+ return pctldev;
-+}
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
-@@ -0,0 +1,14 @@
-+#ifndef __PINCTRL_BCM63XX
-+#define __PINCTRL_BCM63XX
-+
-+#include <linux/kernel.h>
-+#include <linux/gpio.h>
-+#include <linux/pinctrl/pinctrl.h>
-+#include <linux/platform_device.h>
-+
-+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
-+ struct pinctrl_desc *desc,
-+ void *priv, struct gpio_chip *gc,
-+ int ngpio);
-+
-+#endif
+++ /dev/null
-From 4bdd40849632608d5cb7d3a64380cd76e7eea07b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:33:56 +0200
-Subject: [PATCH 02/16] Documentation: add BCM6328 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6328 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6328-pinctrl.txt | 61 ++++++++++++++++++++++
- 1 file changed, 61 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
-@@ -0,0 +1,61 @@
-+* Broadcom BCM6328 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6328-pinctrl".
-+- reg: Register specifies of dirout, dat, mode, mux registers.
-+- reg-names: Must be "dirout", "dat", "mode", "mux".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6328-pinctrl";
-+ reg = <0x10000080 0x8>,
-+ <0x10000088 0x8>,
-+ <0x10000098 0x4>,
-+ <0x1000009c 0xc>;
-+ reg-names = "dirout", "dat", "mode", "mux";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led
-+gpio1 1 led
-+gpio2 2 led
-+gpio3 3 led
-+gpio4 4 led
-+gpio5 5 led
-+gpio6 6 led, serial_led_data
-+gpio7 7 led, serial_led_clk
-+gpio8 8 led
-+gpio9 9 led
-+gpio10 10 led
-+gpio11 11 led
-+gpio12 12 led
-+gpio13 13 led
-+gpio14 14 led
-+gpio15 15 led
-+gpio16 16 led, pcie_clkreq
-+gpio17 17 led
-+gpio18 18 led
-+gpio19 19 led
-+gpio20 20 led
-+gpio21 21 led
-+gpio22 22 led
-+gpio23 23 led
-+gpio24 24 -
-+gpio25 25 ephy0_act_led
-+gpio26 26 ephy1_act_led
-+gpio27 27 ephy2_act_led
-+gpio28 28 ephy3_act_led
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+hsspi_cs1 - hsspi_cs1
-+usb_port1 - usb_host_port, usb_device_port
+++ /dev/null
-From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:12:50 +0200
-Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328
-
-Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as
-GPIOs, as LEDs for the integrated LED controller, or various other
-functions. Its pincontrol mux registers also control other aspects, like
-switching the second USB port between host and device mode.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++
- 3 files changed, 464 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -1,3 +1,10 @@
- config PINCTRL_BCM63XX
- bool
- select GPIO_GENERIC
-+
-+config PINCTRL_BCM6328
-+ bool "BCM6328 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
-+obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
-@@ -0,0 +1,456 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/machine.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6328_MUX_LO_REG 0x4
-+#define BCM6328_MUX_HI_REG 0x0
-+#define BCM6328_MUX_OTHER_REG 0x8
-+
-+#define BCM6328_NGPIO 32
-+
-+struct bcm6328_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6328_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned mode_val:1;
-+ unsigned mux_val:2;
-+};
-+
-+struct bcm6328_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ void __iomem *mux[3];
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio;
-+};
-+
-+static const struct pinctrl_pin_desc bcm6328_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+
-+ /*
-+ * No idea where they really are; so let's put them according
-+ * to their mux offsets.
-+ */
-+ PINCTRL_PIN(36, "hsspi_cs1"),
-+ PINCTRL_PIN(38, "usb_p2"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+
-+static unsigned hsspi_cs1_pins[] = { 36 };
-+static unsigned usb_port1_pins[] = { 38 };
-+
-+#define BCM6328_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6328_pingroup bcm6328_groups[] = {
-+ BCM6328_GROUP(gpio0),
-+ BCM6328_GROUP(gpio1),
-+ BCM6328_GROUP(gpio2),
-+ BCM6328_GROUP(gpio3),
-+ BCM6328_GROUP(gpio4),
-+ BCM6328_GROUP(gpio5),
-+ BCM6328_GROUP(gpio6),
-+ BCM6328_GROUP(gpio7),
-+ BCM6328_GROUP(gpio8),
-+ BCM6328_GROUP(gpio9),
-+ BCM6328_GROUP(gpio10),
-+ BCM6328_GROUP(gpio11),
-+ BCM6328_GROUP(gpio12),
-+ BCM6328_GROUP(gpio13),
-+ BCM6328_GROUP(gpio14),
-+ BCM6328_GROUP(gpio15),
-+ BCM6328_GROUP(gpio16),
-+ BCM6328_GROUP(gpio17),
-+ BCM6328_GROUP(gpio18),
-+ BCM6328_GROUP(gpio19),
-+ BCM6328_GROUP(gpio20),
-+ BCM6328_GROUP(gpio21),
-+ BCM6328_GROUP(gpio22),
-+ BCM6328_GROUP(gpio23),
-+ BCM6328_GROUP(gpio24),
-+ BCM6328_GROUP(gpio25),
-+ BCM6328_GROUP(gpio26),
-+ BCM6328_GROUP(gpio27),
-+ BCM6328_GROUP(gpio28),
-+ BCM6328_GROUP(gpio29),
-+ BCM6328_GROUP(gpio30),
-+ BCM6328_GROUP(gpio31),
-+
-+ BCM6328_GROUP(hsspi_cs1),
-+ BCM6328_GROUP(usb_port1),
-+};
-+
-+/* GPIO_MODE */
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+/* PINMUX_SEL */
-+static const char * const serial_led_data_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_act_led_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const pcie_clkreq_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const ephy0_act_led_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ephy1_act_led_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ephy2_act_led_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const ephy3_act_led_groups[] = {
-+ "gpio28",
-+};
-+
-+static const char * const hsspi_cs1_groups[] = {
-+ "hsspi_cs1"
-+};
-+
-+static const char * const usb_host_port_groups[] = {
-+ "usb_port1",
-+};
-+
-+static const char * const usb_device_port_groups[] = {
-+ "usb_port1",
-+};
-+
-+#define BCM6328_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mode_val = 1, \
-+ }
-+
-+#define BCM6328_MUX_FUN(n, mux) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mux_val = mux, \
-+ }
-+
-+static const struct bcm6328_function bcm6328_funcs[] = {
-+ BCM6328_MODE_FUN(led),
-+ BCM6328_MUX_FUN(serial_led_data, 2),
-+ BCM6328_MUX_FUN(serial_led_clk, 2),
-+ BCM6328_MUX_FUN(inet_act_led, 1),
-+ BCM6328_MUX_FUN(pcie_clkreq, 2),
-+ BCM6328_MUX_FUN(ephy0_act_led, 1),
-+ BCM6328_MUX_FUN(ephy1_act_led, 1),
-+ BCM6328_MUX_FUN(ephy2_act_led, 1),
-+ BCM6328_MUX_FUN(ephy3_act_led, 1),
-+ BCM6328_MUX_FUN(hsspi_cs1, 2),
-+ BCM6328_MUX_FUN(usb_host_port, 1),
-+ BCM6328_MUX_FUN(usb_device_port, 2),
-+};
-+
-+static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6328_groups);
-+}
-+
-+static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6328_groups[group].name;
-+}
-+
-+static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6328_groups[group].pins;
-+ *num_pins = bcm6328_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6328_funcs);
-+}
-+
-+static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6328_funcs[selector].name;
-+}
-+
-+static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6328_funcs[selector].groups;
-+ *num_groups = bcm6328_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin,
-+ u32 mode, u32 mux)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (pin < 32) {
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~BIT(pin);
-+ if (mode)
-+ reg |= BIT(pin);
-+ __raw_writel(reg, pctl->mode);
-+ }
-+
-+ reg = __raw_readl(pctl->mux[pin / 16]);
-+ reg &= ~(3UL << ((pin % 16) * 2));
-+ reg |= mux << ((pin % 16) * 2);
-+ __raw_writel(reg, pctl->mux[pin / 16]);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6328_pingroup *grp = &bcm6328_groups[group];
-+ const struct bcm6328_function *f = &bcm6328_funcs[selector];
-+
-+ bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
-+
-+ return 0;
-+}
-+
-+static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm6328_rmw_mux(pctl, offset, 0, 0);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6328_pctl_ops = {
-+ .get_groups_count = bcm6328_pinctrl_get_group_count,
-+ .get_group_name = bcm6328_pinctrl_get_group_name,
-+ .get_group_pins = bcm6328_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6328_pmx_ops = {
-+ .get_functions_count = bcm6328_pinctrl_get_func_count,
-+ .get_function_name = bcm6328_pinctrl_get_func_name,
-+ .get_function_groups = bcm6328_pinctrl_get_groups,
-+ .set_mux = bcm6328_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6328_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6328_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6328_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode, *mux;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
-+ mux = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mux))
-+ return PTR_ERR(mux);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+ pctl->mux[0] = mux + BCM6328_MUX_LO_REG;
-+ pctl->mux[1] = mux + BCM6328_MUX_HI_REG;
-+ pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6328_pctl_ops;
-+ pctl->desc.pmxops = &bcm6328_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6328_pins);
-+ pctl->desc.pins = bcm6328_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ &pctl->gpio, BCM6328_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6328_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6328-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6328_pinctrl_driver = {
-+ .probe = bcm6328_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6328-pinctrl",
-+ .of_match_table = bcm6328_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6328_pinctrl_driver);
+++ /dev/null
-From 962c46bf7f43df730e2d3698930e77958cc6b191 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:35:45 +0200
-Subject: [PATCH 04/16] Documentation: add BCM6348 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6348 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6348-pinctrl.txt | 32 ++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
-@@ -0,0 +1,32 @@
-+* Broadcom BCM6348 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6348-pinctrl".
-+- reg: register Specifiers of dirout, dat, mode registers.
-+- reg-names: Must be "dirout", "dat", "mode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@fffe0080 {
-+ compatible = "brcm,bcm6348-pinctrl";
-+ reg = <0xfffe0080 0x8>,
-+ <0xfffe0088 0x8>,
-+ <0xfffe0098 0x4>;
-+ reg-names = "dirout", "dat", "mode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+group0 32-36 ext_mii, utopia, diag
-+group1 22-31 ext_ephy, mii_snoop, mii_pccard,
-+ spi_master_uart, utopia, diag
-+group2 16-21 pci, diag
-+group3 8-15 ext_mii, utopia
-+group4 0-7 ext_ephy, mii_snoop, legacy_led, diag
+++ /dev/null
-From 45444cb631555e2dc16b95d779b10aa075c7482e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:14:13 +0200
-Subject: [PATCH 05/16] pinctrl: add a pincontrol driver for BCM6348
-
-Add a pincotrol driver for BCM6348. BCM6348 allow muxing five groups of
-up to ten gpios into fourteen potential functions. It does not allow
-muxing individual pins. Some functions require more than one group to be
-muxed to the same function.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c | 392 ++++++++++++++++++++++++++++++
- 3 files changed, 400 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -8,3 +8,10 @@ config PINCTRL_BCM6328
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6348
-+ bool "BCM6348 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,2 +1,3 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
-+obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
-@@ -0,0 +1,392 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/machine.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6348_NGPIO 37
-+
-+#define MAX_GROUP 4
-+#define PINS_PER_GROUP 8
-+#define PIN_TO_GROUP(pin) (MAX_GROUP - ((pin) / PINS_PER_GROUP))
-+#define GROUP_SHIFT(pin) (PIN_TO_GROUP(pin) * 4)
-+#define GROUP_MASK(pin) (0xf << GROUP_SHIFT(pin))
-+
-+struct bcm6348_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6348_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+ unsigned int value;
-+};
-+
-+struct bcm6348_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6348_PIN(a, b, group) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(group), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6348_pins[] = {
-+ BCM6348_PIN(0, "gpio0", 4),
-+ BCM6348_PIN(1, "gpio1", 4),
-+ BCM6348_PIN(2, "gpio2", 4),
-+ BCM6348_PIN(3, "gpio3", 4),
-+ BCM6348_PIN(4, "gpio4", 4),
-+ BCM6348_PIN(5, "gpio5", 4),
-+ BCM6348_PIN(6, "gpio6", 4),
-+ BCM6348_PIN(7, "gpio7", 4),
-+ BCM6348_PIN(8, "gpio8", 3),
-+ BCM6348_PIN(9, "gpio9", 3),
-+ BCM6348_PIN(10, "gpio10", 3),
-+ BCM6348_PIN(11, "gpio11", 3),
-+ BCM6348_PIN(12, "gpio12", 3),
-+ BCM6348_PIN(13, "gpio13", 3),
-+ BCM6348_PIN(14, "gpio14", 3),
-+ BCM6348_PIN(15, "gpio15", 3),
-+ BCM6348_PIN(16, "gpio16", 2),
-+ BCM6348_PIN(17, "gpio17", 2),
-+ BCM6348_PIN(18, "gpio18", 2),
-+ BCM6348_PIN(19, "gpio19", 2),
-+ BCM6348_PIN(20, "gpio20", 2),
-+ BCM6348_PIN(21, "gpio21", 2),
-+ BCM6348_PIN(22, "gpio22", 1),
-+ BCM6348_PIN(23, "gpio23", 1),
-+ BCM6348_PIN(24, "gpio24", 1),
-+ BCM6348_PIN(25, "gpio25", 1),
-+ BCM6348_PIN(26, "gpio26", 1),
-+ BCM6348_PIN(27, "gpio27", 1),
-+ BCM6348_PIN(28, "gpio28", 1),
-+ BCM6348_PIN(29, "gpio29", 1),
-+ BCM6348_PIN(30, "gpio30", 1),
-+ BCM6348_PIN(31, "gpio31", 1),
-+ BCM6348_PIN(32, "gpio32", 0),
-+ BCM6348_PIN(33, "gpio33", 0),
-+ BCM6348_PIN(34, "gpio34", 0),
-+ BCM6348_PIN(35, "gpio35", 0),
-+ BCM6348_PIN(36, "gpio36", 0),
-+};
-+
-+enum bcm6348_muxes {
-+ BCM6348_MUX_GPIO = 0,
-+ BCM6348_MUX_EXT_EPHY,
-+ BCM6348_MUX_MII_SNOOP,
-+ BCM6348_MUX_LEGACY_LED,
-+ BCM6348_MUX_MII_PCCARD,
-+ BCM6348_MUX_PCI,
-+ BCM6348_MUX_SPI_MASTER_UART,
-+ BCM6348_MUX_EXT_MII,
-+ BCM6348_MUX_UTOPIA,
-+ BCM6348_MUX_DIAG,
-+};
-+
-+static unsigned group0_pins[] = {
-+ 32, 33, 34, 35, 36,
-+};
-+
-+static unsigned group1_pins[] = {
-+ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned group2_pins[] = {
-+ 16, 17, 18, 19, 20, 21,
-+};
-+
-+static unsigned group3_pins[] = {
-+ 8, 9, 10, 11, 12, 13, 14, 15,
-+};
-+
-+static unsigned group4_pins[] = {
-+ 0, 1, 2, 3, 4, 5, 6, 7,
-+};
-+
-+#define BCM6348_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ } \
-+
-+static struct bcm6348_pingroup bcm6348_groups[] = {
-+ BCM6348_GROUP(group0),
-+ BCM6348_GROUP(group1),
-+ BCM6348_GROUP(group2),
-+ BCM6348_GROUP(group3),
-+ BCM6348_GROUP(group4),
-+};
-+
-+static const char * const ext_mii_groups[] = {
-+ "group0",
-+ "group3",
-+};
-+
-+static const char * const ext_ephy_groups[] = {
-+ "group1",
-+ "group4"
-+};
-+
-+static const char * const mii_snoop_groups[] = {
-+ "group1",
-+ "group4",
-+};
-+
-+static const char * const legacy_led_groups[] = {
-+ "group4",
-+};
-+
-+static const char * const mii_pccard_groups[] = {
-+ "group1",
-+};
-+
-+static const char * const pci_groups[] = {
-+ "group2",
-+};
-+
-+static const char * const spi_master_uart_groups[] = {
-+ "group1",
-+};
-+
-+static const char * const utopia_groups[] = {
-+ "group0",
-+ "group1",
-+ "group3",
-+};
-+
-+static const char * const diag_groups[] = {
-+ "group0",
-+ "group1",
-+ "group2",
-+ "group4",
-+};
-+
-+#define BCM6348_FUN(n, f) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .value = BCM6348_MUX_##f, \
-+ }
-+
-+static const struct bcm6348_function bcm6348_funcs[] = {
-+ BCM6348_FUN(ext_mii, EXT_MII),
-+ BCM6348_FUN(ext_ephy, EXT_EPHY),
-+ BCM6348_FUN(mii_snoop, MII_SNOOP),
-+ BCM6348_FUN(legacy_led, LEGACY_LED),
-+ BCM6348_FUN(mii_pccard, MII_PCCARD),
-+ BCM6348_FUN(pci, PCI),
-+ BCM6348_FUN(spi_master_uart, SPI_MASTER_UART),
-+ BCM6348_FUN(utopia, UTOPIA),
-+ BCM6348_FUN(diag, DIAG),
-+};
-+
-+static int bcm6348_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6348_groups);
-+}
-+
-+static const char *bcm6348_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6348_groups[group].name;
-+}
-+
-+static int bcm6348_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6348_groups[group].pins;
-+ *num_pins = bcm6348_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6348_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6348_funcs);
-+}
-+
-+static const char *bcm6348_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6348_funcs[selector].name;
-+}
-+
-+static int bcm6348_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6348_funcs[selector].groups;
-+ *num_groups = bcm6348_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6348_rmw_mux(struct bcm6348_pinctrl *pctl, u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~mask;
-+ reg |= val & mask;
-+ __raw_writel(reg, pctl->mode);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6348_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6348_pingroup *grp = &bcm6348_groups[group];
-+ const struct bcm6348_function *f = &bcm6348_funcs[selector];
-+ u32 group_num, mask, val;
-+
-+ /*
-+ * pins n..(n+7) share the same group, so we only need to look at
-+ * the first pin.
-+ */
-+ group_num = (unsigned long)bcm6348_pins[grp->pins[0]].drv_data;
-+ mask = GROUP_MASK(group_num);
-+ val = f->value << GROUP_SHIFT(group_num);
-+
-+ bcm6348_rmw_mux(pctl, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm6348_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ struct pin_desc *desc;
-+ u32 mask;
-+
-+ /* don't reconfigure if already muxed */
-+ desc = pin_desc_get(pctldev, offset);
-+ if (desc->mux_usecount)
-+ return 0;
-+
-+ mask = GROUP_MASK(offset);
-+
-+ /* disable all functions using this pin */
-+ bcm6348_rmw_mux(pctl, mask, 0);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6348_pctl_ops = {
-+ .get_groups_count = bcm6348_pinctrl_get_group_count,
-+ .get_group_name = bcm6348_pinctrl_get_group_name,
-+ .get_group_pins = bcm6348_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6348_pmx_ops = {
-+ .get_functions_count = bcm6348_pinctrl_get_func_count,
-+ .get_function_name = bcm6348_pinctrl_get_func_name,
-+ .get_function_groups = bcm6348_pinctrl_get_groups,
-+ .set_mux = bcm6348_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6348_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6348_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6348_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ /* disable all muxes by default */
-+ __raw_writel(0, pctl->mode);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6348_pctl_ops;
-+ pctl->desc.pmxops = &bcm6348_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6348_pins);
-+ pctl->desc.pins = bcm6348_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6348_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6348_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6348-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6348_pinctrl_driver = {
-+ .probe = bcm6348_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6348-pinctrl",
-+ .of_match_table = bcm6348_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6348_pinctrl_driver);
+++ /dev/null
-From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:00 +0200
-Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6358 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
-@@ -0,0 +1,44 @@
-+* Broadcom BCM6358 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6358-pinctrl".
-+- reg: Register specifiers of dirout, dat registers.
-+- reg-names: Must be "dirout", "dat".
-+- brcm,gpiomode: Phandle to the shared gpiomode register.
-+- gpio-controller: Identifies this node as a gpio-controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@fffe0080 {
-+ compatible = "brcm,bcm6358-pinctrl";
-+ reg = <0xfffe0080 0x8>,
-+ <0xfffe0088 0x8>,
-+ <0xfffe0098 0x4>;
-+ reg-names = "dirout", "dat";
-+ brcm,gpiomode = <&gpiomode>;
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+gpiomode: syscon@fffe0098 {
-+ compatible = "brcm,bcm6358-gpiomode", "syscon";
-+ reg = <0xfffe0098 0x4>;
-+ native-endian;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+ebi_cs_grp 30-31 ebi_cs
-+uart1_grp 28-31 uart1
-+spi_cs_grp 32-33 spi_cs
-+async_modem_grp 12-15 async_modem
-+legacy_led_grp 9-15 legacy_led
-+serial_led_grp 6-7 serial_led
-+led_grp 0-3 led
-+utopia_grp 12-15, 22-31 utopia
-+pwm_syn_clk_grp 8 pwm_syn_clk
-+sys_irq_grp 5 sys_irq
+++ /dev/null
-From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:16:01 +0200
-Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
-
-Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
-functions onto the GPIO pins. It does not support configuring individual
-pins but only whole groups. These groups may overlap, and still require
-the directions to be set correctly in the GPIO register. In addition the
-functions register controls other, not directly mux related functions.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 8 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
- 3 files changed, 402 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -15,3 +15,11 @@ config PINCTRL_BCM6348
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6358
-+ bool "BCM6358 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+ select MFD_SYSCON
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,3 +1,4 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
-+obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
-@@ -0,0 +1,393 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/regmap.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+/* GPIO_MODE register */
-+#define BCM6358_MODE_MUX_NONE 0
-+
-+/* overlays on gpio pins */
-+#define BCM6358_MODE_MUX_EBI_CS BIT(5)
-+#define BCM6358_MODE_MUX_UART1 BIT(6)
-+#define BCM6358_MODE_MUX_SPI_CS BIT(7)
-+#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
-+#define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
-+#define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
-+#define BCM6358_MODE_MUX_LED BIT(11)
-+#define BCM6358_MODE_MUX_UTOPIA BIT(12)
-+#define BCM6358_MODE_MUX_CLKRST BIT(13)
-+#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
-+#define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
-+
-+#define BCM6358_NGPIO 40
-+
-+struct bcm6358_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+
-+ const u16 mode_val;
-+
-+ /* non-GPIO function muxes require the gpio direction to be set */
-+ const u16 direction;
-+};
-+
-+struct bcm6358_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+};
-+
-+struct bcm6358_pinctrl {
-+ struct device *dev;
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ struct regmap_field *overlays;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
-+ BCM6358_MODE_MUX_##bit2 | \
-+ BCM6358_MODE_MUX_##bit3), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6358_pins[] = {
-+ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
-+ PINCTRL_PIN(4, "gpio4"),
-+ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
-+ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
-+ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
-+ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
-+ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
-+ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
-+ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
-+ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+};
-+
-+static unsigned ebi_cs_grp_pins[] = { 30, 31 };
-+
-+static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
-+
-+static unsigned spi_cs_grp_pins[] = { 32, 33 };
-+
-+static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
-+
-+static unsigned serial_led_grp_pins[] = { 6, 7 };
-+
-+static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
-+
-+static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
-+
-+static unsigned utopia_grp_pins[] = {
-+ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned pwm_syn_clk_grp_pins[] = { 8 };
-+
-+static unsigned sys_irq_grp_pins[] = { 5 };
-+
-+#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ .mode_val = BCM6358_MODE_MUX_##bit, \
-+ .direction = dir, \
-+ }
-+
-+static const struct bcm6358_pingroup bcm6358_groups[] = {
-+ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
-+ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
-+ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
-+ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
-+ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
-+ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
-+ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
-+ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
-+ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
-+ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
-+};
-+
-+static const char * const ebi_cs_groups[] = {
-+ "ebi_cs_grp"
-+};
-+
-+static const char * const uart1_groups[] = {
-+ "uart1_grp"
-+};
-+
-+static const char * const spi_cs_2_3_groups[] = {
-+ "spi_cs_2_3_grp"
-+};
-+
-+static const char * const async_modem_groups[] = {
-+ "async_modem_grp"
-+};
-+
-+static const char * const legacy_led_groups[] = {
-+ "legacy_led_grp",
-+};
-+
-+static const char * const serial_led_groups[] = {
-+ "serial_led_grp",
-+};
-+
-+static const char * const led_groups[] = {
-+ "led_grp",
-+};
-+
-+static const char * const clkrst_groups[] = {
-+ "clkrst_grp",
-+};
-+
-+static const char * const pwm_syn_clk_groups[] = {
-+ "pwm_syn_clk_grp",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "sys_irq_grp",
-+};
-+
-+#define BCM6358_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ }
-+
-+static const struct bcm6358_function bcm6358_funcs[] = {
-+ BCM6358_FUN(ebi_cs),
-+ BCM6358_FUN(uart1),
-+ BCM6358_FUN(spi_cs_2_3),
-+ BCM6358_FUN(async_modem),
-+ BCM6358_FUN(legacy_led),
-+ BCM6358_FUN(serial_led),
-+ BCM6358_FUN(led),
-+ BCM6358_FUN(clkrst),
-+ BCM6358_FUN(pwm_syn_clk),
-+ BCM6358_FUN(sys_irq),
-+};
-+
-+static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6358_groups);
-+}
-+
-+static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6358_groups[group].name;
-+}
-+
-+static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6358_groups[group].pins;
-+ *num_pins = bcm6358_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6358_funcs);
-+}
-+
-+static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6358_funcs[selector].name;
-+}
-+
-+static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6358_funcs[selector].groups;
-+ *num_groups = bcm6358_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
-+ u32 val = grp->mode_val;
-+ u32 mask = val;
-+ unsigned pin;
-+
-+ for (pin = 0; pin < grp->num_pins; pin++)
-+ mask |= (unsigned long)bcm6358_pins[pin].drv_data;
-+
-+ regmap_field_update_bits(pctl->overlays, mask, val);
-+
-+ for (pin = 0; pin < grp->num_pins; pin++) {
-+ int hw_gpio = bcm6358_pins[pin].number;
-+ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
-+
-+ if (grp->direction & BIT(pin))
-+ gc->direction_output(gc, hw_gpio % 32, 0);
-+ else
-+ gc->direction_input(gc, hw_gpio % 32);
-+ }
-+
-+ return 0;
-+}
-+
-+static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ u32 mask;
-+
-+ mask = (unsigned long)bcm6358_pins[offset].drv_data;
-+ if (!mask)
-+ return 0;
-+
-+ /* disable all functions using this pin */
-+ return regmap_field_update_bits(pctl->overlays, mask, 0);
-+}
-+
-+static struct pinctrl_ops bcm6358_pctl_ops = {
-+ .get_groups_count = bcm6358_pinctrl_get_group_count,
-+ .get_group_name = bcm6358_pinctrl_get_group_name,
-+ .get_group_pins = bcm6358_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6358_pmx_ops = {
-+ .get_functions_count = bcm6358_pinctrl_get_func_count,
-+ .get_function_name = bcm6358_pinctrl_get_func_name,
-+ .get_function_groups = bcm6358_pinctrl_get_groups,
-+ .set_mux = bcm6358_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6358_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6358_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6358_pinctrl *pctl;
-+ struct regmap *mode;
-+ struct reg_field overlays = REG_FIELD(0, 0, 15);
-+
-+ if (pdev->dev.of_node)
-+ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+ "brcm,gpiomode");
-+ else
-+ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098");
-+
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
-+ if (IS_ERR(pctl->overlays))
-+ return PTR_ERR(pctl->overlays);
-+
-+ /* disable all muxes by default */
-+ regmap_field_write(pctl->overlays, 0);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6358_pctl_ops;
-+ pctl->desc.pmxops = &bcm6358_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
-+ pctl->desc.pins = bcm6358_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6358_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6358_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6358-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6358_pinctrl_driver = {
-+ .probe = bcm6358_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6358-pinctrl",
-+ .of_match_table = bcm6358_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6358_pinctrl_driver);
+++ /dev/null
-From ba03ea8ada2ca71c9095d96a1e4085c2c5cf0e69 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:18 +0200
-Subject: [PATCH 08/16] Documentation: add BCM6362 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6362 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6362-pinctrl.txt | 79 ++++++++++++++++++++++
- 1 file changed, 79 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
-@@ -0,0 +1,79 @@
-+* Broadcom BCM6362 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6362-pinctrl"
-+- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
-+- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6362-pinctrl";
-+ reg = <0x10000080 0x8>,
-+ <0x10000088 0x8>,
-+ <0x10000090 0x4>,
-+ <0x10000098 0x4>,
-+ <0x1000009c 0x4>,
-+ <0x100000b8 0x4>;
-+ reg-names = "dirout", "dat", "led",
-+ "mode", "ctrl", "basemode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, usb_device_led
-+gpio1 1 led, sys_irq
-+gpio2 2 led, serial_led_clk
-+gpio3 3 led, serial_led_data
-+gpio4 4 led, robosw_led_data
-+gpio5 5 led, robosw_led_clk
-+gpio6 6 led, robosw_led0
-+gpio7 7 led, robosw_led1
-+gpio8 8 led, inet_led
-+gpio9 9 led, spi_cs2
-+gpio10 10 led, spi_cs3
-+gpio11 11 led, ntr_pulse
-+gpio12 12 led, uart1_scts
-+gpio13 13 led, uart1_srts
-+gpio14 14 led, uart1_sdin
-+gpio15 15 led, uart1_sdout
-+gpio16 16 led, adsl_spi_miso
-+gpio17 17 led, adsl_spi_mosi
-+gpio18 18 led, adsl_spi_clk
-+gpio19 19 led, adsl_spi_cs
-+gpio20 20 led, ephy0_led
-+gpio21 21 led, ephy1_led
-+gpio22 22 led, ephy2_led
-+gpio23 23 led, ephy3_led
-+gpio24 24 ext_irq0
-+gpio25 25 ext_irq1
-+gpio26 26 ext_irq2
-+gpio27 27 ext_irq3
-+gpio28 28 -
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+gpio32 32 wifi
-+gpio33 33 wifi
-+gpio34 34 wifi
-+gpio35 35 wifi
-+gpio36 36 wifi
-+gpio37 37 wifi
-+gpio38 38 wifi
-+gpio39 39 wifi
-+gpio40 40 wifi
-+gpio41 41 wifi
-+gpio42 42 wifi
-+gpio43 43 wifi
-+gpio44 44 wifi
-+gpio45 45 wifi
-+gpio46 46 wifi
-+gpio47 47 wifi
-+nand_grp 8, 12-23, 27 nand
+++ /dev/null
-From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:17:20 +0200
-Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362
-
-Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual
-GPIO pins to the LED controller, to be available by the integrated
-wifi, or other functions. It also supports overlay groups, of which
-only NAND is documented.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++
- 3 files changed, 700 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -23,3 +23,10 @@ config PINCTRL_BCM6358
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
- select MFD_SYSCON
-+
-+config PINCTRL_BCM6362
-+ bool "BCM6362 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
-+obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
-@@ -0,0 +1,692 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6362_NGPIO 48
-+
-+/* GPIO_BASEMODE register */
-+#define BASEMODE_NAND BIT(2)
-+
-+enum bcm6362_pinctrl_reg {
-+ BCM6362_LEDCTRL,
-+ BCM6362_MODE,
-+ BCM6362_CTRL,
-+ BCM6362_BASEMODE,
-+};
-+
-+struct bcm6362_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6362_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ enum bcm6362_pinctrl_reg reg;
-+ u32 basemode_mask;
-+};
-+
-+struct bcm6362_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *led;
-+ void __iomem *mode;
-+ void __iomem *ctrl;
-+ void __iomem *basemode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6362_PIN(a, b, mask) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(mask), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6362_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ BCM6362_PIN(8, "gpio8", BASEMODE_NAND),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ BCM6362_PIN(12, "gpio12", BASEMODE_NAND),
-+ BCM6362_PIN(13, "gpio13", BASEMODE_NAND),
-+ BCM6362_PIN(14, "gpio14", BASEMODE_NAND),
-+ BCM6362_PIN(15, "gpio15", BASEMODE_NAND),
-+ BCM6362_PIN(16, "gpio16", BASEMODE_NAND),
-+ BCM6362_PIN(17, "gpio17", BASEMODE_NAND),
-+ BCM6362_PIN(18, "gpio18", BASEMODE_NAND),
-+ BCM6362_PIN(19, "gpio19", BASEMODE_NAND),
-+ BCM6362_PIN(20, "gpio20", BASEMODE_NAND),
-+ BCM6362_PIN(21, "gpio21", BASEMODE_NAND),
-+ BCM6362_PIN(22, "gpio22", BASEMODE_NAND),
-+ BCM6362_PIN(23, "gpio23", BASEMODE_NAND),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ BCM6362_PIN(27, "gpio27", BASEMODE_NAND),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+
-+static unsigned nand_grp_pins[] = {
-+ 8, 12, 13, 14, 15, 16, 17,
-+ 18, 19, 20, 21, 22, 23, 27,
-+};
-+
-+#define BCM6362_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6362_pingroup bcm6362_groups[] = {
-+ BCM6362_GROUP(gpio0),
-+ BCM6362_GROUP(gpio1),
-+ BCM6362_GROUP(gpio2),
-+ BCM6362_GROUP(gpio3),
-+ BCM6362_GROUP(gpio4),
-+ BCM6362_GROUP(gpio5),
-+ BCM6362_GROUP(gpio6),
-+ BCM6362_GROUP(gpio7),
-+ BCM6362_GROUP(gpio8),
-+ BCM6362_GROUP(gpio9),
-+ BCM6362_GROUP(gpio10),
-+ BCM6362_GROUP(gpio11),
-+ BCM6362_GROUP(gpio12),
-+ BCM6362_GROUP(gpio13),
-+ BCM6362_GROUP(gpio14),
-+ BCM6362_GROUP(gpio15),
-+ BCM6362_GROUP(gpio16),
-+ BCM6362_GROUP(gpio17),
-+ BCM6362_GROUP(gpio18),
-+ BCM6362_GROUP(gpio19),
-+ BCM6362_GROUP(gpio20),
-+ BCM6362_GROUP(gpio21),
-+ BCM6362_GROUP(gpio22),
-+ BCM6362_GROUP(gpio23),
-+ BCM6362_GROUP(gpio24),
-+ BCM6362_GROUP(gpio25),
-+ BCM6362_GROUP(gpio26),
-+ BCM6362_GROUP(gpio27),
-+ BCM6362_GROUP(gpio28),
-+ BCM6362_GROUP(gpio29),
-+ BCM6362_GROUP(gpio30),
-+ BCM6362_GROUP(gpio31),
-+ BCM6362_GROUP(gpio32),
-+ BCM6362_GROUP(gpio33),
-+ BCM6362_GROUP(gpio34),
-+ BCM6362_GROUP(gpio35),
-+ BCM6362_GROUP(gpio36),
-+ BCM6362_GROUP(gpio37),
-+ BCM6362_GROUP(gpio38),
-+ BCM6362_GROUP(gpio39),
-+ BCM6362_GROUP(gpio40),
-+ BCM6362_GROUP(gpio41),
-+ BCM6362_GROUP(gpio42),
-+ BCM6362_GROUP(gpio43),
-+ BCM6362_GROUP(gpio44),
-+ BCM6362_GROUP(gpio45),
-+ BCM6362_GROUP(gpio46),
-+ BCM6362_GROUP(gpio47),
-+ BCM6362_GROUP(nand_grp),
-+};
-+
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const robosw_led_data_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const robosw_led_clk_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const robosw_led0_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const robosw_led1_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const spi_cs2_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const spi_cs3_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const ntr_pulse_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const uart1_scts_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const uart1_srts_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const uart1_sdin_groups[] = {
-+ "gpio14",
-+};
-+
-+static const char * const uart1_sdout_groups[] = {
-+ "gpio15",
-+};
-+
-+static const char * const adsl_spi_miso_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const adsl_spi_mosi_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const adsl_spi_clk_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const adsl_spi_cs_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const ephy0_led_groups[] = {
-+ "gpio20",
-+};
-+
-+static const char * const ephy1_led_groups[] = {
-+ "gpio21",
-+};
-+
-+static const char * const ephy2_led_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const ephy3_led_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const ext_irq0_groups[] = {
-+ "gpio24",
-+};
-+
-+static const char * const ext_irq1_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ext_irq2_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ext_irq3_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const wifi_groups[] = {
-+ "gpio32",
-+ "gpio33",
-+ "gpio34",
-+ "gpio35",
-+ "gpio36",
-+ "gpio37",
-+ "gpio38",
-+ "gpio39",
-+ "gpio40",
-+ "gpio41",
-+ "gpio42",
-+ "gpio43",
-+ "gpio44",
-+ "gpio45",
-+ "gpio46",
-+ "gpio47",
-+};
-+
-+static const char * const nand_groups[] = {
-+ "nand_grp",
-+};
-+
-+#define BCM6362_LED_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_LEDCTRL, \
-+ }
-+
-+#define BCM6362_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_MODE, \
-+ }
-+
-+#define BCM6362_CTRL_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_CTRL, \
-+ }
-+
-+#define BCM6362_BASEMODE_FUN(n, mask) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_BASEMODE, \
-+ .basemode_mask = (mask), \
-+ }
-+
-+static const struct bcm6362_function bcm6362_funcs[] = {
-+ BCM6362_LED_FUN(led),
-+ BCM6362_MODE_FUN(usb_device_led),
-+ BCM6362_MODE_FUN(sys_irq),
-+ BCM6362_MODE_FUN(serial_led_clk),
-+ BCM6362_MODE_FUN(serial_led_data),
-+ BCM6362_MODE_FUN(robosw_led_data),
-+ BCM6362_MODE_FUN(robosw_led_clk),
-+ BCM6362_MODE_FUN(robosw_led0),
-+ BCM6362_MODE_FUN(robosw_led1),
-+ BCM6362_MODE_FUN(inet_led),
-+ BCM6362_MODE_FUN(spi_cs2),
-+ BCM6362_MODE_FUN(spi_cs3),
-+ BCM6362_MODE_FUN(ntr_pulse),
-+ BCM6362_MODE_FUN(uart1_scts),
-+ BCM6362_MODE_FUN(uart1_srts),
-+ BCM6362_MODE_FUN(uart1_sdin),
-+ BCM6362_MODE_FUN(uart1_sdout),
-+ BCM6362_MODE_FUN(adsl_spi_miso),
-+ BCM6362_MODE_FUN(adsl_spi_mosi),
-+ BCM6362_MODE_FUN(adsl_spi_clk),
-+ BCM6362_MODE_FUN(adsl_spi_cs),
-+ BCM6362_MODE_FUN(ephy0_led),
-+ BCM6362_MODE_FUN(ephy1_led),
-+ BCM6362_MODE_FUN(ephy2_led),
-+ BCM6362_MODE_FUN(ephy3_led),
-+ BCM6362_MODE_FUN(ext_irq0),
-+ BCM6362_MODE_FUN(ext_irq1),
-+ BCM6362_MODE_FUN(ext_irq2),
-+ BCM6362_MODE_FUN(ext_irq3),
-+ BCM6362_CTRL_FUN(wifi),
-+ BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND),
-+};
-+
-+static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6362_groups);
-+}
-+
-+static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6362_groups[group].name;
-+}
-+
-+static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6362_groups[group].pins;
-+ *num_pins = bcm6362_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6362_funcs);
-+}
-+
-+static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6362_funcs[selector].name;
-+}
-+
-+static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6362_funcs[selector].groups;
-+ *num_groups = bcm6362_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 tmp;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= val & mask;
-+ __raw_writel(tmp, reg);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin)
-+{
-+ const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin];
-+ u32 mask = BIT(pin % 32);
-+
-+ if (desc->drv_data)
-+ bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0);
-+
-+ if (pin < 32) {
-+ /* base mode 0 => gpio 1 => mux function */
-+ bcm6362_rmw_mux(pctl, pctl->mode, mask, 0);
-+
-+ /* pins 0-23 might be muxed to led */
-+ if (pin < 24)
-+ bcm6362_rmw_mux(pctl, pctl->led, mask, 0);
-+ } else {
-+ /* ctrl reg 0 => wifi function 1 => gpio */
-+ bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask);
-+ }
-+}
-+
-+static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6362_pingroup *grp = &bcm6362_groups[group];
-+ const struct bcm6362_function *f = &bcm6362_funcs[selector];
-+ unsigned i;
-+ void __iomem *reg;
-+ u32 val, mask;
-+
-+ for (i = 0; i < grp->num_pins; i++)
-+ bcm6362_set_gpio(pctl, grp->pins[i]);
-+
-+ switch (f->reg) {
-+ case BCM6362_LEDCTRL:
-+ reg = pctl->led;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM6362_MODE:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM6362_CTRL:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = 0;
-+ break;
-+ case BCM6362_BASEMODE:
-+ reg = pctl->basemode;
-+ mask = f->basemode_mask;
-+ val = f->basemode_mask;
-+ break;
-+ default:
-+ WARN_ON(1);
-+ return -EINVAL;
-+ }
-+
-+ bcm6362_rmw_mux(pctl, reg, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm6362_set_gpio(pctl, offset);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6362_pctl_ops = {
-+ .get_groups_count = bcm6362_pinctrl_get_group_count,
-+ .get_group_name = bcm6362_pinctrl_get_group_name,
-+ .get_group_pins = bcm6362_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6362_pmx_ops = {
-+ .get_functions_count = bcm6362_pinctrl_get_func_count,
-+ .get_function_name = bcm6362_pinctrl_get_func_name,
-+ .get_function_groups = bcm6362_pinctrl_get_groups,
-+ .set_mux = bcm6362_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6362_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6362_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6362_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *led, *mode, *ctrl, *basemode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
-+ led = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(led))
-+ return PTR_ERR(led);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
-+ ctrl = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(ctrl))
-+ return PTR_ERR(ctrl);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
-+ basemode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->led = led;
-+ pctl->mode = mode;
-+ pctl->ctrl = ctrl;
-+ pctl->basemode = basemode;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6362_pctl_ops;
-+ pctl->desc.pmxops = &bcm6362_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6362_pins);
-+ pctl->desc.pins = bcm6362_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6362_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6362_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6362-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6362_pinctrl_driver = {
-+ .probe = bcm6362_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6362-pinctrl",
-+ .of_match_table = bcm6362_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6362_pinctrl_driver);
+++ /dev/null
-From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:51 +0200
-Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6368 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++
- 1 file changed, 67 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
-@@ -0,0 +1,67 @@
-+* Broadcom BCM6368 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6368-pinctrl".
-+- reg: Register specifiers of dirout, dat, mode registers.
-+- reg-names: Must be "dirout", "dat", "mode".
-+- brcm,gpiobasemode: Phandle to the gpio basemode register.
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6368-pinctrl";
-+ reg = <0x10000080 0x08>,
-+ <0x10000088 0x08>,
-+ <0x10000098 0x04>;
-+ reg-names = "dirout", "dat", "mode";
-+ brcm,gpiobasemode = <&gpiobasemode>;
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+gpiobasemode: syscon@100000b8 {
-+ compatible = "brcm,bcm6368-gpiobasemode", "syscon";
-+ reg = <0x100000b8 4>;
-+ native-endian;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 analog_afe0
-+gpio1 1 analog_afe1
-+gpio2 2 sys_irq
-+gpio3 3 serial_led_data
-+gpio4 4 serial_led_clk
-+gpio5 5 inet_led
-+gpio6 6 ephy0_led
-+gpio7 7 ephy1_led
-+gpio8 8 ephy2_led
-+gpio9 9 ephy3_led
-+gpio10 10 robosw_led_data
-+gpio11 11 robosw_led_clk
-+gpio12 12 robosw_led0
-+gpio13 13 robosw_led1
-+gpio14 14 usb_device_led
-+gpio15 15 -
-+gpio16 16 pci_req1
-+gpio17 17 pci_gnt1
-+gpio18 18 pci_intb
-+gpio19 19 pci_req0
-+gpio20 20 pci_gnt0
-+gpio21 21 -
-+gpio22 22 pcmcia_cd1
-+gpio23 23 pcmcia_cd2
-+gpio24 24 pcmcia_vs1
-+gpio25 25 pcmcia_vs2
-+gpio26 26 ebi_cs2
-+gpio27 27 ebi_cs3
-+gpio28 28 spi_cs2
-+gpio29 29 spi_cs3
-+gpio30 30 spi_cs4
-+gpio31 31 spi_cs5
-+uart1_grp 30-33 uart1
+++ /dev/null
-From 90be3cb4f1a45b8be4a4ec264cd66c2f8e893fcb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:18:25 +0200
-Subject: [PATCH 11/16] pinctrl: add a pincontrol driver for BCM6368
-
-Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
-GPIOs onto alternative functions. Not all are documented.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 15 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c | 573 ++++++++++++++++++++++++++++++
- 3 files changed, 589 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -30,3 +30,18 @@ config PINCTRL_BCM6362
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6368
-+ bool "BCM6368 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+ select MFD_SYSCON
-+
-+config PINCTRL_BCM63268
-+ bool "BCM63268 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
-+obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
-@@ -0,0 +1,573 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/kernel.h>
-+#include <linux/gpio.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/of_gpio.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+#include <linux/platform_device.h>
-+#include <linux/regmap.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6368_NGPIO 38
-+
-+#define BCM6368_BASEMODE_MASK 0x7
-+#define BCM6368_BASEMODE_GPIO 0x0
-+#define BCM6368_BASEMODE_UART1 0x1
-+
-+struct bcm6368_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6368_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned dir_out:16;
-+ unsigned basemode:3;
-+};
-+
-+struct bcm6368_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ struct regmap_field *overlay;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6368_BASEMODE_PIN(a, b) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)true \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6368_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ BCM6368_BASEMODE_PIN(30, "gpio30"),
-+ BCM6368_BASEMODE_PIN(31, "gpio31"),
-+ BCM6368_BASEMODE_PIN(32, "gpio32"),
-+ BCM6368_BASEMODE_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
-+
-+#define BCM6368_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6368_pingroup bcm6368_groups[] = {
-+ BCM6368_GROUP(gpio0),
-+ BCM6368_GROUP(gpio1),
-+ BCM6368_GROUP(gpio2),
-+ BCM6368_GROUP(gpio3),
-+ BCM6368_GROUP(gpio4),
-+ BCM6368_GROUP(gpio5),
-+ BCM6368_GROUP(gpio6),
-+ BCM6368_GROUP(gpio7),
-+ BCM6368_GROUP(gpio8),
-+ BCM6368_GROUP(gpio9),
-+ BCM6368_GROUP(gpio10),
-+ BCM6368_GROUP(gpio11),
-+ BCM6368_GROUP(gpio12),
-+ BCM6368_GROUP(gpio13),
-+ BCM6368_GROUP(gpio14),
-+ BCM6368_GROUP(gpio15),
-+ BCM6368_GROUP(gpio16),
-+ BCM6368_GROUP(gpio17),
-+ BCM6368_GROUP(gpio18),
-+ BCM6368_GROUP(gpio19),
-+ BCM6368_GROUP(gpio20),
-+ BCM6368_GROUP(gpio21),
-+ BCM6368_GROUP(gpio22),
-+ BCM6368_GROUP(gpio23),
-+ BCM6368_GROUP(gpio24),
-+ BCM6368_GROUP(gpio25),
-+ BCM6368_GROUP(gpio26),
-+ BCM6368_GROUP(gpio27),
-+ BCM6368_GROUP(gpio28),
-+ BCM6368_GROUP(gpio29),
-+ BCM6368_GROUP(gpio30),
-+ BCM6368_GROUP(gpio31),
-+ BCM6368_GROUP(uart1_grp),
-+};
-+
-+static const char * const analog_afe_0_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const analog_afe_1_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const inet_led_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const ephy0_led_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const ephy1_led_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const ephy2_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const ephy3_led_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const robosw_led_data_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const robosw_led_clk_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const robosw_led0_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const robosw_led1_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio14",
-+};
-+
-+static const char * const pci_req1_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const pci_gnt1_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const pci_intb_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const pci_req0_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const pci_gnt0_groups[] = {
-+ "gpio20",
-+};
-+
-+static const char * const pcmcia_cd1_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const pcmcia_cd2_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const pcmcia_vs1_groups[] = {
-+ "gpio24",
-+};
-+
-+static const char * const pcmcia_vs2_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ebi_cs2_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ebi_cs3_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const spi_cs2_groups[] = {
-+ "gpio28",
-+};
-+
-+static const char * const spi_cs3_groups[] = {
-+ "gpio29",
-+};
-+
-+static const char * const spi_cs4_groups[] = {
-+ "gpio30",
-+};
-+
-+static const char * const spi_cs5_groups[] = {
-+ "gpio31",
-+};
-+
-+static const char * const uart1_groups[] = {
-+ "uart1_grp",
-+};
-+
-+#define BCM6368_FUN(n, out) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .dir_out = out, \
-+ }
-+
-+#define BCM6368_BASEMODE_FUN(n, val, out) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .basemode = BCM6368_BASEMODE_##val, \
-+ .dir_out = out, \
-+ }
-+
-+static const struct bcm6368_function bcm6368_funcs[] = {
-+ BCM6368_FUN(analog_afe_0, 1),
-+ BCM6368_FUN(analog_afe_1, 1),
-+ BCM6368_FUN(sys_irq, 1),
-+ BCM6368_FUN(serial_led_data, 1),
-+ BCM6368_FUN(serial_led_clk, 1),
-+ BCM6368_FUN(inet_led, 1),
-+ BCM6368_FUN(ephy0_led, 1),
-+ BCM6368_FUN(ephy1_led, 1),
-+ BCM6368_FUN(ephy2_led, 1),
-+ BCM6368_FUN(ephy3_led, 1),
-+ BCM6368_FUN(robosw_led_data, 1),
-+ BCM6368_FUN(robosw_led_clk, 1),
-+ BCM6368_FUN(robosw_led0, 1),
-+ BCM6368_FUN(robosw_led1, 1),
-+ BCM6368_FUN(usb_device_led, 1),
-+ BCM6368_FUN(pci_req1, 0),
-+ BCM6368_FUN(pci_gnt1, 0),
-+ BCM6368_FUN(pci_intb, 0),
-+ BCM6368_FUN(pci_req0, 0),
-+ BCM6368_FUN(pci_gnt0, 0),
-+ BCM6368_FUN(pcmcia_cd1, 0),
-+ BCM6368_FUN(pcmcia_cd2, 0),
-+ BCM6368_FUN(pcmcia_vs1, 0),
-+ BCM6368_FUN(pcmcia_vs2, 0),
-+ BCM6368_FUN(ebi_cs2, 1),
-+ BCM6368_FUN(ebi_cs3, 1),
-+ BCM6368_FUN(spi_cs2, 1),
-+ BCM6368_FUN(spi_cs3, 1),
-+ BCM6368_FUN(spi_cs4, 1),
-+ BCM6368_FUN(spi_cs5, 1),
-+ BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
-+};
-+
-+static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6368_groups);
-+}
-+
-+static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6368_groups[group].name;
-+}
-+
-+static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6368_groups[group].pins;
-+ *num_pins = bcm6368_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6368_funcs);
-+}
-+
-+static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6368_funcs[selector].name;
-+}
-+
-+static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6368_funcs[selector].groups;
-+ *num_groups = bcm6368_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6368_rmw_mux(struct bcm6368_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ u32 tmp;
-+
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= (val & mask);
-+ __raw_writel(tmp, reg);
-+}
-+
-+static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6368_pingroup *grp = &bcm6368_groups[group];
-+ const struct bcm6368_function *fun = &bcm6368_funcs[selector];
-+ unsigned long flags;
-+ int i, pin;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (fun->basemode) {
-+ u32 mask = 0;
-+
-+ for (i = 0; i < grp->num_pins; i++) {
-+ pin = grp->pins[i];
-+ if (pin < 32)
-+ mask |= BIT(pin);
-+ }
-+
-+ bcm6368_rmw_mux(pctl, pctl->mode, mask, 0);
-+ regmap_field_write(pctl->overlay, fun->basemode);
-+ } else {
-+ pin = grp->pins[0];
-+
-+ if (bcm6368_pins[pin].drv_data)
-+ regmap_field_write(pctl->overlay,
-+ BCM6368_BASEMODE_GPIO);
-+
-+ bcm6368_rmw_mux(pctl, pctl->mode, BIT(pin), BIT(pin));
-+ }
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+
-+ for (pin = 0; pin < grp->num_pins; pin++) {
-+ int hw_gpio = bcm6368_pins[pin].number;
-+ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
-+
-+ if (fun->dir_out & BIT(pin))
-+ gc->direction_output(gc, hw_gpio % 32, 0);
-+ else
-+ gc->direction_input(gc, hw_gpio % 32);
-+ }
-+
-+ return 0;
-+}
-+
-+static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ unsigned long flags;
-+
-+ if (offset >= 32 && !bcm6368_pins[offset].drv_data)
-+ return 0;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ /* disable all functions using this pin */
-+ if (offset < 32)
-+ bcm6368_rmw_mux(pctl, pctl->mode, BIT(offset), 0);
-+
-+ if (bcm6368_pins[offset].drv_data)
-+ regmap_field_write(pctl->overlay, BCM6368_BASEMODE_GPIO);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6368_pctl_ops = {
-+ .get_groups_count = bcm6368_pinctrl_get_group_count,
-+ .get_group_name = bcm6368_pinctrl_get_group_name,
-+ .get_group_pins = bcm6368_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6368_pmx_ops = {
-+ .get_functions_count = bcm6368_pinctrl_get_func_count,
-+ .get_function_name = bcm6368_pinctrl_get_func_name,
-+ .get_function_groups = bcm6368_pinctrl_get_groups,
-+ .set_mux = bcm6368_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6368_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6368_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6368_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode;
-+ struct regmap *basemode;
-+ struct reg_field overlay = REG_FIELD(0, 0, 3);
-+
-+ if (pdev->dev.of_node)
-+ basemode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+ "brcm,gpiobasemode");
-+ else
-+ basemode = syscon_regmap_lookup_by_pdevname("syscon.b00000b8");
-+
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ pctl->overlay = devm_regmap_field_alloc(&pdev->dev, basemode, overlay);
-+ if (IS_ERR(pctl->overlay))
-+ return PTR_ERR(pctl->overlay);
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ /* disable all muxes by default */
-+ __raw_writel(0, pctl->mode);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6368_pctl_ops;
-+ pctl->desc.pmxops = &bcm6368_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6368_pins);
-+ pctl->desc.pins = bcm6368_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6368_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6368_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6368-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6368_pinctrl_driver = {
-+ .probe = bcm6368_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6368-pinctrl",
-+ .of_match_table = bcm6368_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6368_pinctrl_driver);
+++ /dev/null
-From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:37:08 +0200
-Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in the BCM63268
-family SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt | 88 ++++++++++++++++++++++
- 1 file changed, 88 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
-@@ -0,0 +1,88 @@
-+* Broadcom BCM63268 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6362-pinctrl".
-+- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
-+- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@100000c0 {
-+ compatible = "brcm,bcm63268-pinctrl";
-+ reg = <0x100000c0 0x8>,
-+ <0x100000c8 0x8>,
-+ <0x100000d0 0x4>,
-+ <0x100000d8 0x4>,
-+ <0x100000dc 0x4>,
-+ <0x100000f8 0x4>;
-+ reg-names = "dirout", "dat", "led", "mode",
-+ "ctrl", "basemode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, serial_led_clk
-+gpio1 1 led, serial_led_data
-+gpio2 2 led,
-+gpio3 3 led,
-+gpio4 4 led,
-+gpio5 5 led,
-+gpio6 6 led,
-+gpio7 7 led,
-+gpio8 8 led, hsspi_cs6
-+gpio9 9 led, hsspi_cs7
-+gpio10 10 led, uart1_scts
-+gpio11 11 led, uart1_srts
-+gpio12 12 led, uart1_sdin
-+gpio13 13 led, uart1_sdout
-+gpio14 14 led, ntr_pulse_in
-+gpio15 15 led, dsl_ntr_pulse_out
-+gpio16 16 led, hsspi_cs4
-+gpio17 17 led, hsspi_cs5
-+gpio18 18 led, adsl_spi_miso
-+gpio19 19 led, adsl_spi_mosi
-+gpio20 20 led,
-+gpio21 21 led,
-+gpio22 22 led, vreg_clk
-+gpio23 23 led, pcie_clkreq_b
-+gpio24 24 uart1_scts
-+gpio25 25 uart1_srts
-+gpio26 26 uart1_sdin
-+gpio27 27 uart1_sdout
-+gpio28 28 ntr_pulse_in
-+gpio29 29 dsl_ntr_pulse_out
-+gpio30 30 switch_led_clk
-+gpio31 31 switch_led_data
-+gpio32 32 wifi
-+gpio33 33 wifi
-+gpio34 34 wifi
-+gpio35 35 wifi
-+gpio36 36 wifi
-+gpio37 37 wifi
-+gpio38 38 wifi
-+gpio39 39 wifi
-+gpio40 40 wifi
-+gpio41 41 wifi
-+gpio42 42 wifi
-+gpio43 43 wifi
-+gpio44 44 wifi
-+gpio45 45 wifi
-+gpio46 46 wifi
-+gpio47 47 wifi
-+gpio48 48 wifi
-+gpio49 49 wifi
-+gpio50 50 wifi
-+gpio51 51 wifi
-+nand_grp 2-7,24-31 nand
-+dect_pd_grp 8-9 dect_pd
-+vdsl_phy0_grp 10-11 vdsl_phy0
-+vdsl_phy1_grp 12-13 vdsl_phy1
-+vdsl_phy2_grp 24-25 vdsl_phy2
-+vdsl_phy3_grp 26-27 vdsl_phy3
+++ /dev/null
-From 8665d3ea63649cc155286c75f83f694a930580e5 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:19:12 +0200
-Subject: [PATCH 13/16] pinctrl: add a pincontrol driver for BCM63268
-
-Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs
-to different functions. Depending on the mux, these are either single
-pin configurations or whole pin groups.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c | 710 +++++++++++++++++++++++++++++
- 2 files changed, 711 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
-
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
- obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
-+obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
-@@ -0,0 +1,710 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM63268_NGPIO 52
-+
-+/* GPIO_BASEMODE register */
-+#define BASEMODE_NAND BIT(2) /* GPIOs 2-7, 24-31 */
-+#define BASEMODE_GPIO35 BIT(4) /* GPIO 35 */
-+#define BASEMODE_DECTPD BIT(5) /* GPIOs 8/9 */
-+#define BASEMODE_VDSL_PHY_0 BIT(6) /* GPIOs 10/11 */
-+#define BASEMODE_VDSL_PHY_1 BIT(7) /* GPIOs 12/13 */
-+#define BASEMODE_VDSL_PHY_2 BIT(8) /* GPIOs 24/25 */
-+#define BASEMODE_VDSL_PHY_3 BIT(9) /* GPIOs 26/27 */
-+
-+enum bcm63268_pinctrl_reg {
-+ BCM63268_LEDCTRL,
-+ BCM63268_MODE,
-+ BCM63268_CTRL,
-+ BCM63268_BASEMODE,
-+};
-+
-+struct bcm63268_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm63268_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ enum bcm63268_pinctrl_reg reg;
-+ u32 mask;
-+};
-+
-+struct bcm63268_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *led;
-+ void __iomem *mode;
-+ void __iomem *ctrl;
-+ void __iomem *basemode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM63268_PIN(a, b, basemode) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(basemode) \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm63268_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ BCM63268_PIN(2, "gpio2", BASEMODE_NAND),
-+ BCM63268_PIN(3, "gpio3", BASEMODE_NAND),
-+ BCM63268_PIN(4, "gpio4", BASEMODE_NAND),
-+ BCM63268_PIN(5, "gpio5", BASEMODE_NAND),
-+ BCM63268_PIN(6, "gpio6", BASEMODE_NAND),
-+ BCM63268_PIN(7, "gpio7", BASEMODE_NAND),
-+ BCM63268_PIN(8, "gpio8", BASEMODE_DECTPD),
-+ BCM63268_PIN(9, "gpio9", BASEMODE_DECTPD),
-+ BCM63268_PIN(10, "gpio10", BASEMODE_VDSL_PHY_0),
-+ BCM63268_PIN(11, "gpio11", BASEMODE_VDSL_PHY_0),
-+ BCM63268_PIN(12, "gpio12", BASEMODE_VDSL_PHY_1),
-+ BCM63268_PIN(13, "gpio13", BASEMODE_VDSL_PHY_1),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ BCM63268_PIN(24, "gpio24", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
-+ BCM63268_PIN(25, "gpio25", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
-+ BCM63268_PIN(26, "gpio26", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
-+ BCM63268_PIN(27, "gpio27", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
-+ BCM63268_PIN(28, "gpio28", BASEMODE_NAND),
-+ BCM63268_PIN(29, "gpio29", BASEMODE_NAND),
-+ BCM63268_PIN(30, "gpio30", BASEMODE_NAND),
-+ BCM63268_PIN(31, "gpio31", BASEMODE_NAND),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+ PINCTRL_PIN(48, "gpio48"),
-+ PINCTRL_PIN(49, "gpio49"),
-+ PINCTRL_PIN(50, "gpio50"),
-+ PINCTRL_PIN(51, "gpio51"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+static unsigned gpio48_pins[] = { 48 };
-+static unsigned gpio49_pins[] = { 49 };
-+static unsigned gpio50_pins[] = { 50 };
-+static unsigned gpio51_pins[] = { 51 };
-+
-+static unsigned nand_grp_pins[] = {
-+ 2, 3, 4, 5, 6, 7, 24,
-+ 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned dectpd_grp_pins[] = { 8, 9 };
-+static unsigned vdsl_phy0_grp_pins[] = { 10, 11 };
-+static unsigned vdsl_phy1_grp_pins[] = { 12, 13 };
-+static unsigned vdsl_phy2_grp_pins[] = { 24, 25 };
-+static unsigned vdsl_phy3_grp_pins[] = { 26, 27 };
-+
-+#define BCM63268_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm63268_pingroup bcm63268_groups[] = {
-+ BCM63268_GROUP(gpio0),
-+ BCM63268_GROUP(gpio1),
-+ BCM63268_GROUP(gpio2),
-+ BCM63268_GROUP(gpio3),
-+ BCM63268_GROUP(gpio4),
-+ BCM63268_GROUP(gpio5),
-+ BCM63268_GROUP(gpio6),
-+ BCM63268_GROUP(gpio7),
-+ BCM63268_GROUP(gpio8),
-+ BCM63268_GROUP(gpio9),
-+ BCM63268_GROUP(gpio10),
-+ BCM63268_GROUP(gpio11),
-+ BCM63268_GROUP(gpio12),
-+ BCM63268_GROUP(gpio13),
-+ BCM63268_GROUP(gpio14),
-+ BCM63268_GROUP(gpio15),
-+ BCM63268_GROUP(gpio16),
-+ BCM63268_GROUP(gpio17),
-+ BCM63268_GROUP(gpio18),
-+ BCM63268_GROUP(gpio19),
-+ BCM63268_GROUP(gpio20),
-+ BCM63268_GROUP(gpio21),
-+ BCM63268_GROUP(gpio22),
-+ BCM63268_GROUP(gpio23),
-+ BCM63268_GROUP(gpio24),
-+ BCM63268_GROUP(gpio25),
-+ BCM63268_GROUP(gpio26),
-+ BCM63268_GROUP(gpio27),
-+ BCM63268_GROUP(gpio28),
-+ BCM63268_GROUP(gpio29),
-+ BCM63268_GROUP(gpio30),
-+ BCM63268_GROUP(gpio31),
-+ BCM63268_GROUP(gpio32),
-+ BCM63268_GROUP(gpio33),
-+ BCM63268_GROUP(gpio34),
-+ BCM63268_GROUP(gpio35),
-+ BCM63268_GROUP(gpio36),
-+ BCM63268_GROUP(gpio37),
-+ BCM63268_GROUP(gpio38),
-+ BCM63268_GROUP(gpio39),
-+ BCM63268_GROUP(gpio40),
-+ BCM63268_GROUP(gpio41),
-+ BCM63268_GROUP(gpio42),
-+ BCM63268_GROUP(gpio43),
-+ BCM63268_GROUP(gpio44),
-+ BCM63268_GROUP(gpio45),
-+ BCM63268_GROUP(gpio46),
-+ BCM63268_GROUP(gpio47),
-+ BCM63268_GROUP(gpio48),
-+ BCM63268_GROUP(gpio49),
-+ BCM63268_GROUP(gpio50),
-+ BCM63268_GROUP(gpio51),
-+
-+ /* multi pin groups */
-+ BCM63268_GROUP(nand_grp),
-+ BCM63268_GROUP(dectpd_grp),
-+ BCM63268_GROUP(vdsl_phy0_grp),
-+ BCM63268_GROUP(vdsl_phy1_grp),
-+ BCM63268_GROUP(vdsl_phy2_grp),
-+ BCM63268_GROUP(vdsl_phy3_grp),
-+};
-+
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const hsspi_cs4_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const hsspi_cs5_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const hsspi_cs6_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const hsspi_cs7_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const uart1_scts_groups[] = {
-+ "gpio10",
-+ "gpio24",
-+};
-+
-+static const char * const uart1_srts_groups[] = {
-+ "gpio11",
-+ "gpio25",
-+};
-+
-+static const char * const uart1_sdin_groups[] = {
-+ "gpio12",
-+ "gpio26",
-+};
-+
-+static const char * const uart1_sdout_groups[] = {
-+ "gpio13",
-+ "gpio27",
-+};
-+
-+static const char * const ntr_pulse_in_groups[] = {
-+ "gpio14",
-+ "gpio28",
-+};
-+
-+static const char * const dsl_ntr_pulse_out_groups[] = {
-+ "gpio15",
-+ "gpio29",
-+};
-+
-+static const char * const adsl_spi_miso_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const adsl_spi_mosi_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const vreg_clk_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const pcie_clkreq_b_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const switch_led_clk_groups[] = {
-+ "gpio30",
-+};
-+
-+static const char * const switch_led_data_groups[] = {
-+ "gpio31",
-+};
-+
-+static const char * const wifi_groups[] = {
-+ "gpio32",
-+ "gpio33",
-+ "gpio34",
-+ "gpio35",
-+ "gpio36",
-+ "gpio37",
-+ "gpio38",
-+ "gpio39",
-+ "gpio40",
-+ "gpio41",
-+ "gpio42",
-+ "gpio43",
-+ "gpio44",
-+ "gpio45",
-+ "gpio46",
-+ "gpio47",
-+ "gpio48",
-+ "gpio49",
-+ "gpio50",
-+ "gpio51",
-+};
-+
-+static const char * const nand_groups[] = {
-+ "nand_grp",
-+};
-+
-+static const char * const dectpd_groups[] = {
-+ "dectpd_grp",
-+};
-+
-+static const char * const vdsl_phy_override_0_groups[] = {
-+ "vdsl_phy_override_0_grp",
-+};
-+
-+static const char * const vdsl_phy_override_1_groups[] = {
-+ "vdsl_phy_override_1_grp",
-+};
-+
-+static const char * const vdsl_phy_override_2_groups[] = {
-+ "vdsl_phy_override_2_grp",
-+};
-+
-+static const char * const vdsl_phy_override_3_groups[] = {
-+ "vdsl_phy_override_3_grp",
-+};
-+
-+#define BCM63268_LED_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_LEDCTRL, \
-+ }
-+
-+#define BCM63268_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_MODE, \
-+ }
-+
-+#define BCM63268_CTRL_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_CTRL, \
-+ }
-+
-+#define BCM63268_BASEMODE_FUN(n, val) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_BASEMODE, \
-+ .mask = val, \
-+ }
-+
-+static const struct bcm63268_function bcm63268_funcs[] = {
-+ BCM63268_LED_FUN(led),
-+ BCM63268_MODE_FUN(serial_led_clk),
-+ BCM63268_MODE_FUN(serial_led_data),
-+ BCM63268_MODE_FUN(hsspi_cs6),
-+ BCM63268_MODE_FUN(hsspi_cs7),
-+ BCM63268_MODE_FUN(uart1_scts),
-+ BCM63268_MODE_FUN(uart1_srts),
-+ BCM63268_MODE_FUN(uart1_sdin),
-+ BCM63268_MODE_FUN(uart1_sdout),
-+ BCM63268_MODE_FUN(ntr_pulse_in),
-+ BCM63268_MODE_FUN(dsl_ntr_pulse_out),
-+ BCM63268_MODE_FUN(hsspi_cs4),
-+ BCM63268_MODE_FUN(hsspi_cs5),
-+ BCM63268_MODE_FUN(adsl_spi_miso),
-+ BCM63268_MODE_FUN(adsl_spi_mosi),
-+ BCM63268_MODE_FUN(vreg_clk),
-+ BCM63268_MODE_FUN(pcie_clkreq_b),
-+ BCM63268_MODE_FUN(switch_led_clk),
-+ BCM63268_MODE_FUN(switch_led_data),
-+ BCM63268_CTRL_FUN(wifi),
-+ BCM63268_BASEMODE_FUN(nand, BASEMODE_NAND),
-+ BCM63268_BASEMODE_FUN(dectpd, BASEMODE_DECTPD),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_0, BASEMODE_VDSL_PHY_0),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_1, BASEMODE_VDSL_PHY_1),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_2, BASEMODE_VDSL_PHY_2),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_3, BASEMODE_VDSL_PHY_3),
-+};
-+
-+static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm63268_groups);
-+}
-+
-+static const char *bcm63268_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm63268_groups[group].name;
-+}
-+
-+static int bcm63268_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group,
-+ const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm63268_groups[group].pins;
-+ *num_pins = bcm63268_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm63268_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm63268_funcs);
-+}
-+
-+static const char *bcm63268_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm63268_funcs[selector].name;
-+}
-+
-+static int bcm63268_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm63268_funcs[selector].groups;
-+ *num_groups = bcm63268_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm63268_rmw_mux(struct bcm63268_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 tmp;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= val;
-+ __raw_writel(tmp, reg);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm63268_set_gpio(struct bcm63268_pinctrl *pctl, unsigned pin)
-+{
-+ const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin];
-+ u32 basemode = (unsigned long)desc->drv_data;
-+ u32 mask = BIT(pin % 32);
-+
-+ if (basemode)
-+ bcm63268_rmw_mux(pctl, pctl->basemode, basemode, 0);
-+
-+ if (pin < 32) {
-+ /* base mode: 0 => gpio, 1 => mux function */
-+ bcm63268_rmw_mux(pctl, pctl->mode, mask, 0);
-+
-+ /* pins 0-23 might be muxed to led */
-+ if (pin < 24)
-+ bcm63268_rmw_mux(pctl, pctl->led, mask, 0);
-+ } else if (pin < 52) {
-+ /* ctrl reg: 0 => wifi function, 1 => gpio */
-+ bcm63268_rmw_mux(pctl, pctl->ctrl, mask, mask);
-+ }
-+}
-+
-+static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm63268_pingroup *grp = &bcm63268_groups[group];
-+ const struct bcm63268_function *f = &bcm63268_funcs[selector];
-+ unsigned i;
-+ void __iomem *reg;
-+ u32 val, mask;
-+
-+ for (i = 0; i < grp->num_pins; i++)
-+ bcm63268_set_gpio(pctl, grp->pins[i]);
-+
-+ switch (f->reg) {
-+ case BCM63268_LEDCTRL:
-+ reg = pctl->led;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM63268_MODE:
-+ reg = pctl->mode;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM63268_CTRL:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = 0;
-+ break;
-+ case BCM63268_BASEMODE:
-+ reg = pctl->basemode;
-+ mask = f->mask;
-+ val = f->mask;
-+ break;
-+ default:
-+ WARN_ON(1);
-+ return -EINVAL;
-+ }
-+
-+ bcm63268_rmw_mux(pctl, reg, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm63268_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm63268_set_gpio(pctl, offset);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm63268_pctl_ops = {
-+ .get_groups_count = bcm63268_pinctrl_get_group_count,
-+ .get_group_name = bcm63268_pinctrl_get_group_name,
-+ .get_group_pins = bcm63268_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm63268_pmx_ops = {
-+ .get_functions_count = bcm63268_pinctrl_get_func_count,
-+ .get_function_name = bcm63268_pinctrl_get_func_name,
-+ .get_function_groups = bcm63268_pinctrl_get_groups,
-+ .set_mux = bcm63268_pinctrl_set_mux,
-+ .gpio_request_enable = bcm63268_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm63268_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm63268_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *led, *mode, *ctrl, *basemode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
-+ led = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(led))
-+ return PTR_ERR(led);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
-+ ctrl = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(ctrl))
-+ return PTR_ERR(ctrl);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
-+ basemode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->led = led;
-+ pctl->mode = mode;
-+ pctl->ctrl = ctrl;
-+ pctl->basemode = basemode;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm63268_pctl_ops;
-+ pctl->desc.pmxops = &bcm63268_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm63268_pins);
-+ pctl->desc.pins = bcm63268_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM63268_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm63268_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm63268-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm63268_pinctrl_driver = {
-+ .probe = bcm63268_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm63268-pinctrl",
-+ .of_match_table = bcm63268_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm63268_pinctrl_driver);
+++ /dev/null
-From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 19 Jan 2014 12:18:03 +0100
-Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
-
-In the same way as the ohci platform driver allows limiting ports,
-enable the same for ehci. This prevents a mismatch in the available
-ports between ehci/ohci on USB 2.0 controllers.
-
-This is needed if the USB host controller always reports the maximum
-number of ports regardless of the number of available ports (because
-one might be set to be usb device).
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/usb/host/ehci-hcd.c | 4 ++++
- drivers/usb/host/ehci-platform.c | 2 ++
- drivers/usb/host/ehci.h | 1 +
- include/linux/usb/ehci_pdriver.h | 1 +
- 4 files changed, 8 insertions(+)
-
---- a/drivers/usb/host/ehci-hcd.c
-+++ b/drivers/usb/host/ehci-hcd.c
-@@ -666,6 +666,10 @@ int ehci_setup(struct usb_hcd *hcd)
-
- /* cache this readonly data; minimize chip reads */
- ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
-+ if (ehci->num_ports) {
-+ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
-+ ehci->hcs_params |= ehci->num_ports;
-+ }
-
- ehci->sbrn = HCD_USB2;
-
---- a/drivers/usb/host/ehci-platform.c
-+++ b/drivers/usb/host/ehci-platform.c
-@@ -60,6 +60,9 @@ static int ehci_platform_reset(struct us
-
- ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
-
-+ if (pdata->num_ports && pdata->num_ports <= 15)
-+ ehci->num_ports = pdata->num_ports;
-+
- if (pdata->pre_setup) {
- retval = pdata->pre_setup(hcd);
- if (retval < 0)
---- a/drivers/usb/host/ehci.h
-+++ b/drivers/usb/host/ehci.h
-@@ -213,6 +213,7 @@ struct ehci_hcd { /* one per controlle
- u32 command;
-
- /* SILICON QUIRKS */
-+ unsigned int num_ports;
- unsigned no_selective_suspend:1;
- unsigned has_fsl_port_bug:1; /* FreeScale */
- unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
---- a/include/linux/usb/ehci_pdriver.h
-+++ b/include/linux/usb/ehci_pdriver.h
-@@ -42,6 +42,7 @@ struct usb_hcd;
- */
- struct usb_ehci_pdata {
- int caps_offset;
-+ unsigned int num_ports;
- unsigned has_tt:1;
- unsigned has_synopsys_hc_bug:1;
- unsigned big_endian_desc:1;
+++ /dev/null
-From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 03:54:05 +0100
-Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
- own file
-
-Move device registration code into its own file to allow sharing it
-between board implementations.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Makefile | 1 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
- arch/mips/bcm63xx/boards/board_common.c | 215 ++++++++++++++++++++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 8 ++
- 4 files changed, 223 insertions(+), 183 deletions(-)
- create mode 100644 arch/mips/bcm63xx/boards/board_common.c
- create mode 100644 arch/mips/bcm63xx/boards/board_common.h
-
---- a/arch/mips/bcm63xx/boards/Makefile
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -1 +1,2 @@
-+obj-y += board_common.o
- obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -12,34 +12,21 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
--#include <linux/platform_device.h>
--#include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_nvram.h>
--#include <bcm63xx_dev_pci.h>
--#include <bcm63xx_dev_enet.h>
--#include <bcm63xx_dev_dsp.h>
--#include <bcm63xx_dev_flash.h>
--#include <bcm63xx_dev_hsspi.h>
--#include <bcm63xx_dev_pcmcia.h>
--#include <bcm63xx_dev_spi.h>
--#include <bcm63xx_dev_usb_ehci.h>
--#include <bcm63xx_dev_usb_ohci.h>
--#include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-+#include "board_common.h"
-+
- #include <uapi/linux/bcm933xx_hcs.h>
-
-
- #define HCS_OFFSET_128K 0x20000
-
--static struct board_info board;
--
- /*
- * known 3368 boards
- */
-@@ -712,52 +699,6 @@ static const struct board_info __initcon
- };
-
- /*
-- * Register a sane SPROMv2 to make the on-board
-- * bcm4318 WLAN work
-- */
--#ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-- .revision = 0x02,
-- .board_rev = 0x17,
-- .country_code = 0x0,
-- .ant_available_bg = 0x3,
-- .pa0b0 = 0x15ae,
-- .pa0b1 = 0xfa85,
-- .pa0b2 = 0xfe8d,
-- .pa1b0 = 0xffff,
-- .pa1b1 = 0xffff,
-- .pa1b2 = 0xffff,
-- .gpio0 = 0xff,
-- .gpio1 = 0xff,
-- .gpio2 = 0xff,
-- .gpio3 = 0xff,
-- .maxpwr_bg = 0x004c,
-- .itssi_bg = 0x00,
-- .boardflags_lo = 0x2848,
-- .boardflags_hi = 0x0000,
--};
--
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--{
-- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-- return 0;
-- } else {
-- pr_err("unable to fill SPROM for given bustype\n");
-- return -EINVAL;
-- }
--}
--#endif
--
--/*
-- * return board name for /proc/cpuinfo
-- */
--const char *board_get_name(void)
--{
-- return board.name;
--}
--
--/*
- * early init callback, read nvram data from flash and checksum it
- */
- void __init board_prom_init(void)
-@@ -802,140 +743,15 @@ void __init board_prom_init(void)
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
- continue;
- /* copy, board desc array is marked initdata */
-- memcpy(&board, bcm963xx_boards[i], sizeof(board));
-+ board_early_setup(bcm963xx_boards[i]);
- break;
- }
-
-- /* bail out if board is not found, will complain later */
-- if (!board.name[0]) {
-+ /* warn if board is not found, will complain later */
-+ if (i == ARRAY_SIZE(bcm963xx_boards)) {
- char name[17];
- memcpy(name, board_name, 16);
- name[16] = 0;
- pr_err("unknown bcm963xx board: %s\n", name);
-- return;
-- }
--
-- /* setup pin multiplexing depending on board enabled device,
-- * this has to be done this early since PCI init is done
-- * inside arch_initcall */
-- val = 0;
--
--#ifdef CONFIG_PCI
-- if (board.has_pci) {
-- bcm63xx_pci_enabled = 1;
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G2_PCI;
-- }
--#endif
--
-- if (board.has_pccard) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G1_MII_PCCARD;
-- }
--
-- if (board.has_enet0 && !board.enet0.use_internal_phy) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G3_EXT_MII |
-- GPIO_MODE_6348_G0_EXT_MII;
-- }
--
-- if (board.has_enet1 && !board.enet1.use_internal_phy) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G3_EXT_MII |
-- GPIO_MODE_6348_G0_EXT_MII;
-- }
--
-- bcm_gpio_writel(val, GPIO_MODE_REG);
--}
--
--/*
-- * second stage init callback, good time to panic if we couldn't
-- * identify on which board we're running since early printk is working
-- */
--void __init board_setup(void)
--{
-- if (!board.name[0])
-- panic("unable to detect bcm963xx board");
-- pr_info("board name: %s\n", board.name);
--
-- /* make sure we're running on expected cpu */
-- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-- panic("unexpected CPU for bcm963xx board");
--}
--
--static struct gpio_led_platform_data bcm63xx_led_data;
--
--static struct platform_device bcm63xx_gpio_leds = {
-- .name = "leds-gpio",
-- .id = 0,
-- .dev.platform_data = &bcm63xx_led_data,
--};
--
--/*
-- * third stage init callback, register all board devices.
-- */
--int __init board_register_devices(void)
--{
-- if (board.has_uart0)
-- bcm63xx_uart_register(0);
--
-- if (board.has_uart1)
-- bcm63xx_uart_register(1);
--
-- if (board.has_pccard)
-- bcm63xx_pcmcia_register();
--
-- if (board.has_enet0 &&
-- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-- bcm63xx_enet_register(0, &board.enet0);
--
-- if (board.has_enet1 &&
-- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-- bcm63xx_enet_register(1, &board.enet1);
--
-- if (board.has_enetsw &&
-- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-- bcm63xx_enetsw_register(&board.enetsw);
--
-- if (board.has_usbd)
-- bcm63xx_usbd_register(&board.usbd);
--
-- if (board.has_ehci0)
-- bcm63xx_ehci_register();
--
-- if (board.has_ohci0)
-- bcm63xx_ohci_register();
--
-- if (board.has_dsp)
-- bcm63xx_dsp_register(&board.dsp);
--
-- /* Generate MAC address for WLAN and register our SPROM,
-- * do this after registering enet devices
-- */
--#ifdef CONFIG_SSB_PCIHOST
-- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- if (ssb_arch_register_fallback_sprom(
-- &bcm63xx_get_fallback_sprom) < 0)
-- pr_err("failed to register fallback SPROM\n");
- }
--#endif
--
-- bcm63xx_spi_register();
--
-- bcm63xx_hsspi_register();
--
-- bcm63xx_flash_register();
--
-- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
-- bcm63xx_led_data.leds = board.leds;
--
-- platform_device_register(&bcm63xx_gpio_leds);
--
-- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-- gpio_request_one(board.ephy_reset_gpio,
-- board.ephy_reset_gpio_flags, "ephy-reset");
--
-- return 0;
- }
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -0,0 +1,218 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/ssb/ssb.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_uart.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_nvram.h>
-+#include <bcm63xx_gpio.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_enet.h>
-+#include <bcm63xx_dev_dsp.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <bcm63xx_dev_hsspi.h>
-+#include <bcm63xx_dev_pcmcia.h>
-+#include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+#include <bcm63xx_dev_usb_usbd.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX "board: "
-+
-+static struct board_info board;
-+
-+/*
-+ * Register a sane SPROMv2 to make the on-board
-+ * bcm4318 WLAN work
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+static struct ssb_sprom bcm63xx_sprom = {
-+ .revision = 0x02,
-+ .board_rev = 0x17,
-+ .country_code = 0x0,
-+ .ant_available_bg = 0x3,
-+ .pa0b0 = 0x15ae,
-+ .pa0b1 = 0xfa85,
-+ .pa0b2 = 0xfe8d,
-+ .pa1b0 = 0xffff,
-+ .pa1b1 = 0xffff,
-+ .pa1b2 = 0xffff,
-+ .gpio0 = 0xff,
-+ .gpio1 = 0xff,
-+ .gpio2 = 0xff,
-+ .gpio3 = 0xff,
-+ .maxpwr_bg = 0x004c,
-+ .itssi_bg = 0x00,
-+ .boardflags_lo = 0x2848,
-+ .boardflags_hi = 0x0000,
-+};
-+
-+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->bustype == SSB_BUSTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-+
-+/*
-+ * return board name for /proc/cpuinfo
-+ */
-+const char *board_get_name(void)
-+{
-+ return board.name;
-+}
-+
-+/*
-+ * setup board for device registration
-+ */
-+void __init board_early_setup(const struct board_info *target)
-+{
-+ u32 val;
-+
-+ memcpy(&board, target, sizeof(board));
-+
-+ /* setup pin multiplexing depending on board enabled device,
-+ * this has to be done this early since PCI init is done
-+ * inside arch_initcall */
-+ val = 0;
-+
-+#ifdef CONFIG_PCI
-+ if (board.has_pci) {
-+ bcm63xx_pci_enabled = 1;
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G2_PCI;
-+ }
-+#endif
-+
-+ if (board.has_pccard) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+ }
-+
-+ if (board.has_enet0 && !board.enet0.use_internal_phy) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G3_EXT_MII |
-+ GPIO_MODE_6348_G0_EXT_MII;
-+ }
-+
-+ if (board.has_enet1 && !board.enet1.use_internal_phy) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G3_EXT_MII |
-+ GPIO_MODE_6348_G0_EXT_MII;
-+ }
-+
-+ bcm_gpio_writel(val, GPIO_MODE_REG);
-+}
-+
-+
-+/*
-+ * second stage init callback, good time to panic if we couldn't
-+ * identify on which board we're running since early printk is working
-+ */
-+void __init board_setup(void)
-+{
-+ if (!board.name[0])
-+ panic("unable to detect bcm963xx board");
-+ printk(KERN_INFO PFX "board name: %s\n", board.name);
-+
-+ /* make sure we're running on expected cpu */
-+ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-+ panic("unexpected CPU for bcm963xx board");
-+}
-+
-+static struct gpio_led_platform_data bcm63xx_led_data;
-+
-+static struct platform_device bcm63xx_gpio_leds = {
-+ .name = "leds-gpio",
-+ .id = 0,
-+ .dev.platform_data = &bcm63xx_led_data,
-+};
-+
-+/*
-+ * third stage init callback, register all board devices.
-+ */
-+int __init board_register_devices(void)
-+{
-+ if (board.has_uart0)
-+ bcm63xx_uart_register(0);
-+
-+ if (board.has_uart1)
-+ bcm63xx_uart_register(1);
-+
-+ if (board.has_pccard)
-+ bcm63xx_pcmcia_register();
-+
-+ if (board.has_enet0 &&
-+ !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-+ bcm63xx_enet_register(0, &board.enet0);
-+
-+ if (board.has_enet1 &&
-+ !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-+ bcm63xx_enet_register(1, &board.enet1);
-+
-+ if (board.has_enetsw &&
-+ !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+ bcm63xx_enetsw_register(&board.enetsw);
-+
-+ if (board.has_usbd)
-+ bcm63xx_usbd_register(&board.usbd);
-+
-+ if (board.has_ehci0)
-+ bcm63xx_ehci_register();
-+
-+ if (board.has_ohci0)
-+ bcm63xx_ohci_register();
-+
-+ if (board.has_dsp)
-+ bcm63xx_dsp_register(&board.dsp);
-+
-+ /* Generate MAC address for WLAN and register our SPROM,
-+ * do this after registering enet devices
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+ if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-+ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-+ if (ssb_arch_register_fallback_sprom(
-+ &bcm63xx_get_fallback_sprom) < 0)
-+ pr_err(PFX "failed to register fallback SPROM\n");
-+ }
-+#endif
-+
-+ bcm63xx_spi_register();
-+
-+ bcm63xx_hsspi_register();
-+
-+ bcm63xx_flash_register();
-+
-+ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
-+ bcm63xx_led_data.leds = board.leds;
-+
-+ platform_device_register(&bcm63xx_gpio_leds);
-+
-+ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-+ gpio_request_one(board.ephy_reset_gpio,
-+ board.ephy_reset_gpio_flags, "ephy-reset");
-+
-+ return 0;
-+}
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -0,0 +1,8 @@
-+#ifndef __BOARD_COMMON_H
-+#define __BOARD_COMMON_H
-+
-+#include <board_bcm963xx.h>
-+
-+void board_early_setup(const struct board_info *board);
-+
-+#endif /* __BOARD_COMMON_H */
+++ /dev/null
-From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:08:06 +0100
-Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
- setup
-
-Pass a mac address allocator to board setup code to allow board
-implementations to work with third party bootloaders not using nvram
-for configuration storage.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++-
- arch/mips/bcm63xx/boards/board_common.c | 16 ++++++++++------
- arch/mips/bcm63xx/boards/board_common.h | 3 ++-
- 3 files changed, 14 insertions(+), 8 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -743,7 +743,8 @@ void __init board_prom_init(void)
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
- continue;
- /* copy, board desc array is marked initdata */
-- board_early_setup(bcm963xx_boards[i]);
-+ board_early_setup(bcm963xx_boards[i],
-+ bcm63xx_nvram_get_mac_address);
- break;
- }
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -18,7 +18,6 @@
- #include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
--#include <bcm63xx_nvram.h>
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_dev_pci.h>
- #include <bcm63xx_dev_enet.h>
-@@ -82,15 +81,20 @@ const char *board_get_name(void)
- return board.name;
- }
-
-+static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
-+
- /*
- * setup board for device registration
- */
--void __init board_early_setup(const struct board_info *target)
-+void __init board_early_setup(const struct board_info *target,
-+ int (*get_mac_address)(u8 mac[ETH_ALEN]))
- {
- u32 val;
-
- memcpy(&board, target, sizeof(board));
-
-+ board_get_mac_address = get_mac_address;
-+
- /* setup pin multiplexing depending on board enabled device,
- * this has to be done this early since PCI init is done
- * inside arch_initcall */
-@@ -163,15 +167,15 @@ int __init board_register_devices(void)
- bcm63xx_pcmcia_register();
-
- if (board.has_enet0 &&
-- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-+ !board_get_mac_address(board.enet0.mac_addr))
- bcm63xx_enet_register(0, &board.enet0);
-
- if (board.has_enet1 &&
-- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-+ !board_get_mac_address(board.enet1.mac_addr))
- bcm63xx_enet_register(1, &board.enet1);
-
- if (board.has_enetsw &&
-- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+ !board_get_mac_address(board.enetsw.mac_addr))
- bcm63xx_enetsw_register(&board.enetsw);
-
- if (board.has_usbd)
-@@ -190,7 +194,7 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
- #ifdef CONFIG_SSB_PCIHOST
-- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-+ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
- if (ssb_arch_register_fallback_sprom(
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -3,6 +3,7 @@
-
- #include <board_bcm963xx.h>
-
--void board_early_setup(const struct board_info *board);
-+void board_early_setup(const struct board_info *board,
-+ int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -723,10 +723,20 @@ void __init board_prom_init(void)
-
- /* dump cfe version */
- cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
-- if (!memcmp(cfe, "cfe-v", 5))
-- snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
-- cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
-- else
-+ if (strstarts(cfe, "cfe-")) {
-+ if(cfe[4] == 'v') {
-+ if(cfe[5] == 'd')
-+ snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
-+ else if (cfe[10] > 0)
-+ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
-+ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
-+ else
-+ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
-+ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
-+ } else {
-+ snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
-+ }
-+ } else
- strcpy(cfe_version, "unknown");
- pr_info("CFE version: %s\n", cfe_version);
-
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
-@@ -1,6 +1,8 @@
- #ifndef BCM63XX_BOARD_H_
- #define BCM63XX_BOARD_H_
-
-+#include <asm/bootinfo.h>
-+
- const char *board_get_name(void);
-
- void board_prom_init(void);
-@@ -9,4 +11,8 @@ void board_setup(void);
-
- int board_register_devices(void);
-
-+static inline bool bcm63xx_is_cfe_present(void) {
-+ return fw_arg3 == 0x43464531;
-+}
-+
- #endif /* ! BCM63XX_BOARD_H_ */
+++ /dev/null
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -35,7 +35,7 @@
-
- #include <asm/mach-bcm63xx/bcm63xx_nvram.h>
- #include <asm/mach-bcm63xx/bcm963xx_tag.h>
--#include <asm/mach-bcm63xx/board_bcm963xx.h>
-+#include <asm/mach-bcm63xx/bcm63xx_board.h>
-
- #define BCM63XX_EXTENDED_SIZE 0xBFC00000 /* Extended flash address */
-
-@@ -43,30 +43,6 @@
-
- #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
-
--static int bcm63xx_detect_cfe(struct mtd_info *master)
--{
-- char buf[9];
-- int ret;
-- size_t retlen;
--
-- ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
-- (void *)buf);
-- buf[retlen] = 0;
--
-- if (ret)
-- return ret;
--
-- if (strncmp("cfe-v", buf, 5) == 0)
-- return 0;
--
-- /* very old CFE's do not have the cfe-v string, so check for magic */
-- ret = mtd_read(master, BCM63XX_CFE_MAGIC_OFFSET, 8, &retlen,
-- (void *)buf);
-- buf[retlen] = 0;
--
-- return strncmp("CFE1CFE1", buf, 8);
--}
--
- static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
- struct mtd_partition **pparts,
- struct mtd_part_parser_data *data)
-@@ -85,7 +61,7 @@ static int bcm63xx_parse_cfe_partitions(
- u32 computed_crc;
- bool rootfs_first = false;
-
-- if (bcm63xx_detect_cfe(master))
-+ if (!bcm63xx_is_cfe_present())
- return -EINVAL;
-
- cfe_erasesize = max_t(uint32_t, master->erasesize,
+++ /dev/null
-From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:53:12 +0100
-Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq
- controller
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- .../brcm,bcm6345-periph-intc.txt | 50 +++
- drivers/irqchip/Kconfig | 4 +
- drivers/irqchip/Makefile | 1 +
- drivers/irqchip/irq-bcm6345-periph.c | 339 ++++++++++++++++++++
- include/linux/irqchip/irq-bcm6345-periph.h | 16 +
- 5 files changed, 410 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
- create mode 100644 drivers/irqchip/irq-bcm6345-periph.c
- create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
-@@ -0,0 +1,50 @@
-+Broadcom BCM6345 Level 1 periphery interrupt controller
-+
-+This block is a interrupt controller that is typically connected directly
-+to one of the HW INT lines on each CPU. Every BCM63XX xDSL chip since
-+BCM6345 has contained this hardware.
-+
-+Key elements of the hardware design include:
-+
-+- 32, 64, or 128 incoming level IRQ lines
-+
-+- All onchip peripherals are wired directly to an L2 input
-+
-+- A separate instance of the register set for each CPU, allowing individual
-+ peripheral IRQs to be routed to any CPU
-+
-+- No atomic mask/unmask operations
-+
-+- No polarity/level/edge settings
-+
-+- No FIFO or priority encoder logic; software is expected to read all
-+ 1-4 status words to determine which IRQs are pending
-+
-+Required properties:
-+
-+- compatible: Should be "brcm,bcm6345-periph-intc".
-+- reg: Specifies the base physical address and size of the registers.
-+ Multiple register addresses may be specified, and must match the amount of
-+ parent interrupts.
-+- interrupt-controller: Identifies the node as an interrupt controller.
-+- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
-+ source, should be 1.
-+- interrupt-parent: Specifies the phandle to the parent interrupt controller
-+ this one is cascaded from.
-+- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
-+ node, valid values depend on the type of parent interrupt controller.
-+ Multiple lines are used to route interrupts to different cpus, with the first
-+ assumed to be for the boot CPU.
-+
-+Example:
-+
-+periph_intc: interrupt-controller@f0406800 {
-+ compatible = "brcm,bcm6345-periph-intc";
-+ reg = <0x10000020 0x10>, <0x10000030 0x10>;
-+
-+ interrupt-controller;
-+ #interrupt-cells = <1>;
-+
-+ interrupt-parent = <&cpu_intc>;
-+ interrupts = <2>, <3>;
-+};
---- a/drivers/irqchip/Kconfig
-+++ b/drivers/irqchip/Kconfig
-@@ -80,6 +80,10 @@ config BRCMSTB_L2_IRQ
- select GENERIC_IRQ_CHIP
- select IRQ_DOMAIN
-
-+config BCM6345_PERIPH_IRQ
-+ bool
-+ select IRQ_DOMAIN
-+
- config DW_APB_ICTL
- bool
- select GENERIC_IRQ_CHIP
---- a/drivers/irqchip/Makefile
-+++ b/drivers/irqchip/Makefile
-@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_MVEBU) += irq-armada-
- obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
- obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
- obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
-+obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
- obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
- obj-$(CONFIG_METAG) += irq-metag-ext.o
- obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o
---- /dev/null
-+++ b/drivers/irqchip/irq-bcm6345-periph.c
-@@ -0,0 +1,339 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#include <linux/ioport.h>
-+#include <linux/irq.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/chained_irq.h>
-+#include <linux/irqchip/irq-bcm6345-periph.h>
-+#include <linux/kernel.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#ifdef CONFIG_BCM63XX
-+#include <asm/mach-bcm63xx/bcm63xx_irq.h>
-+
-+#define VIRQ_BASE IRQ_INTERNAL_BASE
-+#else
-+#define VIRQ_BASE 0
-+#endif
-+
-+#define MAX_WORDS 4
-+#define MAX_PARENT_IRQS 2
-+#define IRQS_PER_WORD 32
-+
-+struct intc_block {
-+ int parent_irq;
-+ void __iomem *base;
-+ void __iomem *en_reg[MAX_WORDS];
-+ void __iomem *status_reg[MAX_WORDS];
-+ u32 mask_cache[MAX_WORDS];
-+};
-+
-+struct intc_data {
-+ struct irq_chip chip;
-+ struct intc_block block[MAX_PARENT_IRQS];
-+
-+ int num_words;
-+
-+ struct irq_domain *domain;
-+ raw_spinlock_t lock;
-+};
-+
-+static void bcm6345_periph_irq_handle(struct irq_desc *desc)
-+{
-+ struct intc_data *data = irq_desc_get_handler_data(desc);
-+ struct irq_chip *chip = irq_desc_get_chip(desc);
-+ struct intc_block *block;
-+ unsigned int irq = irq_desc_get_irq(desc);
-+ unsigned int idx;
-+
-+ chained_irq_enter(chip, desc);
-+
-+ for (idx = 0; idx < MAX_PARENT_IRQS; idx++)
-+ if (irq == data->block[idx].parent_irq)
-+ block = &data->block[idx];
-+
-+ for (idx = 0; idx < data->num_words; idx++) {
-+ int base = idx * IRQS_PER_WORD;
-+ unsigned long pending;
-+ int hw_irq;
-+
-+ raw_spin_lock(&data->lock);
-+ pending = __raw_readl(block->en_reg[idx]) &
-+ __raw_readl(block->status_reg[idx]);
-+ raw_spin_unlock(&data->lock);
-+
-+ for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) {
-+ int virq;
-+
-+ virq = irq_find_mapping(data->domain, base + hw_irq);
-+ generic_handle_irq(virq);
-+ }
-+ }
-+
-+ chained_irq_exit(chip, desc);
-+}
-+
-+static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit,
-+ bool enable)
-+{
-+ u32 val;
-+
-+ val = __raw_readl(block->en_reg[reg]);
-+ if (enable)
-+ val |= BIT(bit);
-+ else
-+ val &= ~BIT(bit);
-+ __raw_writel(val, block->en_reg[reg]);
-+}
-+
-+static void bcm6345_periph_irq_mask(struct irq_data *data)
-+{
-+ unsigned int i, reg, bit;
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ raw_spin_lock(&priv->lock);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_periph_irq_unmask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ unsigned int i, reg, bit;
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ raw_spin_lock(&priv->lock);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ if (block->mask_cache[reg] & BIT(bit))
-+ __bcm6345_periph_enable(block, reg, bit, true);
-+ else
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+#ifdef CONFIG_SMP
-+static int bcm6345_periph_set_affinity(struct irq_data *data,
-+ const struct cpumask *mask, bool force)
-+{
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ struct intc_data *priv = data->domain->host_data;
-+ unsigned int i, reg, bit;
-+ unsigned long flags;
-+ bool enabled;
-+ int cpu;
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ /* we could route to more than one cpu, but performance
-+ suffers, so fix it to one.
-+ */
-+ cpu = cpumask_any_and(mask, cpu_online_mask);
-+ if (cpu >= nr_cpu_ids)
-+ return -EINVAL;
-+
-+ if (cpu >= MAX_PARENT_IRQS)
-+ return -EINVAL;
-+
-+ if (!priv->block[cpu].parent_irq)
-+ return -EINVAL;
-+
-+ raw_spin_lock_irqsave(&priv->lock, flags);
-+ enabled = !irqd_irq_masked(data);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ if (i == cpu) {
-+ block->mask_cache[reg] |= BIT(bit);
-+ __bcm6345_periph_enable(block, reg, bit, enabled);
-+ } else {
-+ block->mask_cache[reg] &= ~BIT(bit);
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ }
-+ raw_spin_unlock_irqrestore(&priv->lock, flags);
-+
-+ return 0;
-+}
-+#endif
-+
-+static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq,
-+ irq_hw_number_t hw)
-+{
-+ struct intc_data *priv = d->host_data;
-+
-+ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
-+
-+ return 0;
-+}
-+
-+static const struct irq_domain_ops bcm6345_periph_domain_ops = {
-+ .xlate = irq_domain_xlate_onecell,
-+ .map = bcm6345_periph_map,
-+};
-+
-+static int __init __bcm6345_periph_intc_init(struct device_node *node,
-+ int num_blocks, int *irq,
-+ void __iomem **base, int num_words)
-+{
-+ struct intc_data *data;
-+ unsigned int i, w, status_offset;
-+
-+ data = kzalloc(sizeof(*data), GFP_KERNEL);
-+ if (!data)
-+ return -ENOMEM;
-+
-+ raw_spin_lock_init(&data->lock);
-+
-+ status_offset = num_words * sizeof(u32);
-+
-+ for (i = 0; i < num_blocks; i++) {
-+ struct intc_block *block = &data->block[i];
-+
-+ block->parent_irq = irq[i];
-+ block->base = base[i];
-+
-+ for (w = 0; w < num_words; w++) {
-+ int word_offset = sizeof(u32) * ((num_words - w) - 1);
-+
-+ block->en_reg[w] = base[i] + word_offset;
-+ block->status_reg[w] = base[i] + status_offset;
-+ block->status_reg[w] += word_offset;
-+
-+ /* route all interrupts to line 0 by default */
-+ if (i == 0)
-+ block->mask_cache[w] = 0xffffffff;
-+ }
-+
-+ irq_set_handler_data(block->parent_irq, data);
-+ irq_set_chained_handler(block->parent_irq,
-+ bcm6345_periph_irq_handle);
-+ }
-+
-+ data->num_words = num_words;
-+
-+ data->chip.name = "bcm6345-periph-intc";
-+ data->chip.irq_mask = bcm6345_periph_irq_mask;
-+ data->chip.irq_unmask = bcm6345_periph_irq_unmask;
-+
-+#ifdef CONFIG_SMP
-+ if (num_blocks > 1)
-+ data->chip.irq_set_affinity = bcm6345_periph_set_affinity;
-+#endif
-+
-+ data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words,
-+ VIRQ_BASE,
-+ &bcm6345_periph_domain_ops, data);
-+ if (!data->domain) {
-+ kfree(data);
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
-+void __init bcm6345_periph_intc_init(int num_blocks, int *irq,
-+ void __iomem **base, int num_words)
-+{
-+ __bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words);
-+}
-+
-+#ifdef CONFIG_OF
-+static int __init bcm6345_periph_of_init(struct device_node *node,
-+ struct device_node *parent)
-+{
-+ struct resource res;
-+ int num_irqs, ret = -EINVAL;
-+ int irqs[MAX_PARENT_IRQS] = { 0 };
-+ void __iomem *bases[MAX_PARENT_IRQS] = { NULL };
-+ int words = 0;
-+ int i;
-+
-+ num_irqs = of_irq_count(node);
-+
-+ if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS)
-+ return -EINVAL;
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ resource_size_t size;
-+
-+ irqs[i] = irq_of_parse_and_map(node, i);
-+ if (!irqs[i])
-+ goto out_unmap;
-+
-+ if (of_address_to_resource(node, i, &res))
-+ goto out_unmap;
-+
-+ size = resource_size(&res);
-+ switch (size) {
-+ case 8:
-+ case 16:
-+ case 32:
-+ size = size / 8;
-+ break;
-+ default:
-+ goto out_unmap;
-+ }
-+
-+ if (words && words != size) {
-+ ret = -EINVAL;
-+ goto out_unmap;
-+ }
-+ words = size;
-+
-+ bases[i] = of_iomap(node, i);
-+ if (!bases[i]) {
-+ ret = -ENOMEM;
-+ goto out_unmap;
-+ }
-+ }
-+
-+ ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words);
-+ if (!ret)
-+ return 0;
-+
-+out_unmap:
-+ for (i = 0; i < num_irqs; i++) {
-+ iounmap(bases[i]);
-+ irq_dispose_mapping(irqs[i]);
-+ }
-+
-+ return ret;
-+}
-+
-+IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-l1-intc",
-+ bcm6345_periph_of_init);
-+#endif
---- /dev/null
-+++ b/include/linux/irqchip/irq-bcm6345-periph.h
-@@ -0,0 +1,16 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
-+ */
-+
-+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
-+#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
-+
-+void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base,
-+ int num_words);
-+
-+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */
+++ /dev/null
-From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:54:27 +0100
-Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
- interrupt controller
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- .../interrupt-controller/brcm,bcm6345-ext-intc.txt | 29 ++
- drivers/irqchip/Kconfig | 4 +
- drivers/irqchip/Makefile | 1 +
- drivers/irqchip/irq-bcm6345-ext.c | 287 ++++++++++++++++++++
- include/linux/irqchip/irq-bcm6345-ext.h | 14 +
- 5 files changed, 335 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
- create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
- create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
-@@ -0,0 +1,29 @@
-+Broadcom BCM6345-style external interrupt controller
-+
-+Required properties:
-+
-+- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc".
-+- reg: Specifies the base physical addresses and size of the registers.
-+- interrupt-controller: identifies the node as an interrupt controller.
-+- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
-+ source, Should be 2.
-+- interrupt-parent: Specifies the phandle to the parent interrupt controller
-+ this one is cascaded from.
-+- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
-+ node, valid values depend on the type of parent interrupt controller.
-+
-+Optional properties:
-+
-+- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the
-+ register. Defaults to 4.
-+
-+Example:
-+
-+ext_intc: interrupt-controller@10000018 {
-+ compatible = "brcm,bcm6345-ext-intc";
-+ interrupt-parent = <&periph_intc>;
-+ #interrupt-cells = <2>;
-+ reg = <0x10000018 0x4>;
-+ interrupt-controller;
-+ interrupts = <24>, <25>, <26>, <27>;
-+};
---- a/drivers/irqchip/Kconfig
-+++ b/drivers/irqchip/Kconfig
-@@ -80,6 +80,10 @@ config BRCMSTB_L2_IRQ
- select GENERIC_IRQ_CHIP
- select IRQ_DOMAIN
-
-+config BCM6345_EXT_IRQ
-+ bool
-+ select IRQ_DOMAIN
-+
- config BCM6345_PERIPH_IRQ
- bool
- select IRQ_DOMAIN
---- a/drivers/irqchip/Makefile
-+++ b/drivers/irqchip/Makefile
-@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_MVEBU) += irq-armada-
- obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
- obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
- obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
-+obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o
- obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
- obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
- obj-$(CONFIG_METAG) += irq-metag-ext.o
---- /dev/null
-+++ b/drivers/irqchip/irq-bcm6345-ext.c
-@@ -0,0 +1,301 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#include <linux/ioport.h>
-+#include <linux/irq.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/chained_irq.h>
-+#include <linux/irqchip/irq-bcm6345-ext.h>
-+#include <linux/kernel.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#ifdef CONFIG_BCM63XX
-+#include <asm/mach-bcm63xx/bcm63xx_irq.h>
-+
-+#define VIRQ_BASE IRQ_EXTERNAL_BASE
-+#else
-+#define VIRQ_BASE 0
-+#endif
-+
-+#define MAX_IRQS 4
-+
-+#define EXTIRQ_CFG_SENSE 0
-+#define EXTIRQ_CFG_STAT 1
-+#define EXTIRQ_CFG_CLEAR 2
-+#define EXTIRQ_CFG_MASK 3
-+#define EXTIRQ_CFG_BOTHEDGE 4
-+#define EXTIRQ_CFG_LEVELSENSE 5
-+
-+struct intc_data {
-+ struct irq_chip chip;
-+ struct irq_domain *domain;
-+ raw_spinlock_t lock;
-+
-+ int parent_irq[MAX_IRQS];
-+ void __iomem *reg;
-+ int shift;
-+ unsigned int toggle_clear_on_ack:1;
-+};
-+
-+static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
-+{
-+ struct intc_data *data = irq_desc_get_handler_data(desc);
-+ struct irq_chip *chip = irq_desc_get_chip(desc);
-+ unsigned int irq = irq_desc_get_irq(desc);
-+ unsigned int idx;
-+
-+ chained_irq_enter(chip, desc);
-+
-+ for (idx = 0; idx < MAX_IRQS; idx++) {
-+ if (data->parent_irq[idx] != irq)
-+ continue;
-+
-+ generic_handle_irq(irq_find_mapping(data->domain, idx));
-+ }
-+
-+ chained_irq_exit(chip, desc);
-+}
-+
-+static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
-+ priv->reg);
-+ if (priv->toggle_clear_on_ack)
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static int bcm6345_ext_intc_set_type(struct irq_data *data,
-+ unsigned int flow_type)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ bool levelsense = 0, sense = 0, bothedge = 0;
-+ u32 reg;
-+
-+ flow_type &= IRQ_TYPE_SENSE_MASK;
-+
-+ if (flow_type == IRQ_TYPE_NONE)
-+ flow_type = IRQ_TYPE_LEVEL_LOW;
-+
-+ switch (flow_type) {
-+ case IRQ_TYPE_EDGE_BOTH:
-+ bothedge = 1;
-+ break;
-+
-+ case IRQ_TYPE_EDGE_RISING:
-+ sense = 1;
-+ break;
-+
-+ case IRQ_TYPE_EDGE_FALLING:
-+ break;
-+
-+ case IRQ_TYPE_LEVEL_HIGH:
-+ levelsense = 1;
-+ sense = 1;
-+ break;
-+
-+ case IRQ_TYPE_LEVEL_LOW:
-+ levelsense = 1;
-+ break;
-+
-+ default:
-+ pr_err("bogus flow type combination given!\n");
-+ return -EINVAL;
-+ }
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+
-+ if (levelsense)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
-+ if (sense)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
-+ if (bothedge)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));
-+
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+
-+ irqd_set_trigger_type(data, flow_type);
-+ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-+ irq_set_handler_locked(data, handle_level_irq);
-+ else
-+ irq_set_handler_locked(data, handle_edge_irq);
-+
-+ return 0;
-+}
-+
-+static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
-+ irq_hw_number_t hw)
-+{
-+ struct intc_data *priv = d->host_data;
-+
-+ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
-+
-+ return 0;
-+}
-+
-+static const struct irq_domain_ops bcm6345_ext_domain_ops = {
-+ .xlate = irq_domain_xlate_twocell,
-+ .map = bcm6345_ext_intc_map,
-+};
-+
-+static int __init __bcm6345_ext_intc_init(struct device_node *node,
-+ int num_irqs, int *irqs,
-+ void __iomem *reg, int shift,
-+ bool toggle_clear_on_ack)
-+{
-+ struct intc_data *data;
-+ unsigned int i;
-+ int start = VIRQ_BASE;
-+
-+ data = kzalloc(sizeof(*data), GFP_KERNEL);
-+ if (!data)
-+ return -ENOMEM;
-+
-+ raw_spin_lock_init(&data->lock);
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ data->parent_irq[i] = irqs[i];
-+
-+ irq_set_handler_data(irqs[i], data);
-+ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
-+ }
-+
-+ data->reg = reg;
-+ data->shift = shift;
-+ data->toggle_clear_on_ack = toggle_clear_on_ack;
-+
-+ data->chip.name = "bcm6345-ext-intc";
-+ data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
-+ data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
-+ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
-+ data->chip.irq_set_type = bcm6345_ext_intc_set_type;
-+
-+ /*
-+ * If we have less than 4 irqs, this is the second controller on
-+ * bcm63xx. So increase the VIRQ start to not overlap with the first
-+ * one, but only do so if we actually use a non-zero start.
-+ *
-+ * This can be removed when bcm63xx has no legacy users anymore.
-+ */
-+ if (start && num_irqs < 4)
-+ start += 4;
-+
-+ data->domain = irq_domain_add_simple(node, num_irqs, start,
-+ &bcm6345_ext_domain_ops, data);
-+ if (!data->domain) {
-+ kfree(data);
-+ return -ENOMEM;
-+ }
-+
-+ return 0;
-+}
-+
-+void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg,
-+ int shift)
-+{
-+ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false);
-+}
-+
-+#ifdef CONFIG_OF
-+static int __init bcm6345_ext_intc_of_init(struct device_node *node,
-+ struct device_node *parent)
-+{
-+ int num_irqs, ret = -EINVAL;
-+ unsigned i;
-+ void __iomem *base;
-+ int irqs[MAX_IRQS] = { 0 };
-+ u32 shift;
-+ bool toggle_clear_on_ack = false;
-+
-+ num_irqs = of_irq_count(node);
-+
-+ if (!num_irqs || num_irqs > MAX_IRQS)
-+ return -EINVAL;
-+
-+ if (of_property_read_u32(node, "brcm,field-width", &shift))
-+ shift = 4;
-+
-+ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */
-+ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
-+ toggle_clear_on_ack = true;
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ irqs[i] = irq_of_parse_and_map(node, i);
-+ if (!irqs[i]) {
-+ ret = -ENOMEM;
-+ goto out_unmap;
-+ }
-+ }
-+
-+ base = of_iomap(node, 0);
-+ if (!base)
-+ goto out_unmap;
-+
-+ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
-+ toggle_clear_on_ack);
-+ if (!ret)
-+ return 0;
-+out_unmap:
-+ iounmap(base);
-+
-+ for (i = 0; i < num_irqs; i++)
-+ irq_dispose_mapping(irqs[i]);
-+
-+ return ret;
-+}
-+
-+IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
-+ bcm6345_ext_intc_of_init);
-+IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
-+ bcm6345_ext_intc_of_init);
-+#endif
---- /dev/null
-+++ b/include/linux/irqchip/irq-bcm6345-ext.h
-@@ -0,0 +1,14 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
-+#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
-+
-+void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift);
-+
-+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */
+++ /dev/null
-From d2d2489e0a4b740abd980e9d1cad952d15bc2d9e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:55:02 +0100
-Subject: [PATCH] MIPS: BCM63XX: switch to IRQ_DOMAIN
-
-Now that we have working IRQ_DOMAIN drivers for both interrupt controllers,
-switch to using them.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/Kconfig | 3 +
- arch/mips/bcm63xx/irq.c | 612 +++++++++---------------------------------------
- 2 files changed, 108 insertions(+), 507 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -207,6 +207,9 @@ config BCM63XX
- select SYNC_R4K
- select DMA_NONCOHERENT
- select IRQ_MIPS_CPU
-+ select BCM6345_EXT_IRQ
-+ select BCM6345_PERIPH_IRQ
-+ select IRQ_DOMAIN
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_HAS_EARLY_PRINTK
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -12,7 +12,9 @@
- #include <linux/interrupt.h>
- #include <linux/module.h>
- #include <linux/irq.h>
--#include <linux/spinlock.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/irq-bcm6345-ext.h>
-+#include <linux/irqchip/irq-bcm6345-periph.h>
- #include <asm/irq_cpu.h>
- #include <asm/mipsregs.h>
- #include <bcm63xx_cpu.h>
-@@ -20,544 +22,140 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
-
--
--static DEFINE_SPINLOCK(ipic_lock);
--static DEFINE_SPINLOCK(epic_lock);
--
--static u32 irq_stat_addr[2];
--static u32 irq_mask_addr[2];
--static void (*dispatch_internal)(int cpu);
--static int is_ext_irq_cascaded;
--static unsigned int ext_irq_count;
--static unsigned int ext_irq_start, ext_irq_end;
--static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
--static void (*internal_irq_mask)(struct irq_data *d);
--static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
--
--
--static inline u32 get_ext_irq_perf_reg(int irq)
--{
-- if (irq < 4)
-- return ext_irq_cfg_reg1;
-- return ext_irq_cfg_reg2;
--}
--
--static inline void handle_internal(int intbit)
--{
-- if (is_ext_irq_cascaded &&
-- intbit >= ext_irq_start && intbit <= ext_irq_end)
-- do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE);
-- else
-- do_IRQ(intbit + IRQ_INTERNAL_BASE);
--}
--
--static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
-- const struct cpumask *m)
--{
-- bool enable = cpu_online(cpu);
--
--#ifdef CONFIG_SMP
-- if (m)
-- enable &= cpumask_test_cpu(cpu, m);
-- else if (irqd_affinity_was_set(d))
-- enable &= cpumask_test_cpu(cpu, irq_data_get_affinity_mask(d));
--#endif
-- return enable;
--}
--
--/*
-- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
-- * prioritize any interrupt relatively to another. the static counter
-- * will resume the loop where it ended the last time we left this
-- * function.
-- */
--
--#define BUILD_IPIC_INTERNAL(width) \
--void __dispatch_internal_##width(int cpu) \
--{ \
-- u32 pending[width / 32]; \
-- unsigned int src, tgt; \
-- bool irqs_pending = false; \
-- static unsigned int i[2]; \
-- unsigned int *next = &i[cpu]; \
-- unsigned long flags; \
-- \
-- /* read registers in reverse order */ \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
-- u32 val; \
-- \
-- val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
-- val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
-- pending[--tgt] = val; \
-- \
-- if (val) \
-- irqs_pending = true; \
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
-- \
-- if (!irqs_pending) \
-- return; \
-- \
-- while (1) { \
-- unsigned int to_call = *next; \
-- \
-- *next = (*next + 1) & (width - 1); \
-- if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
-- handle_internal(to_call); \
-- break; \
-- } \
-- } \
--} \
-- \
--static void __internal_irq_mask_##width(struct irq_data *d) \
--{ \
-- u32 val; \
-- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
-- unsigned reg = (irq / 32) ^ (width/32 - 1); \
-- unsigned bit = irq & 0x1f; \
-- unsigned long flags; \
-- int cpu; \
-- \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for_each_present_cpu(cpu) { \
-- if (!irq_mask_addr[cpu]) \
-- break; \
-- \
-- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
-- val &= ~(1 << bit); \
-- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
--} \
-- \
--static void __internal_irq_unmask_##width(struct irq_data *d, \
-- const struct cpumask *m) \
--{ \
-- u32 val; \
-- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
-- unsigned reg = (irq / 32) ^ (width/32 - 1); \
-- unsigned bit = irq & 0x1f; \
-- unsigned long flags; \
-- int cpu; \
-- \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for_each_present_cpu(cpu) { \
-- if (!irq_mask_addr[cpu]) \
-- break; \
-- \
-- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
-- if (enable_irq_for_cpu(cpu, d, m)) \
-- val |= (1 << bit); \
-- else \
-- val &= ~(1 << bit); \
-- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
--}
--
--BUILD_IPIC_INTERNAL(32);
--BUILD_IPIC_INTERNAL(64);
--
--asmlinkage void plat_irq_dispatch(void)
--{
-- u32 cause;
--
-- do {
-- cause = read_c0_cause() & read_c0_status() & ST0_IM;
--
-- if (!cause)
-- break;
--
-- if (cause & CAUSEF_IP7)
-- do_IRQ(7);
-- if (cause & CAUSEF_IP0)
-- do_IRQ(0);
-- if (cause & CAUSEF_IP1)
-- do_IRQ(1);
-- if (cause & CAUSEF_IP2)
-- dispatch_internal(0);
-- if (is_ext_irq_cascaded) {
-- if (cause & CAUSEF_IP3)
-- dispatch_internal(1);
-- } else {
-- if (cause & CAUSEF_IP3)
-- do_IRQ(IRQ_EXT_0);
-- if (cause & CAUSEF_IP4)
-- do_IRQ(IRQ_EXT_1);
-- if (cause & CAUSEF_IP5)
-- do_IRQ(IRQ_EXT_2);
-- if (cause & CAUSEF_IP6)
-- do_IRQ(IRQ_EXT_3);
-- }
-- } while (1);
--}
--
--/*
-- * internal IRQs operations: only mask/unmask on PERF irq mask
-- * register.
-- */
--static void bcm63xx_internal_irq_mask(struct irq_data *d)
--{
-- internal_irq_mask(d);
--}
--
--static void bcm63xx_internal_irq_unmask(struct irq_data *d)
--{
-- internal_irq_unmask(d, NULL);
--}
--
--/*
-- * external IRQs operations: mask/unmask and clear on PERF external
-- * irq control register.
-- */
--static void bcm63xx_external_irq_mask(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4);
-- else
-- reg &= ~EXTIRQ_CFG_MASK(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- if (is_ext_irq_cascaded)
-- internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
--}
--
--static void bcm63xx_external_irq_unmask(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg |= EXTIRQ_CFG_MASK_6348(irq % 4);
-- else
-- reg |= EXTIRQ_CFG_MASK(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- if (is_ext_irq_cascaded)
-- internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
-- NULL);
--}
--
--static void bcm63xx_external_irq_clear(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4);
-- else
-- reg |= EXTIRQ_CFG_CLEAR(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--}
--
--static int bcm63xx_external_irq_set_type(struct irq_data *d,
-- unsigned int flow_type)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- int levelsense, sense, bothedge;
-- unsigned long flags;
--
-- flow_type &= IRQ_TYPE_SENSE_MASK;
--
-- if (flow_type == IRQ_TYPE_NONE)
-- flow_type = IRQ_TYPE_LEVEL_LOW;
--
-- levelsense = sense = bothedge = 0;
-- switch (flow_type) {
-- case IRQ_TYPE_EDGE_BOTH:
-- bothedge = 1;
-- break;
--
-- case IRQ_TYPE_EDGE_RISING:
-- sense = 1;
-- break;
--
-- case IRQ_TYPE_EDGE_FALLING:
-- break;
--
-- case IRQ_TYPE_LEVEL_HIGH:
-- levelsense = 1;
-- sense = 1;
-- break;
--
-- case IRQ_TYPE_LEVEL_LOW:
-- levelsense = 1;
-- break;
--
-- default:
-- pr_err("bogus flow type combination given !\n");
-- return -EINVAL;
-- }
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
-- irq %= 4;
--
-- switch (bcm63xx_get_cpu_id()) {
-- case BCM6348_CPU_ID:
-- if (levelsense)
-- reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq);
-- if (sense)
-- reg |= EXTIRQ_CFG_SENSE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_SENSE_6348(irq);
-- if (bothedge)
-- reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
-- break;
--
-- case BCM3368_CPU_ID:
-- case BCM6328_CPU_ID:
-- case BCM6338_CPU_ID:
-- case BCM6345_CPU_ID:
-- case BCM6358_CPU_ID:
-- case BCM6362_CPU_ID:
-- case BCM6368_CPU_ID:
-- if (levelsense)
-- reg |= EXTIRQ_CFG_LEVELSENSE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
-- if (sense)
-- reg |= EXTIRQ_CFG_SENSE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_SENSE(irq);
-- if (bothedge)
-- reg |= EXTIRQ_CFG_BOTHEDGE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
-- break;
-- default:
-- BUG();
-- }
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- irqd_set_trigger_type(d, flow_type);
-- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-- irq_set_handler_locked(d, handle_level_irq);
-- else
-- irq_set_handler_locked(d, handle_edge_irq);
--
-- return IRQ_SET_MASK_OK_NOCOPY;
--}
--
--#ifdef CONFIG_SMP
--static int bcm63xx_internal_set_affinity(struct irq_data *data,
-- const struct cpumask *dest,
-- bool force)
--{
-- if (!irqd_irq_disabled(data))
-- internal_irq_unmask(data, dest);
--
-- return 0;
--}
--#endif
--
--static struct irq_chip bcm63xx_internal_irq_chip = {
-- .name = "bcm63xx_ipic",
-- .irq_mask = bcm63xx_internal_irq_mask,
-- .irq_unmask = bcm63xx_internal_irq_unmask,
--};
--
--static struct irq_chip bcm63xx_external_irq_chip = {
-- .name = "bcm63xx_epic",
-- .irq_ack = bcm63xx_external_irq_clear,
--
-- .irq_mask = bcm63xx_external_irq_mask,
-- .irq_unmask = bcm63xx_external_irq_unmask,
--
-- .irq_set_type = bcm63xx_external_irq_set_type,
--};
--
--static struct irqaction cpu_ip2_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_ip2",
-- .flags = IRQF_NO_THREAD,
--};
--
--#ifdef CONFIG_SMP
--static struct irqaction cpu_ip3_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_ip3",
-- .flags = IRQF_NO_THREAD,
--};
--#endif
--
--static struct irqaction cpu_ext_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_extirq",
-- .flags = IRQF_NO_THREAD,
--};
--
--static void bcm63xx_init_irq(void)
-+void __init arch_init_irq(void)
- {
-- int irq_bits;
--
-- irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
-- irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
-- irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
-- irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
-+ void __iomem *periph_bases[2];
-+ void __iomem *ext_intc_bases[2];
-+ int periph_irq_count, periph_width, ext_irq_count, ext_shift;
-+ int periph_irqs[2] = { 2, 3 };
-+ int ext_irqs[6];
-+
-+ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-
- switch (bcm63xx_get_cpu_id()) {
- case BCM3368_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
-+ periph_bases[0] += PERF_IRQMASK_3368_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_3368_EXT_IRQ0;
-+ ext_irqs[1] = BCM_3368_EXT_IRQ1;
-+ ext_irqs[2] = BCM_3368_EXT_IRQ2;
-+ ext_irqs[3] = BCM_3368_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6328_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
-- irq_bits = 64;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
-+ periph_bases[0] += PERF_IRQMASK_6328_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6328_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6328_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6328_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6328_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6328_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6338_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
-+ periph_bases[0] += PERF_IRQMASK_6338_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 4;
- break;
- case BCM6345_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
-+ periph_bases[0] += PERF_IRQMASK_6345_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 4;
- break;
- case BCM6348_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
-+ periph_bases[0] += PERF_IRQMASK_6348_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 5;
- break;
- case BCM6358_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
-- irq_bits = 32;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
-+ periph_bases[0] += PERF_IRQMASK_6358_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6358_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6358_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6358_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6358_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6358_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6362_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
-- irq_bits = 64;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
-+ periph_bases[0] += PERF_IRQMASK_6362_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6362_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6362_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6362_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6362_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6362_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6368_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
-- irq_bits = 64;
-+ periph_bases[0] += PERF_IRQMASK_6368_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6368_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368;
-+ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368;
- ext_irq_count = 6;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
-- ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
-+ ext_irqs[0] = BCM_6368_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6368_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6368_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6368_EXT_IRQ3;
-+ ext_irqs[4] = BCM_6368_EXT_IRQ4;
-+ ext_irqs[5] = BCM_6368_EXT_IRQ5;
-+ ext_shift = 4;
- break;
- default:
- BUG();
- }
-
-- if (irq_bits == 32) {
-- dispatch_internal = __dispatch_internal_32;
-- internal_irq_mask = __internal_irq_mask_32;
-- internal_irq_unmask = __internal_irq_unmask_32;
-- } else {
-- dispatch_internal = __dispatch_internal_64;
-- internal_irq_mask = __internal_irq_mask_64;
-- internal_irq_unmask = __internal_irq_unmask_64;
-- }
--}
--
--void __init arch_init_irq(void)
--{
-- int i;
--
-- bcm63xx_init_irq();
- mips_cpu_irq_init();
-- for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
-- irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
-- handle_level_irq);
--
-- for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i)
-- irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip,
-- handle_edge_irq);
--
-- if (!is_ext_irq_cascaded) {
-- for (i = 3; i < 3 + ext_irq_count; ++i)
-- setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action);
-- }
--
-- setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
--#ifdef CONFIG_SMP
-- if (is_ext_irq_cascaded) {
-- setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
-- bcm63xx_internal_irq_chip.irq_set_affinity =
-- bcm63xx_internal_set_affinity;
--
-- cpumask_clear(irq_default_affinity);
-- cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
-- }
--#endif
-+ bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases,
-+ periph_width);
-+ bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift);
-+ if (ext_irq_count > 4)
-+ bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1],
-+ ext_shift);
- }
+++ /dev/null
-From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 20:20:30 +0100
-Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
- and 5
-
-Due to the external interrupts being non consecutive, the previous
-implementation did not support them. Now that we treat both registers
-as separate irq controllers, there is no such limitation anymore and
-we can expose them for drivers to use.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 5 ++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
- 3 files changed, 7 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -109,11 +109,14 @@ void __init arch_init_irq(void)
- periph_width = 1;
-
- ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
-- ext_irq_count = 4;
-+ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
-+ ext_irq_count = 6;
- ext_irqs[0] = BCM_6358_EXT_IRQ0;
- ext_irqs[1] = BCM_6358_EXT_IRQ1;
- ext_irqs[2] = BCM_6358_EXT_IRQ2;
- ext_irqs[3] = BCM_6358_EXT_IRQ3;
-+ ext_irqs[4] = BCM_6358_EXT_IRQ4;
-+ ext_irqs[5] = BCM_6358_EXT_IRQ5;
- ext_shift = 4;
- break;
- case BCM6362_CPU_ID:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -895,6 +895,8 @@ enum bcm63xx_irq {
- #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
- #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
- #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
-+#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20)
-+#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21)
-
- /*
- * 6362 irqs
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -243,6 +243,7 @@
- #define PERF_EXTIRQ_CFG_REG_6362 0x18
- #define PERF_EXTIRQ_CFG_REG_6368 0x18
-
-+#define PERF_EXTIRQ_CFG_REG2_6358 0x1c
- #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
-
- /* for 6348 only */
+++ /dev/null
-From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:08:36 +0100
-Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
-
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
- 2 files changed, 28 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
- u16 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
-
-+static u32 bcm63xx_cpu_variant __read_mostly;
-+
- static u8 bcm63xx_cpu_rev;
- static unsigned int bcm63xx_cpu_freq;
- static unsigned int bcm63xx_memory_size;
-@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
-
- };
-
-+u32 bcm63xx_get_cpu_variant(void)
-+{
-+ return bcm63xx_cpu_variant;
-+}
-+
-+EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
-+
- u8 bcm63xx_get_cpu_rev(void)
- {
- return bcm63xx_cpu_rev;
-@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void)
- /* read out CPU type */
- tmp = bcm_readl(chipid_reg);
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -19,6 +19,7 @@
- #define BCM6368_CPU_ID 0x6368
-
- void __init bcm63xx_cpu_init(void);
-+u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
-
-@@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-
-+#define BCMCPU_VARIANT_IS_3368() \
-+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6328() \
-+ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6338() \
-+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6345() \
-+ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6348() \
-+ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6358() \
-+ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6362() \
-+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6368() \
-+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
- * address of these sets do change.
+++ /dev/null
-From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:22:41 +0100
-Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
-
-Some SoC have a variant id field in the chip id register.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -9,6 +9,8 @@
- #define PERF_REV_REG 0x0
- #define REV_CHIPID_SHIFT 16
- #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
-+#define REV_VARID_SHIFT 12
-+#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
- #define REV_REVID_SHIFT 0
- #define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
-
+++ /dev/null
-From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:30:59 +0100
-Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
- 2 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void)
- unsigned int tmp;
- unsigned int cpu = smp_processor_id();
- u32 chipid_reg;
-+ u8 __maybe_unused varid = 0;
-
- /* soc registers location depends on cpu type */
- chipid_reg = 0;
-@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void)
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
- bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
- case BCM3368_CPU_ID:
-@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void)
- case BCM6328_CPU_ID:
- bcm63xx_regs_base = bcm6328_regs_base;
- bcm63xx_irqs = bcm6328_irqs;
-+
-+ if (varid == 1)
-+ bcm63xx_cpu_variant = BCM63281_CPU_ID;
-+ else if (varid == 3)
-+ bcm63xx_cpu_variant = BCM63283_CPU_ID;
-+ else
-+ pr_warn("unknown BCM6328 variant: %x\n", varid);
-+
- break;
- case BCM6338_CPU_ID:
- bcm63xx_regs_base = bcm6338_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -11,6 +11,8 @@
- */
- #define BCM3368_CPU_ID 0x3368
- #define BCM6328_CPU_ID 0x6328
-+#define BCM63281_CPU_ID 0x63281
-+#define BCM63283_CPU_ID 0x63283
- #define BCM6338_CPU_ID 0x6338
- #define BCM6345_CPU_ID 0x6345
- #define BCM6348_CPU_ID 0x6348
-@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
--#define BCMCPU_VARIANT_IS_6328() \
-- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63281() \
-+ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63283() \
-+ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
- #define BCMCPU_VARIANT_IS_6338() \
- (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
- #define BCMCPU_VARIANT_IS_6345() \
+++ /dev/null
-From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:33:28 +0100
-Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
-
----
- arch/mips/bcm63xx/cpu.c | 8 ++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 11 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void)
- case BCM6362_CPU_ID:
- bcm63xx_regs_base = bcm6362_regs_base;
- bcm63xx_irqs = bcm6362_irqs;
-+
-+ if (varid == 1)
-+ bcm63xx_cpu_variant = BCM6362_CPU_ID;
-+ else if (varid == 2)
-+ bcm63xx_cpu_variant = BCM6361_CPU_ID;
-+ else
-+ pr_warn("unknown BCM6362 variant: %x\n", varid);
-+
- break;
- case BCM6368_CPU_ID:
- bcm63xx_regs_base = bcm6368_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -17,6 +17,7 @@
- #define BCM6345_CPU_ID 0x6345
- #define BCM6348_CPU_ID 0x6348
- #define BCM6358_CPU_ID 0x6358
-+#define BCM6361_CPU_ID 0x6361
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
-
-@@ -99,6 +100,8 @@ static inline u16 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
- #define BCMCPU_VARIANT_IS_6358() \
- (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6361() \
-+ (bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
- #define BCMCPU_VARIANT_IS_6362() \
- (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
+++ /dev/null
-From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:36:56 +0100
-Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
-
-The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
-from missing DSL, there is no difference to BCM6368, so treat it such.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/cpu.c | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void)
-
- break;
- case BCM6368_CPU_ID:
-+ case BCM6369_CPU_ID:
- bcm63xx_regs_base = bcm6368_regs_base;
- bcm63xx_irqs = bcm6368_irqs;
-+
-+ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
-+ bcm63xx_cpu_id = BCM6368_CPU_ID;
- break;
- default:
- panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -20,6 +20,7 @@
- #define BCM6361_CPU_ID 0x6361
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
-+#define BCM6369_CPU_ID 0x6369
-
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
- (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6369() \
-+ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
+++ /dev/null
-From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:05:54 +0100
-Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
-
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -41,7 +41,7 @@
- BCM_CB_MEM_SIZE - 1)
-
- #define BCM_PCIE_MEM_BASE_PA 0x10f00000
--#define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024)
-+#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
- #define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
- BCM_PCIE_MEM_SIZE - 1)
-
+++ /dev/null
-From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:13:06 +0100
-Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
-
-Different SoCs use different memory windows (and sizes), so don't
-hardcode it.
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 8 ++++----
- arch/mips/pci/pci-bcm63xx.c | 15 ++++++++++-----
- 2 files changed, 14 insertions(+), 9 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -40,10 +40,10 @@
- #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
- BCM_CB_MEM_SIZE - 1)
-
--#define BCM_PCIE_MEM_BASE_PA 0x10f00000
--#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
--#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
-- BCM_PCIE_MEM_SIZE - 1)
-+#define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
-+#define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
-+ BCM_PCIE_MEM_SIZE_6328 - 1)
-
- /*
- * Internal registers are accessed through KSEG3
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
-
- static struct resource bcm_pcie_mem_resource = {
- .name = "bcm63xx PCIe memory space",
-- .start = BCM_PCIE_MEM_BASE_PA,
-- .end = BCM_PCIE_MEM_END_PA,
-+ .start = 0,
-+ .end = 0,
- .flags = IORESOURCE_MEM,
- };
-
-@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
- bcm_pcie_writel(val, PCIE_CONFIG2_REG);
-
- /* set bar0 to little endian */
-- val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
-- val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
-+ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-+ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
- val |= BASEMASK_REMAP_EN;
- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
-
-- val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
-+ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
-
- register_pci_controller(&bcm63xx_pcie_controller);
-@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
- if (!bcm63xx_pci_enabled)
- return -ENODEV;
-
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
-+ }
-+
- switch (bcm63xx_get_cpu_id()) {
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
+++ /dev/null
-From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:54:51 +0100
-Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field
-
----
- arch/mips/bcm63xx/cpu.c | 2 +-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++----
- 2 files changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
- const int *bcm63xx_irqs;
- EXPORT_SYMBOL(bcm63xx_irqs);
-
--u16 bcm63xx_cpu_id __read_mostly;
-+u32 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
-
- static u32 bcm63xx_cpu_variant __read_mostly;
-@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi
-
- static unsigned int detect_cpu_clock(void)
- {
-- u16 cpu_id = bcm63xx_get_cpu_id();
-+ u32 cpu_id = bcm63xx_get_cpu_id();
-
- switch (cpu_id) {
- case BCM3368_CPU_ID:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -27,7 +27,7 @@ u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
-
--static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
-+static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id)
- {
- switch (cpu_id) {
- #ifdef CONFIG_BCM63XX_CPU_3368
-@@ -69,11 +69,11 @@ static inline u16 __pure __bcm63xx_get_c
- return cpu_id;
- }
-
--extern u16 bcm63xx_cpu_id;
-+extern u32 bcm63xx_cpu_id;
-
--static inline u16 __pure bcm63xx_get_cpu_id(void)
-+static inline u32 __pure bcm63xx_get_cpu_id(void)
- {
-- const u16 cpu_id = bcm63xx_cpu_id;
-+ const u32 cpu_id = bcm63xx_cpu_id;
-
- return __bcm63xx_get_cpu_id(cpu_id);
- }
+++ /dev/null
-From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 15 Dec 2013 20:46:26 +0100
-Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
-
-Newer SoCs have 128 bit wide irq registers, thus 128 available internal
-interupts.
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
- arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
-@@ -1,10 +1,12 @@
- #ifndef BCM63XX_IRQ_H_
- #define BCM63XX_IRQ_H_
-
-+#include <irq.h>
- #include <bcm63xx_cpu.h>
-
- #define IRQ_INTERNAL_BASE 8
--#define IRQ_EXTERNAL_BASE 100
-+#define NR_INTERNAL_IRQS 128
-+#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
- #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
- #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
- #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
---- a/arch/mips/include/asm/mach-bcm63xx/irq.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
-@@ -1,7 +1,7 @@
- #ifndef __ASM_MACH_BCM63XX_IRQ_H
- #define __ASM_MACH_BCM63XX_IRQ_H
-
--#define NR_IRQS 128
-+#define NR_IRQS 256
- #define MIPS_CPU_IRQ_BASE 0
-
- #endif
+++ /dev/null
-From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 17:14:17 +0100
-Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 5 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/clk.c | 25 ++++-
- arch/mips/bcm63xx/cpu.c | 59 +++++++++-
- arch/mips/bcm63xx/dev-flash.c | 6 +
- arch/mips/bcm63xx/dev-spi.c | 4 +-
- arch/mips/bcm63xx/irq.c | 20 +++-
- arch/mips/bcm63xx/reset.c | 21 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 130 ++++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 +
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 79 +++++++++++++
- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
- 12 files changed, 342 insertions(+), 12 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -60,6 +60,11 @@ config BCM63XX_CPU_6368
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+
-+config BCM63XX_CPU_63268
-+ bool "support 63268 CPU"
-+ select SYS_HAS_CPU_BMIPS4350
-+ select HW_HAS_PCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -713,7 +713,7 @@ void __init board_prom_init(void)
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
- */
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
- val = 0x18000000;
- } else {
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -168,6 +168,8 @@ static void enetsw_set(struct clk *clk,
- clk_disable_unlocked(&clk_swpkt_sar);
- }
- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
-+ } else if (BCMCPU_IS_63268()) {
-+ bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
- } else {
- return;
- }
-@@ -213,6 +215,8 @@ static void usbh_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
- else
- return;
-
-@@ -235,6 +239,8 @@ static void usbd_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_USBD_EN, enable);
- else
- return;
-
-@@ -261,9 +267,13 @@ static void spi_set(struct clk *clk, int
- mask = CKCTL_6358_SPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_SPI_EN;
-- else
-- /* BCMCPU_IS_6368 */
-+ else if (BCMCPU_IS_6368())
- mask = CKCTL_6368_SPI_EN;
-+ else if (BCMCPU_IS_63268())
-+ mask = CKCTL_63268_SPI_EN;
-+ else
-+ return;
-+
- bcm_hwclock_set(mask, enable);
- }
-
-@@ -282,6 +292,8 @@ static void hsspi_set(struct clk *clk, i
- mask = CKCTL_6328_HSSPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_HSSPI_EN;
-+ else if (BCMCPU_IS_63268())
-+ mask = CKCTL_63268_HSSPI_EN;
- else
- return;
-
-@@ -351,6 +363,8 @@ static void pcie_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
- else if (BCMCPU_IS_6362())
- bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
- }
-
- static struct clk clk_pcie = {
-@@ -532,6 +546,21 @@ static struct clk_lookup bcm6368_clks[]
- CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
- };
-
-+static struct clk_lookup bcm63268_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+};
-+
- #define HSSPI_PLL_HZ_6328 133333333
- #define HSSPI_PLL_HZ_6362 400000000
-
-@@ -564,6 +593,10 @@ static int __init bcm63xx_clk_init(void)
- case BCM6368_CPU_ID:
- clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
- break;
-+ case BCM63268_CPU_ID:
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
-+ clkdev_add_table(bcm63268_clks, ARRAY_SIZE(bcm63268_clks));
-+ break;
- }
-
- return 0;
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {
-
- };
-
-+static const unsigned long bcm63268_regs_base[] = {
-+ __GEN_CPU_REGS_TABLE(63268)
-+};
-+
-+static const int bcm63268_irqs[] = {
-+ __GEN_CPU_IRQ_TABLE(63268)
-+
-+};
-+
- u32 bcm63xx_get_cpu_variant(void)
- {
- return bcm63xx_cpu_variant;
-@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi
-
- return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
- }
-+ case BCM63268_CPU_ID:
-+ {
-+ unsigned int tmp, mips_pll_fcvo;
-+
-+ tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >>
-+ STRAPBUS_63268_FCVO_SHIFT;
-+ switch (mips_pll_fcvo) {
-+ case 0x3:
-+ case 0xe:
-+ return 320000000;
-+ case 0xa:
-+ return 333000000;
-+ case 0x2:
-+ case 0xb:
-+ case 0xf:
-+ return 400000000;
-+ default:
-+ return 0;
-+ }
-+ }
-
- default:
- panic("Failed to detect clock for CPU with id=%04X\n", cpu_id);
-@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v
- unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
- u32 val;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
- return bcm_ddr_readl(DDR_CSEND_REG) << 24;
-
- if (BCMCPU_IS_6345()) {
-@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void)
- unsigned int tmp;
- unsigned int cpu = smp_processor_id();
- u32 chipid_reg;
-+ bool long_chipid = false;
- u8 __maybe_unused varid = 0;
-
- /* soc registers location depends on cpu type */
-@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void)
- case 0x10:
- chipid_reg = BCM_6345_PERF_BASE;
- break;
-+ case 0x80:
-+ long_chipid = true;
-+ /* fall-through */
- default:
- chipid_reg = BCM_6368_PERF_BASE;
- break;
-@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void)
- break;
- }
-
-+
- /*
- * really early to panic, but delaying panic would not help since we
- * will never get any working console
-@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void)
-
- /* read out CPU type */
- tmp = bcm_readl(chipid_reg);
-- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-- bcm63xx_cpu_variant = bcm63xx_cpu_id;
-+
-+ if (long_chipid) {
-+ bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK;
-+ bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT;
-+ } else {
-+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-+ }
-+
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-- varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
-
- switch (bcm63xx_cpu_id) {
- case BCM3368_CPU_ID:
-@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void)
- /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
- bcm63xx_cpu_id = BCM6368_CPU_ID;
- break;
-+ case BCM63168_CPU_ID:
-+ case BCM63169_CPU_ID:
-+ case BCM63268_CPU_ID:
-+ case BCM63269_CPU_ID:
-+ bcm63xx_regs_base = bcm63268_regs_base;
-+ bcm63xx_irqs = bcm63268_irqs;
-+
-+ bcm63xx_cpu_id = BCM63268_CPU_ID;
-+ break;
- default:
- panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
- break;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t
- case STRAPBUS_6368_BOOT_SEL_PARALLEL:
- return BCM63XX_FLASH_TYPE_PARALLEL;
- }
-+ case BCM63268_CPU_ID:
-+ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
-+ return BCM63XX_FLASH_TYPE_SERIAL;
-+ else
-+ return BCM63XX_FLASH_TYPE_NAND;
- default:
- return -EINVAL;
- }
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -51,7 +51,7 @@ int __init bcm63xx_spi_register(void)
- }
-
- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
-- BCMCPU_IS_6368()) {
-+ BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
- bcm63xx_spi_device.name = "bcm6358-spi",
- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
- }
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -150,6 +150,20 @@ void __init arch_init_irq(void)
- ext_irqs[5] = BCM_6368_EXT_IRQ5;
- ext_shift = 4;
- break;
-+ case BCM63268_CPU_ID:
-+ periph_bases[0] += PERF_IRQMASK_63268_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_63268_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 4;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_63268_EXT_IRQ0;
-+ ext_irqs[1] = BCM_63268_EXT_IRQ1;
-+ ext_irqs[2] = BCM_63268_EXT_IRQ2;
-+ ext_irqs[3] = BCM_63268_EXT_IRQ3;
-+ ext_shift = 4;
-+ break;
- default:
- BUG();
- }
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -125,6 +125,20 @@
- #define BCM6368_RESET_PCIE 0
- #define BCM6368_RESET_PCIE_EXT 0
-
-+#define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
-+#define BCM63268_RESET_ENET 0
-+#define BCM63268_RESET_USBH SOFTRESET_63268_USBH_MASK
-+#define BCM63268_RESET_USBD SOFTRESET_63268_USBS_MASK
-+#define BCM63268_RESET_DSL 0
-+#define BCM63268_RESET_SAR SOFTRESET_63268_SAR_MASK
-+#define BCM63268_RESET_EPHY 0
-+#define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
-+#define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
-+#define BCM63268_RESET_MPI 0
-+#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-+ SOFTRESET_63268_PCIE_CORE_MASK)
-+#define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-+
- /*
- * core reset bits
- */
-@@ -156,6 +170,10 @@ static const u32 bcm6368_reset_bits[] =
- __GEN_RESET_BITS_TABLE(6368)
- };
-
-+static const u32 bcm63268_reset_bits[] = {
-+ __GEN_RESET_BITS_TABLE(63268)
-+};
-+
- const u32 *bcm63xx_reset_bits;
- static int reset_reg;
-
-@@ -182,6 +200,9 @@ static int __init bcm63xx_reset_bits_ini
- } else if (BCMCPU_IS_6368()) {
- reset_reg = PERF_SOFTRESET_6368_REG;
- bcm63xx_reset_bits = bcm6368_reset_bits;
-+ } else if (BCMCPU_IS_63268()) {
-+ reset_reg = PERF_SOFTRESET_63268_REG;
-+ bcm63xx_reset_bits = bcm63268_reset_bits;
- }
-
- return 0;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -21,6 +21,10 @@
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
- #define BCM6369_CPU_ID 0x6369
-+#define BCM63168_CPU_ID 0x63168
-+#define BCM63169_CPU_ID 0x63169
-+#define BCM63268_CPU_ID 0x63268
-+#define BCM63269_CPU_ID 0x63269
-
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -61,6 +65,10 @@ static inline u32 __pure __bcm63xx_get_c
- #ifdef CONFIG_BCM63XX_CPU_6368
- case BCM6368_CPU_ID:
- #endif
-+
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+ case BCM63268_CPU_ID:
-+#endif
- break;
- default:
- unreachable();
-@@ -86,6 +94,7 @@ static inline u32 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
- #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-+#define BCMCPU_IS_63268() (bcm63xx_get_cpu_id() == BCM63268_CPU_ID)
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-@@ -109,6 +118,14 @@ static inline u32 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
- #define BCMCPU_VARIANT_IS_6369() \
- (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63168() \
-+ (bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63169() \
-+ (bcm63xx_get_cpu_variant() == BCM63169_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63268() \
-+ (bcm63xx_get_cpu_variant() == BCM63268_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63269() \
-+ (bcm63xx_get_cpu_variant() == BCM63269_CPU_ID)
-
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
-@@ -573,6 +590,52 @@ enum bcm63xx_regs_set {
- #define BCM_6368_RNG_BASE (0xb0004180)
- #define BCM_6368_MISC_BASE (0xdeadbeef)
-
-+/*
-+ * 63268 register sets base address
-+ */
-+#define BCM_63268_DSL_LMEM_BASE (0xdeadbeef)
-+#define BCM_63268_PERF_BASE (0xb0000000)
-+#define BCM_63268_TIMER_BASE (0xb0000080)
-+#define BCM_63268_WDT_BASE (0xb000009c)
-+#define BCM_63268_UART0_BASE (0xb0000180)
-+#define BCM_63268_UART1_BASE (0xb00001a0)
-+#define BCM_63268_GPIO_BASE (0xb00000c0)
-+#define BCM_63268_SPI_BASE (0xb0000800)
-+#define BCM_63268_HSSPI_BASE (0xb0001000)
-+#define BCM_63268_UDC0_BASE (0xdeadbeef)
-+#define BCM_63268_USBDMA_BASE (0xb000c800)
-+#define BCM_63268_OHCI0_BASE (0xb0002600)
-+#define BCM_63268_OHCI_PRIV_BASE (0xdeadbeef)
-+#define BCM_63268_USBH_PRIV_BASE (0xb0002700)
-+#define BCM_63268_USBD_BASE (0xb0002400)
-+#define BCM_63268_MPI_BASE (0xdeadbeef)
-+#define BCM_63268_PCMCIA_BASE (0xdeadbeef)
-+#define BCM_63268_PCIE_BASE (0xb06e0000)
-+#define BCM_63268_SDRAM_REGS_BASE (0xdeadbeef)
-+#define BCM_63268_DSL_BASE (0xdeadbeef)
-+#define BCM_63268_UBUS_BASE (0xdeadbeef)
-+#define BCM_63268_ENET0_BASE (0xdeadbeef)
-+#define BCM_63268_ENET1_BASE (0xdeadbeef)
-+#define BCM_63268_ENETDMA_BASE (0xb000d800)
-+#define BCM_63268_ENETDMAC_BASE (0xb000da00)
-+#define BCM_63268_ENETDMAS_BASE (0xb000dc00)
-+#define BCM_63268_ENETSW_BASE (0xb0700000)
-+#define BCM_63268_EHCI0_BASE (0xb0002500)
-+#define BCM_63268_SDRAM_BASE (0xdeadbeef)
-+#define BCM_63268_MEMC_BASE (0xdeadbeef)
-+#define BCM_63268_DDR_BASE (0xb0003000)
-+#define BCM_63268_M2M_BASE (0xdeadbeef)
-+#define BCM_63268_ATM_BASE (0xdeadbeef)
-+#define BCM_63268_XTM_BASE (0xb0007000)
-+#define BCM_63268_XTMDMA_BASE (0xb000b800)
-+#define BCM_63268_XTMDMAC_BASE (0xdeadbeef)
-+#define BCM_63268_XTMDMAS_BASE (0xdeadbeef)
-+#define BCM_63268_PCM_BASE (0xb000b000)
-+#define BCM_63268_PCMDMA_BASE (0xb000b800)
-+#define BCM_63268_PCMDMAC_BASE (0xdeadbeef)
-+#define BCM_63268_PCMDMAS_BASE (0xdeadbeef)
-+#define BCM_63268_RNG_BASE (0xdeadbeef)
-+#define BCM_63268_MISC_BASE (0xb0001800)
-
- extern const unsigned long *bcm63xx_regs_base;
-
-@@ -1041,6 +1104,73 @@ enum bcm63xx_irq {
- #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
- #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)
-
-+/*
-+ * 63268 irqs
-+ */
-+#define BCM_63268_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
-+#define BCM_63268_VERY_HIGH_IRQ_BASE (BCM_63268_HIGH_IRQ_BASE + 32)
-+
-+#define BCM_63268_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
-+#define BCM_63268_SPI_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 16)
-+#define BCM_63268_UART0_IRQ (IRQ_INTERNAL_BASE + 5)
-+#define BCM_63268_UART1_IRQ (BCM_63268_HIGH_IRQ_BASE + 2)
-+#define BCM_63268_DSL_IRQ (IRQ_INTERNAL_BASE + 23)
-+#define BCM_63268_UDC0_IRQ 0
-+#define BCM_63268_ENET0_IRQ 0
-+#define BCM_63268_ENET1_IRQ 0
-+#define BCM_63268_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 13)
-+#define BCM_63268_HSSPI_IRQ (IRQ_INTERNAL_BASE + 6)
-+#define BCM_63268_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_63268_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
-+#define BCM_63268_USBD_IRQ (IRQ_INTERNAL_BASE + 11)
-+#define BCM_63268_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 19)
-+#define BCM_63268_USBD_TXDMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 4)
-+#define BCM_63268_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 20)
-+#define BCM_63268_USBD_TXDMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 5)
-+#define BCM_63268_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 21)
-+#define BCM_63268_USBD_TXDMA2_IRQ (BCM_63268_HIGH_IRQ_BASE + 6)
-+#define BCM_63268_PCMCIA_IRQ 0
-+#define BCM_63268_ENET0_RXDMA_IRQ 0
-+#define BCM_63268_ENET0_TXDMA_IRQ 0
-+#define BCM_63268_ENET1_RXDMA_IRQ 0
-+#define BCM_63268_ENET1_TXDMA_IRQ 0
-+#define BCM_63268_PCI_IRQ (BCM_63268_HIGH_IRQ_BASE + 8)
-+#define BCM_63268_ATM_IRQ 0
-+#define BCM_63268_ENETSW_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 1)
-+#define BCM_63268_ENETSW_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 2)
-+#define BCM_63268_ENETSW_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 3)
-+#define BCM_63268_ENETSW_RXDMA3_IRQ (IRQ_INTERNAL_BASE + 4)
-+#define BCM_63268_ENETSW_TXDMA0_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 0)
-+#define BCM_63268_ENETSW_TXDMA1_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 1)
-+#define BCM_63268_ENETSW_TXDMA2_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 2)
-+#define BCM_63268_ENETSW_TXDMA3_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 3)
-+#define BCM_63268_XTM_IRQ (BCM_63268_HIGH_IRQ_BASE + 17)
-+#define BCM_63268_XTM_DMA0_IRQ (IRQ_INTERNAL_BASE + 26)
-+
-+#define BCM_63268_RING_OSC_IRQ (BCM_63268_HIGH_IRQ_BASE + 20)
-+#define BCM_63268_WLAN_GPIO_IRQ (BCM_63268_HIGH_IRQ_BASE + 3)
-+#define BCM_63268_WLAN_IRQ (IRQ_INTERNAL_BASE + 7)
-+#define BCM_63268_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8)
-+#define BCM_63268_NAND_IRQ (BCM_63268_HIGH_IRQ_BASE + 18)
-+#define BCM_63268_PCM_IRQ (IRQ_INTERNAL_BASE + 13)
-+#define BCM_63268_DG_IRQ (IRQ_INTERNAL_BASE + 15)
-+#define BCM_63268_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16)
-+#define BCM_63268_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17)
-+#define BCM_63268_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18)
-+#define BCM_63268_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19)
-+#define BCM_63268_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 22)
-+#define BCM_63268_IPSEC_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 7)
-+#define BCM_63268_FAP0_IRQ (IRQ_INTERNAL_BASE + 24)
-+#define BCM_63268_FAP1_IRQ (IRQ_INTERNAL_BASE + 25)
-+#define BCM_63268_PCM_DMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 10)
-+#define BCM_63268_PCM_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 11)
-+#define BCM_63268_DECT0_IRQ (BCM_63268_HIGH_IRQ_BASE + 0)
-+#define BCM_63268_DECT1_IRQ (BCM_63268_HIGH_IRQ_BASE + 1)
-+#define BCM_63268_EXT_IRQ0 (BCM_63268_HIGH_IRQ_BASE + 12)
-+#define BCM_63268_EXT_IRQ1 (BCM_63268_HIGH_IRQ_BASE + 13)
-+#define BCM_63268_EXT_IRQ2 (BCM_63268_HIGH_IRQ_BASE + 14)
-+#define BCM_63268_EXT_IRQ3 (BCM_63268_HIGH_IRQ_BASE + 15)
-+
- extern const int *bcm63xx_irqs;
-
- #define __GEN_CPU_IRQ_TABLE(__cpu) \
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -22,6 +22,8 @@ static inline unsigned long bcm63xx_gpio
- return 48;
- case BCM6368_CPU_ID:
- return 38;
-+ case BCM63268_CPU_ID:
-+ return 52;
- case BCM6348_CPU_ID:
- default:
- return 37;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -9,6 +9,8 @@
- #define PERF_REV_REG 0x0
- #define REV_CHIPID_SHIFT 16
- #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
-+#define REV_LONG_CHIPID_SHIFT 12
-+#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT)
- #define REV_VARID_SHIFT 12
- #define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
- #define REV_REVID_SHIFT 0
-@@ -211,6 +213,52 @@
- CKCTL_6368_NAND_EN | \
- CKCTL_6368_IPSEC_EN)
-
-+#define CKCTL_63268_DISABLE_GLESS (1 << 0)
-+#define CKCTL_63268_VDSL_QPROC_EN (1 << 1)
-+#define CKCTL_63268_VDSL_AFE_EN (1 << 2)
-+#define CKCTL_63268_VDSL_EN (1 << 3)
-+#define CKCTL_63268_MIPS_EN (1 << 4)
-+#define CKCTL_63268_WLAN_OCP_EN (1 << 5)
-+#define CKCTL_63268_DECT_EN (1 << 6)
-+#define CKCTL_63268_FAP0_EN (1 << 7)
-+#define CKCTL_63268_FAP1_EN (1 << 8)
-+#define CKCTL_63268_SAR_EN (1 << 9)
-+#define CKCTL_63268_ROBOSW_EN (1 << 10)
-+#define CKCTL_63268_PCM_EN (1 << 11)
-+#define CKCTL_63268_USBD_EN (1 << 12)
-+#define CKCTL_63268_USBH_EN (1 << 13)
-+#define CKCTL_63268_IPSEC_EN (1 << 14)
-+#define CKCTL_63268_SPI_EN (1 << 15)
-+#define CKCTL_63268_HSSPI_EN (1 << 16)
-+#define CKCTL_63268_PCIE_EN (1 << 17)
-+#define CKCTL_63268_PHYMIPS_EN (1 << 18)
-+#define CKCTL_63268_GMAC_EN (1 << 19)
-+#define CKCTL_63268_NAND_EN (1 << 20)
-+#define CKCTL_63268_TBUS_EN (1 << 27)
-+#define CKCTL_63268_ROBOSW250_EN (1 << 31)
-+
-+#define CKCTL_63268_ALL_SAFE_EN (CKCTL_63268_VDSL_QPROC_EN | \
-+ CKCTL_63268_VDSL_AFE_EN | \
-+ CKCTL_63268_VDSL_EN | \
-+ CKCTL_63268_WLAN_OCP_EN | \
-+ CKCTL_63268_DECT_EN | \
-+ CKCTL_63268_FAP0_EN | \
-+ CKCTL_63268_FAP1_EN | \
-+ CKCTL_63268_SAR_EN | \
-+ CKCTL_63268_ROBOSW_EN | \
-+ CKCTL_63268_PCM_EN | \
-+ CKCTL_63268_USBD_EN | \
-+ CKCTL_63268_USBH_EN | \
-+ CKCTL_63268_IPSEC_EN | \
-+ CKCTL_63268_SPI_EN | \
-+ CKCTL_63268_HSSPI_EN | \
-+ CKCTL_63268_PCIE_EN | \
-+ CKCTL_63268_PHYMIPS_EN | \
-+ CKCTL_63268_GMAC_EN | \
-+ CKCTL_63268_NAND_EN | \
-+ CKCTL_63268_TBUS_EN | \
-+ CKCTL_63268_ROBOSW250_EN)
-+
- /* System PLL Control register */
- #define PERF_SYS_PLL_CTL_REG 0x8
- #define SYS_PLL_SOFT_RESET 0x1
-@@ -224,6 +272,7 @@
- #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c)
- #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10)
-+#define PERF_IRQMASK_63268_REG(x) (0x20 + (x) * 0x20)
-
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG 0x10
-@@ -234,6 +283,7 @@
- #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c)
- #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10)
-+#define PERF_IRQSTAT_63268_REG(x) (0x30 + (x) * 0x20)
-
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368 0x14
-@@ -244,6 +294,7 @@
- #define PERF_EXTIRQ_CFG_REG_6358 0x14
- #define PERF_EXTIRQ_CFG_REG_6362 0x18
- #define PERF_EXTIRQ_CFG_REG_6368 0x18
-+#define PERF_EXTIRQ_CFG_REG_63268 0x18
-
- #define PERF_EXTIRQ_CFG_REG2_6358 0x1c
- #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
-@@ -274,6 +325,7 @@
- #define PERF_SOFTRESET_6358_REG 0x34
- #define PERF_SOFTRESET_6362_REG 0x10
- #define PERF_SOFTRESET_6368_REG 0x10
-+#define PERF_SOFTRESET_63268_REG 0x10
-
- #define SOFTRESET_3368_SPI_MASK (1 << 0)
- #define SOFTRESET_3368_ENET_MASK (1 << 2)
-@@ -367,6 +419,26 @@
- #define SOFTRESET_6368_USBH_MASK (1 << 12)
- #define SOFTRESET_6368_PCM_MASK (1 << 13)
-
-+#define SOFTRESET_63268_SPI_MASK (1 << 0)
-+#define SOFTRESET_63268_IPSEC_MASK (1 << 1)
-+#define SOFTRESET_63268_EPHY_MASK (1 << 2)
-+#define SOFTRESET_63268_SAR_MASK (1 << 3)
-+#define SOFTRESET_63268_ENETSW_MASK (1 << 4)
-+#define SOFTRESET_63268_USBS_MASK (1 << 5)
-+#define SOFTRESET_63268_USBH_MASK (1 << 6)
-+#define SOFTRESET_63268_PCM_MASK (1 << 7)
-+#define SOFTRESET_63268_PCIE_CORE_MASK (1 << 8)
-+#define SOFTRESET_63268_PCIE_MASK (1 << 9)
-+#define SOFTRESET_63268_PCIE_EXT_MASK (1 << 10)
-+#define SOFTRESET_63268_WLAN_SHIM_MASK (1 << 11)
-+#define SOFTRESET_63268_DDR_PHY_MASK (1 << 12)
-+#define SOFTRESET_63268_FAP0_MASK (1 << 13)
-+#define SOFTRESET_63268_WLAN_UBUS_MASK (1 << 14)
-+#define SOFTRESET_63268_DECT_MASK (1 << 15)
-+#define SOFTRESET_63268_FAP1_MASK (1 << 16)
-+#define SOFTRESET_63268_PCIE_HARD_MASK (1 << 17)
-+#define SOFTRESET_63268_GPHY_MASK (1 << 18)
-+
- /* MIPS PLL control register */
- #define PERF_MIPSPLLCTL_REG 0x34
- #define MIPSPLLCTL_N1_SHIFT 20
-@@ -1366,6 +1438,13 @@
- #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15)
- #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)
-
-+#define MISC_STRAPBUS_63268_REG 0x14
-+#define STRAPBUS_63268_HSSPI_CLK_FAST (1 << 9)
-+#define STRAPBUS_63268_BOOT_SEL_SERIAL (1 << 11)
-+#define STRAPBUS_63268_BOOT_SEL_NAND (0 << 11)
-+#define STRAPBUS_63268_FCVO_SHIFT 21
-+#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
-+
- #define MISC_STRAPBUS_6328_REG 0x240
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
---- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-@@ -25,6 +25,7 @@ static inline int is_bcm63xx_internal_re
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM6368_CPU_ID:
-+ case BCM63268_CPU_ID:
- if (offset >= 0xb0000000 && offset < 0xb1000000)
- return 1;
- break;
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs
-
- int __init bcm63xx_hsspi_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -176,7 +176,8 @@ static int __init register_shared(void)
- else
- shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
-+ BCMCPU_IS_63268())
- chan_count = 32;
- else if (BCMCPU_IS_6345())
- chan_count = 8;
-@@ -284,7 +285,8 @@ bcm63xx_enetsw_register(const struct bcm
- {
- int ret;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
-+ !BCMCPU_IS_63268())
- return -ENODEV;
-
- ret = register_shared();
-@@ -305,6 +307,8 @@ bcm63xx_enetsw_register(const struct bcm
- enetsw_pd.num_ports = ENETSW_PORTS_6328;
- else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
- enetsw_pd.num_ports = ENETSW_PORTS_6368;
-+ else if (BCMCPU_IS_63268())
-+ enetsw_pd.num_ports = ENETSW_PORTS_63268;
-
- enetsw_pd.dma_has_sram = true;
- enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -66,6 +66,7 @@ struct bcm63xx_enet_platform_data {
- #define ENETSW_MAX_PORT 8
- #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
- #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
-+#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */
-
- #define ENETSW_RGMII_PORT0 4
-
+++ /dev/null
-From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:22:40 +0100
-Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
-
----
- arch/mips/bcm63xx/reset.c | 3 ++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
- arch/mips/pci/pci-bcm63xx.c | 4 ++++
- 3 files changed, 11 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -136,7 +136,8 @@
- #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
- #define BCM63268_RESET_MPI 0
- #define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-- SOFTRESET_63268_PCIE_CORE_MASK)
-+ SOFTRESET_63268_PCIE_CORE_MASK | \
-+ SOFTRESET_63268_PCIE_HARD_MASK)
- #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-
- /*
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -45,6 +45,11 @@
- #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
- BCM_PCIE_MEM_SIZE_6328 - 1)
-
-+#define BCM_PCIE_MEM_BASE_PA_63268 0x11000000
-+#define BCM_PCIE_MEM_SIZE_63268 (15 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_63268 (BCM_PCIE_MEM_BASE_PA_63268 + \
-+ BCM_PCIE_MEM_SIZE_63268 - 1)
-+
- /*
- * Internal registers are accessed through KSEG3
- */
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
- bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
- bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
-+ } else if (BCMCPU_IS_63268()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
- }
-
- switch (bcm63xx_get_cpu_id()) {
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
-+ case BCM63268_CPU_ID:
- return bcm63xx_register_pcie();
- case BCM3368_CPU_ID:
- case BCM6348_CPU_ID:
+++ /dev/null
-From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 01:24:09 +0100
-Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
-
----
- arch/mips/bcm63xx/Kconfig | 5 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/clk.c | 8 +-
- arch/mips/bcm63xx/cpu.c | 53 +++++++++++
- arch/mips/bcm63xx/dev-flash.c | 3 +
- arch/mips/bcm63xx/dev-spi.c | 2 +-
- arch/mips/bcm63xx/irq.c | 10 ++
- arch/mips/bcm63xx/prom.c | 2 +-
- arch/mips/bcm63xx/reset.c | 24 +++++
- arch/mips/bcm63xx/setup.c | 5 +-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 107 ++++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 75 ++++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
- 13 files changed, 291 insertions(+), 6 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -18,6 +18,11 @@ config BCM63XX_EHCI
- select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
- select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
-
-+config BCM63XX_CPU_6318
-+ bool "support 6318 CPU"
-+ select SYS_HAS_CPU_BMIPS32_3300
-+ select HW_HAS_PCI
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -713,7 +713,7 @@ void __init board_prom_init(void)
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
- */
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
- val = 0x18000000;
- } else {
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -288,7 +288,9 @@ static void hsspi_set(struct clk *clk, i
- {
- u32 mask;
-
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318())
-+ mask = CKCTL_6318_HSSPI_EN;
-+ else if (BCMCPU_IS_6328())
- mask = CKCTL_6328_HSSPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_HSSPI_EN;
-@@ -440,6 +442,19 @@ static struct clk_lookup bcm3368_clks[]
- CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
-
-+static struct clk_lookup bcm6318_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbh),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+};
-+
- static struct clk_lookup bcm6328_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-@@ -561,6 +576,7 @@ static struct clk_lookup bcm63268_clks[]
- CLKDEV_INIT(NULL, "pcie", &clk_pcie),
- };
-
-+#define HSSPI_PLL_HZ_6318 250000000
- #define HSSPI_PLL_HZ_6328 133333333
- #define HSSPI_PLL_HZ_6362 400000000
-
-@@ -570,6 +586,10 @@ static int __init bcm63xx_clk_init(void)
- case BCM3368_CPU_ID:
- clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
- break;
-+ case BCM6318_CPU_ID:
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6318;
-+ clkdev_add_table(bcm6318_clks, ARRAY_SIZE(bcm6318_clks));
-+ break;
- case BCM6328_CPU_ID:
- clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
- clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = {
- __GEN_CPU_IRQ_TABLE(3368)
- };
-
-+static const unsigned long bcm6318_regs_base[] = {
-+ __GEN_CPU_REGS_TABLE(6318)
-+};
-+
-+static const int bcm6318_irqs[] = {
-+ __GEN_CPU_IRQ_TABLE(6318)
-+};
-+
- static const unsigned long bcm6328_regs_base[] = {
- __GEN_CPU_REGS_TABLE(6328)
- };
-@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi
- return bcm63xx_memory_size;
- }
-
-+#define STRAP_OVERRIDE_BUS_REG 0x0
-+#define OVERRIDE_BUS_MIPS_FREQ_SHIFT 23
-+#define OVERRIDE_BUS_MIPS_FREQ_MASK (0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT)
-+
- static unsigned int detect_cpu_clock(void)
- {
- u32 cpu_id = bcm63xx_get_cpu_id();
-@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi
- case BCM3368_CPU_ID:
- return 300000000;
-
-+ case BCM6318_CPU_ID:
-+ {
-+ unsigned int tmp, mips_pll_fcvo;
-+
-+ tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG);
-+
-+ pr_info("strap_override_bus = %08x\n", tmp);
-+
-+ mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK)
-+ >> OVERRIDE_BUS_MIPS_FREQ_SHIFT;
-+
-+ switch (mips_pll_fcvo) {
-+ case 0:
-+ return 166000000;
-+ case 1:
-+ return 400000000;
-+ case 2:
-+ return 250000000;
-+ case 3:
-+ return 333000000;
-+ };
-+ }
- case BCM6328_CPU_ID:
- {
- unsigned int tmp, mips_pll_fcvo;
-@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v
- unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
- u32 val;
-
-+ if (BCMCPU_IS_6318()) {
-+ val = bcm_sdram_readl(SDRAM_CFG_REG);
-+ val = val & SDRAM_CFG_6318_SPACE_MASK;
-+ val >>= SDRAM_CFG_6318_SPACE_SHIFT;
-+ return 1 << (val + 20);
-+ }
-+
- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
- return bcm_ddr_readl(DDR_CSEND_REG) << 24;
-
-@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void)
-
- switch (current_cpu_type()) {
- case CPU_BMIPS3300:
-+ if ((read_c0_prid() & 0xff) >= 0x33) {
-+ /* BCM6318 */
-+ chipid_reg = BCM_6368_PERF_BASE;
-+ break;
-+ }
-+
- if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
- __cpu_name[cpu] = "Broadcom BCM6338";
- /* fall-through */
-@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void)
- bcm63xx_cpu_variant = bcm63xx_cpu_id;
-
- switch (bcm63xx_cpu_id) {
-+ case BCM6318_CPU_ID:
-+ bcm63xx_regs_base = bcm6318_regs_base;
-+ bcm63xx_irqs = bcm6318_irqs;
-+ break;
- case BCM3368_CPU_ID:
- bcm63xx_regs_base = bcm3368_regs_base;
- bcm63xx_irqs = bcm3368_irqs;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t
- u32 val;
-
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
-+ /* only support serial flash */
-+ return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6328_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
- if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -38,7 +38,7 @@ static struct platform_device bcm63xx_sp
-
- int __init bcm63xx_spi_register(void)
- {
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -49,6 +49,19 @@ void __init arch_init_irq(void)
- ext_irqs[3] = BCM_3368_EXT_IRQ3;
- ext_shift = 4;
- break;
-+ case BCM6318_CPU_ID:
-+ periph_bases[0] += PERF_IRQMASK_6318_REG;
-+ periph_irq_count = 1;
-+ periph_width = 4;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[2] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[3] = BCM_6318_EXT_IRQ0;
-+ ext_shift = 4;
-+ break;
- case BCM6328_CPU_ID:
- periph_bases[0] += PERF_IRQMASK_6328_REG(0);
- periph_bases[1] += PERF_IRQMASK_6328_REG(1);
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -68,7 +68,7 @@ void __init prom_init(void)
-
- if (reg & OTP_6328_REG3_TP1_DISABLED)
- bmips_smp_enabled = 0;
-- } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
-+ } else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
- bmips_smp_enabled = 0;
- }
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -43,6 +43,23 @@
- #define BCM3368_RESET_PCIE 0
- #define BCM3368_RESET_PCIE_EXT 0
-
-+
-+#define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
-+#define BCM6318_RESET_ENET 0
-+#define BCM6318_RESET_USBH SOFTRESET_6318_USBH_MASK
-+#define BCM6318_RESET_USBD SOFTRESET_6318_USBS_MASK
-+#define BCM6318_RESET_DSL 0
-+#define BCM6318_RESET_SAR SOFTRESET_6318_SAR_MASK
-+#define BCM6318_RESET_EPHY SOFTRESET_6318_EPHY_MASK
-+#define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
-+#define BCM6318_RESET_PCM 0
-+#define BCM6318_RESET_MPI 0
-+#define BCM6318_RESET_PCIE \
-+ (SOFTRESET_6318_PCIE_MASK | \
-+ SOFTRESET_6318_PCIE_CORE_MASK | \
-+ SOFTRESET_6318_PCIE_HARD_MASK)
-+#define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
-+
- #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
- #define BCM6328_RESET_ENET 0
- #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK
-@@ -147,6 +164,10 @@ static const u32 bcm3368_reset_bits[] =
- __GEN_RESET_BITS_TABLE(3368)
- };
-
-+static const u32 bcm6318_reset_bits[] = {
-+ __GEN_RESET_BITS_TABLE(6318)
-+};
-+
- static const u32 bcm6328_reset_bits[] = {
- __GEN_RESET_BITS_TABLE(6328)
- };
-@@ -183,6 +204,9 @@ static int __init bcm63xx_reset_bits_ini
- if (BCMCPU_IS_3368()) {
- reset_reg = PERF_SOFTRESET_6358_REG;
- bcm63xx_reset_bits = bcm3368_reset_bits;
-+ } else if (BCMCPU_IS_6318()) {
-+ reset_reg = PERF_SOFTRESET_6318_REG;
-+ bcm63xx_reset_bits = bcm6318_reset_bits;
- } else if (BCMCPU_IS_6328()) {
- reset_reg = PERF_SOFTRESET_6328_REG;
- bcm63xx_reset_bits = bcm6328_reset_bits;
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void)
- case BCM3368_CPU_ID:
- perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
- break;
-+ case BCM6318_CPU_ID:
-+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318;
-+ break;
- case BCM6328_CPU_ID:
- perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
- break;
-@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void)
- bcm6348_a1_reboot();
-
- pr_info("triggering watchdog soft-reset...\n");
-- if (BCMCPU_IS_6328()) {
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) {
- bcm_wdt_writel(1, WDT_SOFTRESET_REG);
- } else {
- reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -10,6 +10,7 @@
- * arm mach-types)
- */
- #define BCM3368_CPU_ID 0x3368
-+#define BCM6318_CPU_ID 0x6318
- #define BCM6328_CPU_ID 0x6328
- #define BCM63281_CPU_ID 0x63281
- #define BCM63283_CPU_ID 0x63283
-@@ -38,6 +39,10 @@ static inline u32 __pure __bcm63xx_get_c
- case BCM3368_CPU_ID:
- #endif
-
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ case BCM6318_CPU_ID:
-+#endif
-+
- #ifdef CONFIG_BCM63XX_CPU_6328
- case BCM6328_CPU_ID:
- #endif
-@@ -87,6 +92,7 @@ static inline u32 __pure bcm63xx_get_cpu
- }
-
- #define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
-+#define BCMCPU_IS_6318() (bcm63xx_get_cpu_id() == BCM6318_CPU_ID)
- #define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
- #define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
- #define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
-@@ -98,6 +104,8 @@ static inline u32 __pure bcm63xx_get_cpu
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6318() \
-+ (bcm63xx_get_cpu_variant() == BCM6318_CPU_ID)
- #define BCMCPU_VARIANT_IS_63281() \
- (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
- #define BCMCPU_VARIANT_IS_63283() \
-@@ -252,6 +260,56 @@ enum bcm63xx_regs_set {
- #define BCM_3368_MISC_BASE (0xdeadbeef)
-
- /*
-+ * 6318 register sets base address
-+ */
-+#define BCM_6318_DSL_LMEM_BASE (0xdeadbeef)
-+#define BCM_6318_PERF_BASE (0xb0000000)
-+#define BCM_6318_TIMER_BASE (0xb0000040)
-+#define BCM_6318_WDT_BASE (0xb0000068)
-+#define BCM_6318_UART0_BASE (0xb0000100)
-+#define BCM_6318_UART1_BASE (0xdeadbeef)
-+#define BCM_6318_GPIO_BASE (0xb0000080)
-+#define BCM_6318_SPI_BASE (0xdeadbeef)
-+#define BCM_6318_HSSPI_BASE (0xb0003000)
-+#define BCM_6318_UDC0_BASE (0xdeadbeef)
-+#define BCM_6318_USBDMA_BASE (0xb0006800)
-+#define BCM_6318_OHCI0_BASE (0xb0005100)
-+#define BCM_6318_OHCI_PRIV_BASE (0xdeadbeef)
-+#define BCM_6318_USBH_PRIV_BASE (0xb0005200)
-+#define BCM_6318_USBD_BASE (0xb0006000)
-+#define BCM_6318_MPI_BASE (0xdeadbeef)
-+#define BCM_6318_PCMCIA_BASE (0xdeadbeef)
-+#define BCM_6318_PCIE_BASE (0xb0010000)
-+#define BCM_6318_SDRAM_REGS_BASE (0xdeadbeef)
-+#define BCM_6318_DSL_BASE (0xdeadbeef)
-+#define BCM_6318_UBUS_BASE (0xdeadbeef)
-+#define BCM_6318_ENET0_BASE (0xdeadbeef)
-+#define BCM_6318_ENET1_BASE (0xdeadbeef)
-+#define BCM_6318_ENETDMA_BASE (0xb0088000)
-+#define BCM_6318_ENETDMAC_BASE (0xb0088200)
-+#define BCM_6318_ENETDMAS_BASE (0xb0088400)
-+#define BCM_6318_ENETSW_BASE (0xb0080000)
-+#define BCM_6318_EHCI0_BASE (0xb0005000)
-+#define BCM_6318_SDRAM_BASE (0xb0004000)
-+#define BCM_6318_MEMC_BASE (0xdeadbeef)
-+#define BCM_6318_DDR_BASE (0xdeadbeef)
-+#define BCM_6318_M2M_BASE (0xdeadbeef)
-+#define BCM_6318_ATM_BASE (0xdeadbeef)
-+#define BCM_6318_XTM_BASE (0xdeadbeef)
-+#define BCM_6318_XTMDMA_BASE (0xb000c000)
-+#define BCM_6318_XTMDMAC_BASE (0xdeadbeef)
-+#define BCM_6318_XTMDMAS_BASE (0xdeadbeef)
-+#define BCM_6318_PCM_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMA_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMAC_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMAS_BASE (0xdeadbeef)
-+#define BCM_6318_RNG_BASE (0xdeadbeef)
-+#define BCM_6318_MISC_BASE (0xb0000280)
-+#define BCM_6318_OTP_BASE (0xdeadbeef)
-+
-+#define BCM_6318_STRAP_BASE (0xb0000900)
-+
-+/*
- * 6328 register sets base address
- */
- #define BCM_6328_DSL_LMEM_BASE (0xdeadbeef)
-@@ -774,6 +832,55 @@ enum bcm63xx_irq {
- #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
- #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
-
-+/*
-+ * 6318 irqs
-+ */
-+#define BCM_6318_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
-+#define BCM_6318_VERY_HIGH_IRQ_BASE (BCM_6318_HIGH_IRQ_BASE + 32)
-+
-+#define BCM_6318_TIMER_IRQ (IRQ_INTERNAL_BASE + 31)
-+#define BCM_6318_SPI_IRQ 0
-+#define BCM_6318_UART0_IRQ (IRQ_INTERNAL_BASE + 28)
-+#define BCM_6318_UART1_IRQ 0
-+#define BCM_6318_DSL_IRQ (IRQ_INTERNAL_BASE + 21)
-+#define BCM_6318_UDC0_IRQ 0
-+#define BCM_6318_ENET0_IRQ 0
-+#define BCM_6318_ENET1_IRQ 0
-+#define BCM_6318_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
-+#define BCM_6318_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
-+#define BCM_6318_OHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 9)
-+#define BCM_6318_EHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 10)
-+#define BCM_6318_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
-+#define BCM_6318_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5)
-+#define BCM_6318_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6)
-+#define BCM_6318_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7)
-+#define BCM_6318_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8)
-+#define BCM_6318_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_6318_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10)
-+#define BCM_6318_PCMCIA_IRQ 0
-+#define BCM_6318_ENET0_RXDMA_IRQ 0
-+#define BCM_6318_ENET0_TXDMA_IRQ 0
-+#define BCM_6318_ENET1_RXDMA_IRQ 0
-+#define BCM_6318_ENET1_TXDMA_IRQ 0
-+#define BCM_6318_PCI_IRQ (IRQ_INTERNAL_BASE + 23)
-+#define BCM_6318_ATM_IRQ 0
-+#define BCM_6318_ENETSW_RXDMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 0)
-+#define BCM_6318_ENETSW_RXDMA1_IRQ (BCM_6318_HIGH_IRQ_BASE + 1)
-+#define BCM_6318_ENETSW_RXDMA2_IRQ (BCM_6318_HIGH_IRQ_BASE + 2)
-+#define BCM_6318_ENETSW_RXDMA3_IRQ (BCM_6318_HIGH_IRQ_BASE + 3)
-+#define BCM_6318_ENETSW_TXDMA0_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 10)
-+#define BCM_6318_ENETSW_TXDMA1_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 11)
-+#define BCM_6318_ENETSW_TXDMA2_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 12)
-+#define BCM_6318_ENETSW_TXDMA3_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 13)
-+#define BCM_6318_XTM_IRQ (BCM_6318_HIGH_IRQ_BASE + 31)
-+#define BCM_6318_XTM_DMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 11)
-+
-+#define BCM_6318_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2)
-+#define BCM_6318_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3)
-+#define BCM_6318_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24)
-+#define BCM_6318_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25)
-+#define BCM_6318_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26)
-+#define BCM_6318_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27)
-
- /*
- * 6328 irqs
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -52,6 +52,39 @@
- CKCTL_3368_EMUSB_EN | \
- CKCTL_3368_USBU_EN)
-
-+#define CKCTL_6318_ADSL_ASB_EN (1 << 0)
-+#define CKCTL_6318_USB_ASB_EN (1 << 1)
-+#define CKCTL_6318_MIPS_ASB_EN (1 << 2)
-+#define CKCTL_6318_PCIE_ASB_EN (1 << 3)
-+#define CKCTL_6318_PHYMIPS_ASB_EN (1 << 4)
-+#define CKCTL_6318_ROBOSW_ASB_EN (1 << 5)
-+#define CKCTL_6318_SAR_ASB_EN (1 << 6)
-+#define CKCTL_6318_SDR_ASB_EN (1 << 7)
-+#define CKCTL_6318_SWREG_ASB_EN (1 << 8)
-+#define CKCTL_6318_PERIPH_ASB_EN (1 << 9)
-+#define CKCTL_6318_CPUBUS160_EN (1 << 10)
-+#define CKCTL_6318_ADSL_EN (1 << 11)
-+#define CKCTL_6318_SAR125_EN (1 << 12)
-+#define CKCTL_6318_MIPS_EN (1 << 13)
-+#define CKCTL_6318_PCIE_EN (1 << 14)
-+#define CKCTL_6318_ROBOSW250_EN (1 << 16)
-+#define CKCTL_6318_ROBOSW025_EN (1 << 17)
-+#define CKCTL_6318_SDR_EN (1 << 19)
-+#define CKCTL_6318_USB_EN (1 << 20) /* both device and host */
-+#define CKCTL_6318_HSSPI_EN (1 << 25)
-+#define CKCTL_6318_PCIE25_EN (1 << 27)
-+#define CKCTL_6318_PHYMIPS_EN (1 << 28)
-+#define CKCTL_6318_ADSL_AFE_EN (1 << 29)
-+#define CKCTL_6318_ADSL_QPROC_EN (1 << 30)
-+
-+#define CKCTL_6318_ALL_SAFE_EN (CKCTL_6318_PHYMIPS_EN | \
-+ CKCTL_6318_ADSL_QPROC_EN | \
-+ CKCTL_6318_ADSL_AFE_EN | \
-+ CKCTL_6318_ADSL_EN | \
-+ CKCTL_6318_SAR_EN | \
-+ CKCTL_6318_USB_EN | \
-+ CKCTL_6318_PCIE_EN)
-+
- #define CKCTL_6328_PHYMIPS_EN (1 << 0)
- #define CKCTL_6328_ADSL_QPROC_EN (1 << 1)
- #define CKCTL_6328_ADSL_AFE_EN (1 << 2)
-@@ -259,12 +292,27 @@
- CKCTL_63268_TBUS_EN | \
- CKCTL_63268_ROBOSW250_EN)
-
-+/* UBUS Clock Control register */
-+#define PERF_UB_CKCTL_REG 0x10
-+
-+#define UB_CKCTL_6318_ADSL_EN (1 << 0)
-+#define UB_CKCTL_6318_ARB_EN (1 << 1)
-+#define UB_CKCTL_6318_MIPS_EN (1 << 2)
-+#define UB_CKCTL_6318_PCIE_EN (1 << 3)
-+#define UB_CKCTL_6318_PERIPH_EN (1 << 4)
-+#define UB_CKCTL_6318_PHYMIPS_EN (1 << 5)
-+#define UB_CKCTL_6318_ROBOSW_EN (1 << 6)
-+#define UB_CKCTL_6318_SAR_EN (1 << 7)
-+#define UB_CKCTL_6318_SDR_EN (1 << 8)
-+#define UB_CKCTL_6318_USB_EN (1 << 9)
-+
- /* System PLL Control register */
- #define PERF_SYS_PLL_CTL_REG 0x8
- #define SYS_PLL_SOFT_RESET 0x1
-
- /* Interrupt Mask register */
- #define PERF_IRQMASK_3368_REG 0xc
-+#define PERF_IRQMASK_6318_REG 0x20
- #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6338_REG 0xc
- #define PERF_IRQMASK_6345_REG 0xc
-@@ -276,6 +324,7 @@
-
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG 0x10
-+#define PERF_IRQSTAT_6318_REG 0x30
- #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6338_REG 0x10
- #define PERF_IRQSTAT_6345_REG 0x10
-@@ -287,6 +336,7 @@
-
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368 0x14
-+#define PERF_EXTIRQ_CFG_REG_6318 0x18
- #define PERF_EXTIRQ_CFG_REG_6328 0x18
- #define PERF_EXTIRQ_CFG_REG_6338 0x14
- #define PERF_EXTIRQ_CFG_REG_6345 0x14
-@@ -321,6 +371,7 @@
-
- /* Soft Reset register */
- #define PERF_SOFTRESET_REG 0x28
-+#define PERF_SOFTRESET_6318_REG 0x10
- #define PERF_SOFTRESET_6328_REG 0x10
- #define PERF_SOFTRESET_6358_REG 0x34
- #define PERF_SOFTRESET_6362_REG 0x10
-@@ -334,6 +385,18 @@
- #define SOFTRESET_3368_USBS_MASK (1 << 11)
- #define SOFTRESET_3368_PCM_MASK (1 << 13)
-
-+#define SOFTRESET_6318_SPI_MASK (1 << 0)
-+#define SOFTRESET_6318_EPHY_MASK (1 << 1)
-+#define SOFTRESET_6318_SAR_MASK (1 << 2)
-+#define SOFTRESET_6318_ENETSW_MASK (1 << 3)
-+#define SOFTRESET_6318_USBS_MASK (1 << 4)
-+#define SOFTRESET_6318_USBH_MASK (1 << 5)
-+#define SOFTRESET_6318_PCIE_CORE_MASK (1 << 6)
-+#define SOFTRESET_6318_PCIE_MASK (1 << 7)
-+#define SOFTRESET_6318_PCIE_EXT_MASK (1 << 8)
-+#define SOFTRESET_6318_PCIE_HARD_MASK (1 << 9)
-+#define SOFTRESET_6318_ADSL_MASK (1 << 10)
-+
- #define SOFTRESET_6328_SPI_MASK (1 << 0)
- #define SOFTRESET_6328_EPHY_MASK (1 << 1)
- #define SOFTRESET_6328_SAR_MASK (1 << 2)
-@@ -505,8 +568,17 @@
- #define TIMER_IRQSTAT_TIMER1_IR_EN (1 << 9)
- #define TIMER_IRQSTAT_TIMER2_IR_EN (1 << 10)
-
-+#define TIMER_IRQMASK_6318_REG 0x0
-+#define TIMER_IRQSTAT_6318_REG 0x4
-+#define IRQSTATMASK_TIMER0 (1 << 0)
-+#define IRQSTATMASK_TIMER1 (1 << 1)
-+#define IRQSTATMASK_TIMER2 (1 << 2)
-+#define IRQSTATMASK_TIMER3 (1 << 3)
-+#define IRQSTATMASK_WDT (1 << 4)
-+
- /* Timer control register */
- #define TIMER_CTLx_REG(x) (0x4 + (x * 4))
-+#define TIMER_CTRx_6318_REG(x) (0x8 + (x * 4))
- #define TIMER_CTL0_REG 0x4
- #define TIMER_CTL1_REG 0x8
- #define TIMER_CTL2_REG 0xC
-@@ -1253,6 +1325,8 @@
- #define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT)
- #define SDRAM_CFG_BANK_SHIFT 13
- #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
-+#define SDRAM_CFG_6318_SPACE_SHIFT 4
-+#define SDRAM_CFG_6318_SPACE_MASK (0xf << SDRAM_CFG_6318_SPACE_SHIFT)
-
- #define SDRAM_MBASE_REG 0xc
-
---- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-@@ -22,6 +22,7 @@ static inline int is_bcm63xx_internal_re
- if (offset >= 0xfff00000)
- return 1;
- break;
-+ case BCM6318_CPU_ID:
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM6368_CPU_ID:
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs
-
- int __init bcm63xx_hsspi_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-+ !BCMCPU_IS_63268())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
---- a/arch/mips/bcm63xx/dev-usb-usbd.c
-+++ b/arch/mips/bcm63xx/dev-usb-usbd.c
-@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s
- IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };
- int i;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368())
- return 0;
-
- usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -176,8 +176,8 @@ static int __init register_shared(void)
- else
- shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
-- BCMCPU_IS_63268())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
-+ BCMCPU_IS_6368() || BCMCPU_IS_63268())
- chan_count = 32;
- else if (BCMCPU_IS_6345())
- chan_count = 8;
-@@ -285,8 +285,8 @@ bcm63xx_enetsw_register(const struct bcm
- {
- int ret;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
-- !BCMCPU_IS_63268())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-+ !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return -ENODEV;
-
- ret = register_shared();
-@@ -303,7 +303,7 @@ bcm63xx_enetsw_register(const struct bcm
-
- memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
-
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328())
- enetsw_pd.num_ports = ENETSW_PORTS_6328;
- else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
- enetsw_pd.num_ports = ENETSW_PORTS_6368;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -9,6 +9,8 @@ int __init bcm63xx_gpio_init(void);
- static inline unsigned long bcm63xx_gpio_count(void)
- {
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
-+ return 50;
- case BCM6328_CPU_ID:
- return 32;
- case BCM3368_CPU_ID:
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh
-
- int __init bcm63xx_ehci_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
-+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
- return 0;
-
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+++ /dev/null
-From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 14:17:50 +0100
-Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals
-
----
- arch/mips/bcm63xx/reset.c | 39 ++++++++++++++--------
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h | 2 ++
- arch/mips/pci/pci-bcm63xx.c | 7 ++++
- 3 files changed, 34 insertions(+), 14 deletions(-)
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -28,7 +28,9 @@
- [BCM63XX_RESET_PCM] = BCM## __cpu ##_RESET_PCM, \
- [BCM63XX_RESET_MPI] = BCM## __cpu ##_RESET_MPI, \
- [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \
-- [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT,
-+ [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, \
-+ [BCM63XX_RESET_PCIE_CORE] = BCM## __cpu ##_RESET_PCIE_CORE, \
-+ [BCM63XX_RESET_PCIE_HARD] = BCM## __cpu ##_RESET_PCIE_HARD,
-
- #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK
- #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK
-@@ -42,6 +44,8 @@
- #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK
- #define BCM3368_RESET_PCIE 0
- #define BCM3368_RESET_PCIE_EXT 0
-+#define BCM3368_RESET_PCIE_CORE 0
-+#define BCM3368_RESET_PCIE_HARD 0
-
-
- #define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
-@@ -54,11 +58,10 @@
- #define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
- #define BCM6318_RESET_PCM 0
- #define BCM6318_RESET_MPI 0
--#define BCM6318_RESET_PCIE \
-- (SOFTRESET_6318_PCIE_MASK | \
-- SOFTRESET_6318_PCIE_CORE_MASK | \
-- SOFTRESET_6318_PCIE_HARD_MASK)
-+#define BCM6318_RESET_PCIE SOFTRESET_6318_PCIE_MASK
- #define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
-+#define BCM6318_RESET_PCIE_CORE SOFTRESET_6318_PCIE_CORE_MASK
-+#define BCM6318_RESET_PCIE_HARD SOFTRESET_6318_PCIE_HARD_MASK
-
- #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
- #define BCM6328_RESET_ENET 0
-@@ -70,11 +73,10 @@
- #define BCM6328_RESET_ENETSW SOFTRESET_6328_ENETSW_MASK
- #define BCM6328_RESET_PCM SOFTRESET_6328_PCM_MASK
- #define BCM6328_RESET_MPI 0
--#define BCM6328_RESET_PCIE \
-- (SOFTRESET_6328_PCIE_MASK | \
-- SOFTRESET_6328_PCIE_CORE_MASK | \
-- SOFTRESET_6328_PCIE_HARD_MASK)
-+#define BCM6328_RESET_PCIE SOFTRESET_6328_PCIE_MASK
- #define BCM6328_RESET_PCIE_EXT SOFTRESET_6328_PCIE_EXT_MASK
-+#define BCM6328_RESET_PCIE_CORE SOFTRESET_6328_PCIE_CORE_MASK
-+#define BCM6328_RESET_PCIE_HARD SOFTRESET_6328_PCIE_HARD_MASK
-
- #define BCM6338_RESET_SPI SOFTRESET_6338_SPI_MASK
- #define BCM6338_RESET_ENET SOFTRESET_6338_ENET_MASK
-@@ -88,6 +90,8 @@
- #define BCM6338_RESET_MPI 0
- #define BCM6338_RESET_PCIE 0
- #define BCM6338_RESET_PCIE_EXT 0
-+#define BCM6338_RESET_PCIE_CORE 0
-+#define BCM6338_RESET_PCIE_HARD 0
-
- #define BCM6348_RESET_SPI SOFTRESET_6348_SPI_MASK
- #define BCM6348_RESET_ENET SOFTRESET_6348_ENET_MASK
-@@ -101,6 +105,8 @@
- #define BCM6348_RESET_MPI 0
- #define BCM6348_RESET_PCIE 0
- #define BCM6348_RESET_PCIE_EXT 0
-+#define BCM6348_RESET_PCIE_CORE 0
-+#define BCM6348_RESET_PCIE_HARD 0
-
- #define BCM6358_RESET_SPI SOFTRESET_6358_SPI_MASK
- #define BCM6358_RESET_ENET SOFTRESET_6358_ENET_MASK
-@@ -114,6 +120,8 @@
- #define BCM6358_RESET_MPI SOFTRESET_6358_MPI_MASK
- #define BCM6358_RESET_PCIE 0
- #define BCM6358_RESET_PCIE_EXT 0
-+#define BCM6358_RESET_PCIE_CORE 0
-+#define BCM6358_RESET_PCIE_HARD 0
-
- #define BCM6362_RESET_SPI SOFTRESET_6362_SPI_MASK
- #define BCM6362_RESET_ENET 0
-@@ -125,9 +133,10 @@
- #define BCM6362_RESET_ENETSW SOFTRESET_6362_ENETSW_MASK
- #define BCM6362_RESET_PCM SOFTRESET_6362_PCM_MASK
- #define BCM6362_RESET_MPI 0
--#define BCM6362_RESET_PCIE (SOFTRESET_6362_PCIE_MASK | \
-- SOFTRESET_6362_PCIE_CORE_MASK)
-+#define BCM6362_RESET_PCIE SOFTRESET_6362_PCIE_MASK
- #define BCM6362_RESET_PCIE_EXT SOFTRESET_6362_PCIE_EXT_MASK
-+#define BCM6362_RESET_PCIE_CORE SOFTRESET_6362_PCIE_CORE_MASK
-+#define BCM6362_RESET_PCIE_HARD 0
-
- #define BCM6368_RESET_SPI SOFTRESET_6368_SPI_MASK
- #define BCM6368_RESET_ENET 0
-@@ -141,6 +150,8 @@
- #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK
- #define BCM6368_RESET_PCIE 0
- #define BCM6368_RESET_PCIE_EXT 0
-+#define BCM6368_RESET_PCIE_CORE 0
-+#define BCM6368_RESET_PCIE_HARD 0
-
- #define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
- #define BCM63268_RESET_ENET 0
-@@ -152,10 +163,10 @@
- #define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
- #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
- #define BCM63268_RESET_MPI 0
--#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-- SOFTRESET_63268_PCIE_CORE_MASK | \
-- SOFTRESET_63268_PCIE_HARD_MASK)
-+#define BCM63268_RESET_PCIE SOFTRESET_63268_PCIE_MASK
- #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-+#define BCM63268_RESET_PCIE_CORE SOFTRESET_63268_PCIE_CORE_MASK
-+#define BCM63268_RESET_PCIE_HARD SOFTRESET_63268_PCIE_HARD_MASK
-
- /*
- * core reset bits
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
-@@ -14,6 +14,8 @@ enum bcm63xx_core_reset {
- BCM63XX_RESET_MPI,
- BCM63XX_RESET_PCIE,
- BCM63XX_RESET_PCIE_EXT,
-+ BCM63XX_RESET_PCIE_CORE,
-+ BCM63XX_RESET_PCIE_HARD,
- };
-
- void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo
-
- /* reset the PCIe core */
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) {
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
-+ }
- mdelay(10);
-
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
- mdelay(10);
-
+++ /dev/null
-From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 15 Dec 2013 20:47:34 +0100
-Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
-
----
- arch/mips/bcm63xx/clk.c | 25 ++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 6 ++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 60 +++++++++++-
- arch/mips/pci/ops-bcm63xx.c | 16 +++-
- arch/mips/pci/pci-bcm63xx.c | 106 ++++++++++++++++++----
- 5 files changed, 184 insertions(+), 29 deletions(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -51,6 +51,18 @@ static void bcm_hwclock_set(u32 mask, in
- bcm_perf_writel(reg, PERF_CKCTL_REG);
- }
-
-+static void bcm_ub_hwclock_set(u32 mask, int enable)
-+{
-+ u32 reg;
-+
-+ reg = bcm_perf_readl(PERF_UB_CKCTL_REG);
-+ if (enable)
-+ reg |= mask;
-+ else
-+ reg &= ~mask;
-+ bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
-+}
-+
- /*
- * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
- */
-@@ -361,12 +373,17 @@ static struct clk clk_ipsec = {
-
- static void pcie_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable);
-+ bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
-- else if (BCMCPU_IS_6362())
-+ } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
-- else if (BCMCPU_IS_63268())
-+ } else if (BCMCPU_IS_63268()) {
- bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
-+ }
- }
-
- static struct clk clk_pcie = {
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -40,6 +40,12 @@
- #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
- BCM_CB_MEM_SIZE - 1)
-
-+#define BCM_PCIE_MEM_BASE_PA_6318 0x10200000
-+#define BCM_PCIE_MEM_SIZE_6318 (1 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_6318 (BCM_PCIE_MEM_BASE_PA_6318 + \
-+ BCM_PCIE_MEM_SIZE_6318 - 1)
-+
-+
- #define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
- #define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
- #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1529,6 +1529,17 @@
- * _REG relative to RSET_PCIE
- *************************************************************************/
-
-+#define PCIE_SPECIFIC_REG 0x188
-+#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT 0
-+#define SPECIFIC_ENDIAN_MODE_BAR1_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT 2
-+#define SPECIFIC_ENDIAN_MODE_BAR2_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT 4
-+#define SPECIFIC_ENDIAN_MODE_BAR3_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN 0
-+#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1
-+#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN 2
-+
- #define PCIE_CONFIG2_REG 0x408
- #define CONFIG2_BAR1_SIZE_EN 1
- #define CONFIG2_BAR1_SIZE_MASK 0xf
-@@ -1574,7 +1585,54 @@
- #define PCIE_RC_INT_C (1 << 2)
- #define PCIE_RC_INT_D (1 << 3)
-
--#define PCIE_DEVICE_OFFSET 0x8000
-+#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG 0x400c
-+#define C2P_MEM_WIN_ENDIAN_MODE_MASK 0x3
-+#define C2P_MEM_WIN_ENDIAN_NO_SWAP 0
-+#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1
-+#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2
-+#define C2P_MEM_WIN_BASE_ADDR_SHIFT 20
-+#define C2P_MEM_WIN_BASE_ADDR_MASK (0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT)
-+
-+#define PCIE_RC_BAR1_CONFIG_LO_REG 0x402c
-+#define RC_BAR_CFG_LO_SIZE_256MB 0xd
-+#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT 20
-+#define RC_BAR_CFG_LO_MATCH_ADDR_MASK (0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT)
-+
-+#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070
-+#define C2P_BASELIMIT_LIMIT_SHIFT 20
-+#define C2P_BASELIMIT_LIMIT_MASK (0xfff << C2P_BASELIMIT_LIMIT_SHIFT)
-+#define C2P_BASELIMIT_BASE_SHIFT 4
-+#define C2P_BASELIMIT_BASE_MASK (0xfff << C2P_BASELIMIT_BASE_SHIFT)
-+
-+#define PCIE_UBUS_BAR1_CFG_REMAP_REG 0x4088
-+#define BAR1_CFG_REMAP_OFFSET_SHIFT 20
-+#define BAR1_CFG_REMAP_OFFSET_MASK (0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT)
-+#define BAR1_CFG_REMAP_ACCESS_EN 1
-+
-+#define PCIE_HARD_DEBUG_REG 0x4204
-+#define HARD_DEBUG_SERDES_IDDQ (1 << 23)
-+
-+#define PCIE_CPU_INT1_MASK_CLEAR_REG 0x830c
-+#define CPU_INT_PCIE_ERR_ATTN_CPU (1 << 0)
-+#define CPU_INT_PCIE_INTA (1 << 1)
-+#define CPU_INT_PCIE_INTB (1 << 2)
-+#define CPU_INT_PCIE_INTC (1 << 3)
-+#define CPU_INT_PCIE_INTD (1 << 4)
-+#define CPU_INT_PCIE_INTR (1 << 5)
-+#define CPU_INT_PCIE_NMI (1 << 6)
-+#define CPU_INT_PCIE_UBUS (1 << 7)
-+#define CPU_INT_IPI (1 << 8)
-+
-+#define PCIE_EXT_CFG_INDEX_REG 0x8400
-+#define EXT_CFG_FUNC_NUM_SHIFT 12
-+#define EXT_CFG_FUNC_NUM_MASK (0x7 << EXT_CFG_FUNC_NUM_SHIFT)
-+#define EXT_CFG_DEV_NUM_SHIFT 15
-+#define EXT_CFG_DEV_NUM_MASK (0xf << EXT_CFG_DEV_NUM_SHIFT)
-+#define EXT_CFG_BUS_NUM_SHIFT 20
-+#define EXT_CFG_BUS_NUM_MASK (0xff << EXT_CFG_BUS_NUM_SHIFT)
-+
-+#define PCIE_DEVICE_OFFSET_6318 0x9000
-+#define PCIE_DEVICE_OFFSET_6328 0x8000
-
- /*************************************************************************
- * _REG relative to RSET_OTP
---- a/arch/mips/pci/ops-bcm63xx.c
-+++ b/arch/mips/pci/ops-bcm63xx.c
-@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_
- if (!bcm63xx_pcie_can_access(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
-- if (bus->number == PCIE_BUS_DEVICE)
-- reg += PCIE_DEVICE_OFFSET;
-+ if (bus->number == PCIE_BUS_DEVICE) {
-+ if (BCMCPU_IS_6318())
-+ reg += PCIE_DEVICE_OFFSET_6318;
-+ else
-+ reg += PCIE_DEVICE_OFFSET_6328;
-+ }
-
- data = bcm_pcie_readl(reg);
-
-@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci
- if (!bcm63xx_pcie_can_access(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
-- if (bus->number == PCIE_BUS_DEVICE)
-- reg += PCIE_DEVICE_OFFSET;
-+ if (bus->number == PCIE_BUS_DEVICE) {
-+ if (BCMCPU_IS_6318())
-+ reg += PCIE_DEVICE_OFFSET_6318;
-+ else
-+ reg += PCIE_DEVICE_OFFSET_6328;
-+ }
-
-
- data = bcm_pcie_readl(reg);
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v
-
- void __iomem *pci_iospace_start;
-
--static void __init bcm63xx_reset_pcie(void)
-+static void __init bcm63xx_reset_pcie_gen1(void)
- {
- u32 val;
- u32 reg;
-@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo
- mdelay(200);
- }
-
--static struct clk *pcie_clk;
--
--static int __init bcm63xx_register_pcie(void)
-+static void __init bcm63xx_reset_pcie_gen2(void)
- {
- u32 val;
-
-- /* enable clock */
-- pcie_clk = clk_get(NULL, "pcie");
-- if (IS_ERR_OR_NULL(pcie_clk))
-- return -ENODEV;
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
-
-- clk_prepare_enable(pcie_clk);
-+ /* reset the PCIe core */
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
-+ mdelay(10);
-+ val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG);
-+ val &= ~HARD_DEBUG_SERDES_IDDQ;
-+ bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
-+ mdelay(200);
-+}
-
-- bcm63xx_reset_pcie();
-+static void __init bcm63xx_init_pcie_gen1(void)
-+{
-+ u32 val;
-
- /* configure the PCIe bridge */
- val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG);
-@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie(
- val |= OPT2_CFG_TYPE1_BD_SEL;
- bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG);
-
-+ /* set bar0 to little endian */
-+ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-+ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
-+ val |= BASEMASK_REMAP_EN;
-+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
-+
-+ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
-+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
-+}
-+
-+static void __init bcm63xx_init_pcie_gen2(void)
-+{
-+ u32 val;
-+
-+ bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB |
-+ CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD,
-+ PCIE_CPU_INT1_MASK_CLEAR_REG);
-+
-+ val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK;
-+ val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) <<
-+ C2P_BASELIMIT_BASE_SHIFT;
-+
-+ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG);
-+
-+ /* set bar0 to little endian */
-+ val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
-+ val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK;
-+ val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP;
-+ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
-+
-+ bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG);
-+ bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG);
-+ bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG);
-+
-+ bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT,
-+ PCIE_EXT_CFG_INDEX_REG);
-+}
-+
-+static struct clk *pcie_clk;
-+
-+static int __init bcm63xx_register_pcie(void)
-+{
-+ u32 val;
-+
-+ /* enable clock */
-+ pcie_clk = clk_get(NULL, "pcie");
-+ if (IS_ERR_OR_NULL(pcie_clk))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(pcie_clk);
-+
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
-+ bcm63xx_reset_pcie_gen1();
-+ bcm63xx_init_pcie_gen1();
-+ } else {
-+ bcm63xx_reset_pcie_gen2();
-+ bcm63xx_init_pcie_gen2();
-+ }
-+
- /* setup class code as bridge */
- val = bcm_pcie_readl(PCIE_IDVAL3_REG);
- val &= ~IDVAL3_CLASS_CODE_MASK;
-@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie(
- val &= ~CONFIG2_BAR1_SIZE_MASK;
- bcm_pcie_writel(val, PCIE_CONFIG2_REG);
-
-- /* set bar0 to little endian */
-- val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-- val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
-- val |= BASEMASK_REMAP_EN;
-- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
--
-- val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
-- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
--
- register_pci_controller(&bcm63xx_pcie_controller);
-
- return 0;
-@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void)
- if (!bcm63xx_pci_enabled)
- return -ENODEV;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ if (BCMCPU_IS_6318()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318;
-+ } if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
- bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
- bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
- } else if (BCMCPU_IS_63268()) {
-@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void)
- }
-
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM63268_CPU_ID:
+++ /dev/null
-From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Dec 2013 12:26:57 +0100
-Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the
- result
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 10 +++++++---
- arch/mips/bcm63xx/prom.c | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 3 files changed, 13 insertions(+), 3 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -22,6 +22,8 @@
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
-
-+static int flash_type;
-+
- static struct mtd_partition mtd_partitions[] = {
- {
- .name = "cfe",
-@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t
- }
- }
-
-+void __init bcm63xx_flash_detect(void)
-+{
-+ flash_type = bcm63xx_detect_flash_type();
-+}
-+
- int __init bcm63xx_flash_register(void)
- {
-- int flash_type;
- u32 val;
-
-- flash_type = bcm63xx_detect_flash_type();
--
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
- /* read base address of boot chip select (0) */
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -17,6 +17,7 @@
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-+#include <bcm63xx_dev_flash.h>
-
- void __init prom_init(void)
- {
-@@ -52,6 +53,9 @@ void __init prom_init(void)
- reg &= ~mask;
- bcm_perf_writel(reg, PERF_CKCTL_REG);
-
-+ /* detect and setup flash access */
-+ bcm63xx_flash_detect();
-+
- /* do low level board init */
- board_prom_init();
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -7,6 +7,8 @@ enum {
- BCM63XX_FLASH_TYPE_NAND,
- };
-
-+void bcm63xx_flash_detect(void);
-+
- int __init bcm63xx_flash_register(void);
-
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Dec 2013 13:25:25 +0100
-Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot
-
-Some bootloaders leave the flash access in an invalid state with dual
-read enabled; fix it by disabling it and falling back to simple fast
-reads.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 51 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -16,6 +16,7 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/physmap.h>
-+#include <linux/mtd/spi-nor.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
-@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t
- }
- }
-
-+#define HSSPI_FLASH_CTRL_REG 0x14
-+#define FLASH_CTRL_READ_OPCODE_MASK 0xff
-+#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8)
-+#define FLASH_CTRL_DUMMY_BYTES_SHIFT 10
-+#define FLASH_CTRL_DUMMY_BYTES_MASK (0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT)
-+#define FLASH_CTRL_MB_EN (1 << 23)
-+
- void __init bcm63xx_flash_detect(void)
- {
- flash_type = bcm63xx_detect_flash_type();
-+
-+ /* ensure flash mapping has sane values */
-+ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
-+ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
-+ BCMCPU_IS_63268())) {
-+ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
-+
-+ if (val & FLASH_CTRL_MB_EN) {
-+ /* cfe might configure non working dual-io mode */
-+ val &= ~FLASH_CTRL_MB_EN;
-+ val &= ~FLASH_CTRL_READ_OPCODE_MASK;
-+ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
-+ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
-+
-+ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
-+ case FLASH_CTRL_ADDR_BYTES_3:
-+ val |= SPINOR_OP_READ_FAST;
-+ break;
-+ case FLASH_CTRL_ADDR_BYTES_4:
-+ val |= SPINOR_OP_READ4_FAST;
-+ break;
-+ case FLASH_CTRL_ADDR_BYTES_2:
-+ default:
-+ pr_warn("unsupported address byte mode (%x), not fixing up\n",
-+ val & FLASH_CTRL_ADDR_BYTES_MASK);
-+ return;
-+ }
-+ } else {
-+ /* ensure dummy bytes is set to 1 for _FAST reads */
-+ u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK;
-+
-+ if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ4_FAST)
-+ return;
-+
-+ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
-+ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
-+ }
-+
-+ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
-+ }
- }
-
- int __init bcm63xx_flash_register(void)
+++ /dev/null
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -167,7 +167,11 @@ static struct clk clk_swpkt_usb = {
- */
- static void enetsw_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328()) {
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN |
-+ CKCTL_6318_ROBOSW025_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
- } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
-@@ -219,18 +223,22 @@ static struct clk clk_pcm = {
- */
- static void usbh_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_USB_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
-- else if (BCMCPU_IS_6348())
-+ } else if (BCMCPU_IS_6348()) {
- bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
-- else if (BCMCPU_IS_6362())
-+ } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
-- else if (BCMCPU_IS_6368())
-+ } else if (BCMCPU_IS_6368()) {
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-- else if (BCMCPU_IS_63268())
-+ } else if (BCMCPU_IS_63268()) {
- bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
-- else
-+ } else {
- return;
-+ }
-
- if (enable)
- msleep(100);
+++ /dev/null
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_6318()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-+ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
- }
-
- spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_6318()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-+ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
- }
-
- spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -681,6 +681,12 @@
- #define GPIO_MODE_6368_SPI_SSN4 (1 << 30)
- #define GPIO_MODE_6368_SPI_SSN5 (1 << 31)
-
-+#define GPIO_PINMUX_SEL0_6318 0x1c
-+#define GPIO_PINMUX_SEL0_GPIO13_SHIFT 26
-+#define GPIO_PINMUX_SEL0_GPIO13_MASK (0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_PWRON (1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_LED (2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_GPIO (3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-
- #define GPIO_PINMUX_OTHR_REG 0x24
- #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
-@@ -999,6 +1005,7 @@
-
- #define USBH_PRIV_SWAP_6358_REG 0x0
- #define USBH_PRIV_SWAP_6368_REG 0x1c
-+#define USBH_PRIV_SWAP_6318_REG 0x0c
-
- #define USBH_PRIV_SWAP_USBD_SHIFT 6
- #define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT)
-@@ -1024,6 +1031,13 @@
- #define USBH_PRIV_SETUP_IOC_SHIFT 4
- #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
-
-+#define USBH_PRIV_SETUP_6318_REG 0x00
-+#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
-+#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
-+#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
-+#define USBH_PRIV_SIM_CTRL_6318_REG 0x20
-+#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
-+
-
- /*************************************************************************
- * _REG relative to RSET_USBD
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -126,6 +126,15 @@ void __init board_early_setup(const stru
- }
-
- bcm_gpio_writel(val, GPIO_MODE_REG);
-+
-+#if IS_ENABLED(CONFIG_USB)
-+ if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) {
-+ val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318);
-+ val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK;
-+ val |= GPIO_PINMUX_SEL0_GPIO13_PWRON;
-+ bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318);
-+ }
-+#endif
- }
-
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -22,6 +22,8 @@ config BCM63XX_CPU_6318
- bool "support 6318 CPU"
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -586,6 +586,9 @@
- #define TIMER_CTL_MONOTONIC_MASK (1 << 30)
- #define TIMER_CTL_ENABLE_MASK (1 << 31)
-
-+/* Clock reset control (63268 only) */
-+#define TIMER_CLK_RST_CTL_REG 0x2c
-+#define CLK_RST_CTL_USB_REF_CLK_EN (1 << 18)
-
- /*************************************************************************
- * _REG relative to RSET_WDT
-@@ -1533,6 +1536,11 @@
- #define STRAPBUS_63268_FCVO_SHIFT 21
- #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
-
-+#define MISC_IDDQ_CTRL_6328_REG 0x48
-+#define MISC_IDDQ_CTRL_63268_REG 0x4c
-+
-+#define IDDQ_CTRL_63268_USBH (1 << 4)
-+
- #define MISC_STRAPBUS_6328_REG 0x240
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -63,6 +63,26 @@ static void bcm_ub_hwclock_set(u32 mask,
- bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
- }
-
-+static void bcm_misc_iddq_set(u32 mask, int enable)
-+{
-+ u32 offset;
-+ u32 reg;
-+
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
-+ offset = MISC_IDDQ_CTRL_6328_REG;
-+ else if (BCMCPU_IS_63268())
-+ offset = MISC_IDDQ_CTRL_63268_REG;
-+ else
-+ return;
-+
-+ reg = bcm_misc_readl(offset);
-+ if (enable)
-+ reg &= ~mask;
-+ else
-+ reg |= mask;
-+ bcm_misc_writel(reg, offset);
-+}
-+
- /*
- * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
- */
-@@ -235,7 +255,17 @@ static void usbh_set(struct clk *clk, in
- } else if (BCMCPU_IS_6368()) {
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
- } else if (BCMCPU_IS_63268()) {
-+ u32 reg;
-+
- bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
-+ bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable);
-+ reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG);
-+ if (enable)
-+ reg |= CLK_RST_CTL_USB_REF_CLK_EN;
-+ else
-+ reg &= ~CLK_RST_CTL_USB_REF_CLK_EN;
-+ bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG);
- } else {
- return;
- }
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1033,11 +1033,18 @@
- #define USBH_PRIV_SETUP_6368_REG 0x28
- #define USBH_PRIV_SETUP_IOC_SHIFT 4
- #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
-+#define USBH_PRIV_SETUP_IPP_SHIFT 5
-+#define USBH_PRIV_SETUP_IPP_MASK (1 << USBH_PRIV_SETUP_IPP_SHIFT)
-
- #define USBH_PRIV_SETUP_6318_REG 0x00
-+#define USBH_PRIV_PLL_CTRL1_6368_REG 0x18
- #define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
--#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
--#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
-+
-+#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN (1 << 27)
-+#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN (1 << 31)
-+#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN (1 << 9)
-+#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY (1 << 10)
-+
- #define USBH_PRIV_SIM_CTRL_6318_REG 0x20
- #define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -72,6 +72,8 @@ config BCM63XX_CPU_63268
- bool "support 63268 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-+ select BCM63XX_EHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
- int __init bcm63xx_ehci_register(void)
- {
- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
-- !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return 0;
-
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_63268()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
-+ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
-+ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
- } else if (BCMCPU_IS_6318()) {
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_63268()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
-+ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
-+ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
- } else if (BCMCPU_IS_6318()) {
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -41,6 +41,7 @@ struct board_info {
-
- /* USB config */
- struct bcm63xx_usbd_platform_data usbd;
-+ unsigned int num_usbh_ports:2;
-
- /* DSP config */
- struct bcm63xx_dsp_platform_data dsp;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-@@ -1,6 +1,6 @@
- #ifndef BCM63XX_DEV_USB_EHCI_H_
- #define BCM63XX_DEV_USB_EHCI_H_
-
--int bcm63xx_ehci_register(void);
-+int bcm63xx_ehci_register(unsigned int num_ports);
-
- #endif /* BCM63XX_DEV_USB_EHCI_H_ */
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-@@ -1,6 +1,6 @@
- #ifndef BCM63XX_DEV_USB_OHCI_H_
- #define BCM63XX_DEV_USB_OHCI_H_
-
--int bcm63xx_ohci_register(void);
-+int bcm63xx_ohci_register(unsigned int num_ports);
-
- #endif /* BCM63XX_DEV_USB_OHCI_H_ */
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -166,6 +166,8 @@ static struct platform_device bcm63xx_gp
- */
- int __init board_register_devices(void)
- {
-+ int usbh_ports = 0;
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
-@@ -187,14 +189,21 @@ int __init board_register_devices(void)
- !board_get_mac_address(board.enetsw.mac_addr))
- bcm63xx_enetsw_register(&board.enetsw);
-
-+ if ((board.has_ohci0 || board.has_ehci0)) {
-+ usbh_ports = board.num_usbh_ports;
-+
-+ if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd))
-+ usbh_ports = 1;
-+ }
-+
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
- if (board.has_ehci0)
-- bcm63xx_ehci_register();
-+ bcm63xx_ehci_register(usbh_ports);
-
- if (board.has_ohci0)
-- bcm63xx_ohci_register();
-+ bcm63xx_ohci_register(usbh_ports);
-
- if (board.has_dsp)
- bcm63xx_dsp_register(&board.dsp);
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh
- },
- };
-
--int __init bcm63xx_ehci_register(void)
-+int __init bcm63xx_ehci_register(unsigned int num_ports)
- {
- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
- !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return 0;
-
-+ bcm63xx_ehci_pdata.num_ports = num_ports;
-+
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
- ehci_resources[0].end = ehci_resources[0].start;
- ehci_resources[0].end += RSET_EHCI_SIZE - 1;
---- a/arch/mips/bcm63xx/dev-usb-ohci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
-@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc
- .big_endian_desc = 1,
- .big_endian_mmio = 1,
- .no_big_frame_no = 1,
-- .num_ports = 1,
- .power_on = bcm63xx_ohci_power_on,
- .power_off = bcm63xx_ohci_power_off,
- .power_suspend = bcm63xx_ohci_power_off,
-@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh
- },
- };
-
--int __init bcm63xx_ohci_register(void)
-+int __init bcm63xx_ohci_register(unsigned int num_ports)
- {
- if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
- return -ENODEV;
-
-+ bcm63xx_ohci_pdata.num_ports = num_ports;
-+
- ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
- ohci_resources[0].end = ohci_resources[0].start;
- ohci_resources[0].end += RSET_OHCI_SIZE - 1;
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -592,6 +592,7 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-
- .leds = {
- {
+++ /dev/null
-From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Jun 2014 12:47:49 +0200
-Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one
- board type
-
-Use the arguments passed to the kernel to detect being booted with
-CFE as the indicator for bcm963xx board support, allowing the
-non presence of CFE_EPTSEAL to assume a different board type.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 7 +++----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 13 +++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 6 ++++++
- 4 files changed, 23 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -1,11 +1,10 @@
--choice
-- prompt "Board support"
-+menu "Board support"
- depends on BCM63XX
-- default BOARD_BCM963XX
-
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
-+ default y
- help
-
--endchoice
-+endmenu
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -702,7 +702,7 @@ static const struct board_info __initcon
- /*
- * early init callback, read nvram data from flash and checksum it
- */
--void __init board_prom_init(void)
-+void __init board_bcm963xx_init(void)
- {
- unsigned int i;
- u8 *boot_addr, *cfe;
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -13,6 +13,8 @@
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
-+#include <asm/bootinfo.h>
-+#include <asm/fw/cfe/cfe_api.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_uart.h>
-@@ -31,6 +33,8 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-+#include "board_common.h"
-+
- #define PFX "board: "
-
- static struct board_info board;
-@@ -81,6 +85,15 @@ const char *board_get_name(void)
- return board.name;
- }
-
-+void __init board_prom_init(void)
-+{
-+ /* detect bootloader */
-+ if (fw_arg3 == CFE_EPTSEAL)
-+ board_bcm963xx_init();
-+ else
-+ panic("unsupported bootloader detected");
-+}
-+
- static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
-
- /*
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -6,4 +6,10 @@
- void board_early_setup(const struct board_info *board,
- int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
-+#if defined(CONFIG_BOARD_BCM963XX)
-+void board_bcm963xx_init(void);
-+#else
-+static inline void board_bcm963xx_init(void) { }
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
-From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:28:14 +0100
-Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force
- flash address
-
-Allow board implementations to force the physmap address.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 19 ++++++++++++++-----
- .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 2 files changed, 16 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -58,6 +58,12 @@ static struct platform_device mtd_dev =
- },
- };
-
-+void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end)
-+{
-+ mtd_resources[0].start = start;
-+ mtd_resources[0].end = end;
-+}
-+
- static int __init bcm63xx_detect_flash_type(void)
- {
- u32 val;
-@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void)
-
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
-- /* read base address of boot chip select (0) */
-- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-- val &= MPI_CSBASE_BASE_MASK;
-
-- mtd_resources[0].start = val;
-- mtd_resources[0].end = 0x1FFFFFFF;
-+ if (!mtd_resources[0].start) {
-+ /* read base address of boot chip select (0) */
-+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ val &= MPI_CSBASE_BASE_MASK;
-+
-+ mtd_resources[0].start = val;
-+ mtd_resources[0].end = 0x1FFFFFFF;
-+ }
-
- return platform_device_register(&mtd_dev);
- case BCM63XX_FLASH_TYPE_SERIAL:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -9,6 +9,8 @@ enum {
-
- void bcm63xx_flash_detect(void);
-
-+void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
-+
- int __init bcm63xx_flash_register(void);
-
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:31:12 +0200
-Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own
- unit
-
-In preparation for enhancing it, move it into its own file. Require a
-mac address to be passed as the argument to always "reserve" the mac
-regardless of the inclusion state of SSB.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 53 ++--------------
- arch/mips/bcm63xx/sprom.c | 70 ++++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 ++
- 4 files changed, 83 insertions(+), 48 deletions(-)
- create mode 100644 arch/mips/bcm63xx/sprom.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
- dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
-- usb-common.o
-+ usb-common.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -40,44 +40,6 @@
- static struct board_info board;
-
- /*
-- * Register a sane SPROMv2 to make the on-board
-- * bcm4318 WLAN work
-- */
--#ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-- .revision = 0x02,
-- .board_rev = 0x17,
-- .country_code = 0x0,
-- .ant_available_bg = 0x3,
-- .pa0b0 = 0x15ae,
-- .pa0b1 = 0xfa85,
-- .pa0b2 = 0xfe8d,
-- .pa1b0 = 0xffff,
-- .pa1b1 = 0xffff,
-- .pa1b2 = 0xffff,
-- .gpio0 = 0xff,
-- .gpio1 = 0xff,
-- .gpio2 = 0xff,
-- .gpio3 = 0xff,
-- .maxpwr_bg = 0x004c,
-- .itssi_bg = 0x00,
-- .boardflags_lo = 0x2848,
-- .boardflags_hi = 0x0000,
--};
--
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--{
-- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-- return 0;
-- } else {
-- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-- return -EINVAL;
-- }
--}
--#endif
--
--/*
- * return board name for /proc/cpuinfo
- */
- const char *board_get_name(void)
-@@ -180,6 +142,7 @@ static struct platform_device bcm63xx_gp
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-+ u8 mac[ETH_ALEN];
-
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-@@ -224,15 +187,10 @@ int __init board_register_devices(void)
- /* Generate MAC address for WLAN and register our SPROM,
- * do this after registering enet devices
- */
--#ifdef CONFIG_SSB_PCIHOST
-- if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
-- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- if (ssb_arch_register_fallback_sprom(
-- &bcm63xx_get_fallback_sprom) < 0)
-- pr_err(PFX "failed to register fallback SPROM\n");
-- }
--#endif
-+
-+ if (board_get_mac_address(mac) ||
-+ bcm63xx_register_fallback_sprom(mac))
-+ pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
-
---- /dev/null
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -0,0 +1,70 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/ssb/ssb.h>
-+#include <bcm63xx_fallback_sprom.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX "sprom: "
-+
-+/*
-+ * Register a sane SPROMv2 to make the on-board
-+ * bcm4318 WLAN work
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+static struct ssb_sprom bcm63xx_sprom = {
-+ .revision = 0x02,
-+ .board_rev = 0x17,
-+ .country_code = 0x0,
-+ .ant_available_bg = 0x3,
-+ .pa0b0 = 0x15ae,
-+ .pa0b1 = 0xfa85,
-+ .pa0b2 = 0xfe8d,
-+ .pa1b0 = 0xffff,
-+ .pa1b1 = 0xffff,
-+ .pa1b2 = 0xffff,
-+ .gpio0 = 0xff,
-+ .gpio1 = 0xff,
-+ .gpio2 = 0xff,
-+ .gpio3 = 0xff,
-+ .maxpwr_bg = 0x004c,
-+ .itssi_bg = 0x00,
-+ .boardflags_lo = 0x2848,
-+ .boardflags_hi = 0x0000,
-+};
-+
-+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->bustype == SSB_BUSTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-+
-+int __init bcm63xx_register_fallback_sprom(u8 *mac)
-+{
-+ int ret = 0;
-+
-+#ifdef CONFIG_SSB_PCIHOST
-+ memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
-+
-+ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
-+#endif
-+ return ret;
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -0,0 +1,6 @@
-+#ifndef __BCM63XX_FALLBACK_SPROM
-+#define __BCM63XX_FALLBACK_SPROM
-+
-+int bcm63xx_register_fallback_sprom(u8 *mac);
-+
-+#endif
+++ /dev/null
-From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:43:49 +0200
-Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom
-
-Similar to ethernet setup, use a platform data struct for passing
-the mac. This eliminates the requirement to allocate an array on
-stack for the mac passed.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_common.c | 6 ++----
- arch/mips/bcm63xx/sprom.c | 8 ++++----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++-
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 4 ++++
- 4 files changed, 17 insertions(+), 9 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -142,7 +142,6 @@ static struct platform_device bcm63xx_gp
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-- u8 mac[ETH_ALEN];
-
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-@@ -188,8 +187,8 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
-
-- if (board_get_mac_address(mac) ||
-- bcm63xx_register_fallback_sprom(mac))
-+ if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-+ bcm63xx_register_fallback_sprom(&board.fallback_sprom))
- pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss
- }
- #endif
-
--int __init bcm63xx_register_fallback_sprom(u8 *mac)
-+int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
- {
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-- memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-
- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
- #endif
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -1,6 +1,12 @@
- #ifndef __BCM63XX_FALLBACK_SPROM
- #define __BCM63XX_FALLBACK_SPROM
-
--int bcm63xx_register_fallback_sprom(u8 *mac);
-+#include <linux/if_ether.h>
-+
-+struct fallback_sprom_data {
-+ u8 mac_addr[ETH_ALEN];
-+};
-+
-+int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
-
- #endif
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -7,6 +7,7 @@
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_dev_dsp.h>
-+#include <bcm63xx_fallback_sprom.h>
-
- /*
- * flash mapping
-@@ -54,6 +55,9 @@ struct board_info {
-
- /* External PHY reset GPIO flags from gpio.h */
- unsigned long ephy_reset_gpio_flags;
-+
-+ /* fallback sprom config */
-+ struct fallback_sprom_data fallback_sprom;
- };
-
- #endif /* ! BOARD_BCM963XX_H_ */
+++ /dev/null
-From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:52:56 +0200
-Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional
-
-Some devices do not provide enough mac addresses to populate wifi in
-addition to ethernet.
-
-Use having pci enabled as a rough heuristic which boards should have it
-enabled.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 12 ++++++++++++
- arch/mips/bcm63xx/boards/board_common.c | 5 +++--
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 1 +
- 3 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -70,6 +70,7 @@ static struct board_info __initdata boar
- .has_uart0 = 1,
- .has_pci = 1,
- .has_usbd = 0,
-+ .use_fallback_sprom = 1,
-
- .usbd = {
- .use_fullspeed = 0,
-@@ -219,6 +220,7 @@ static struct board_info __initdata boar
- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -264,6 +266,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -324,6 +327,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -378,6 +382,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -436,6 +441,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -459,6 +465,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -477,6 +484,7 @@ static struct board_info __initdata boar
-
- .has_uart0 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
- .has_ohci0 = 1,
-
- .has_enet0 = 1,
-@@ -499,6 +507,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -525,6 +534,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -577,6 +587,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -648,6 +659,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -187,8 +187,9 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
-
-- if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-- bcm63xx_register_fallback_sprom(&board.fallback_sprom))
-+ if (board.use_fallback_sprom &&
-+ (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-+ bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
- pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -34,6 +34,7 @@ struct board_info {
- unsigned int has_dsp:1;
- unsigned int has_uart0:1;
- unsigned int has_uart1:1;
-+ unsigned int use_fallback_sprom:1;
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
+++ /dev/null
-From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:58:38 +0200
-Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom
-
-Different chips require different sprom contents, so prepare for
-supplying the appropriate sprom type.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 13 ++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 5 +++++
- 2 files changed, 17 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -22,7 +22,7 @@
- * bcm4318 WLAN work
- */
- #ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-+static __initconst struct ssb_sprom bcm63xx_default_sprom = {
- .revision = 0x02,
- .board_rev = 0x17,
- .country_code = 0x0,
-@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom =
- .boardflags_hi = 0x0000,
- };
-
-+static struct ssb_sprom bcm63xx_sprom;
-+
- int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
-@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-+ switch (data->type) {
-+ case SPROM_DEFAULT:
-+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-+ sizeof(bcm63xx_sprom));
-+ break;
-+ default:
-+ return -EINVAL;
-+ }
-+
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -3,8 +3,13 @@
-
- #include <linux/if_ether.h>
-
-+enum sprom_type {
-+ SPROM_DEFAULT, /* default fallback sprom */
-+};
-+
- struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
-+ enum sprom_type type;
- };
-
- int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+++ /dev/null
-From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:16:36 +0200
-Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms
-
-Allow using raw sprom content as templates.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 482 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss
- return -EINVAL;
- }
- }
-+
-+/* FIXME: use lib_sprom after submission upstream */
-+
-+/* Get the word-offset for a SSB_SPROM_XXX define. */
-+#define SPOFF(offset) ((offset) / sizeof(u16))
-+/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
-+#define SPEX16(_outvar, _offset, _mask, _shift) \
-+ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
-+#define SPEX32(_outvar, _offset, _mask, _shift) \
-+ out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
-+ in[SPOFF(_offset)]) & (_mask)) >> (_shift))
-+#define SPEX(_outvar, _offset, _mask, _shift) \
-+ SPEX16(_outvar, _offset, _mask, _shift)
-+
-+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
-+ do { \
-+ SPEX(_field[0], _offset + 0, _mask, _shift); \
-+ SPEX(_field[1], _offset + 2, _mask, _shift); \
-+ SPEX(_field[2], _offset + 4, _mask, _shift); \
-+ SPEX(_field[3], _offset + 6, _mask, _shift); \
-+ SPEX(_field[4], _offset + 8, _mask, _shift); \
-+ SPEX(_field[5], _offset + 10, _mask, _shift); \
-+ SPEX(_field[6], _offset + 12, _mask, _shift); \
-+ SPEX(_field[7], _offset + 14, _mask, _shift); \
-+ } while (0)
-+
-+
-+static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
-+ u16 mask, u16 shift)
-+{
-+ u16 v;
-+ u8 gain;
-+
-+ v = in[SPOFF(SSB_SPROM1_AGAIN)];
-+ gain = (v & mask) >> shift;
-+ if (gain == 0xFF)
-+ gain = 2; /* If unset use 2dBm */
-+ if (sprom_revision == 1) {
-+ /* Convert to Q5.2 */
-+ gain <<= 2;
-+ } else {
-+ /* Q5.2 Fractional part is stored in 0xC0 */
-+ gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
-+ }
-+
-+ return (s8)gain;
-+}
-+
-+static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
-+{
-+ SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
-+ SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
-+ SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
-+ SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
-+ SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
-+ SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
-+ SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
-+ SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
-+ SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
-+ SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
-+ SSB_SPROM2_MAXP_A_LO_SHIFT);
-+}
-+
-+static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
-+{
-+ u16 loc[3];
-+
-+ if (out->revision == 3) /* rev 3 moved MAC */
-+ loc[0] = SSB_SPROM3_IL0MAC;
-+ else {
-+ loc[0] = SSB_SPROM1_IL0MAC;
-+ loc[1] = SSB_SPROM1_ET0MAC;
-+ loc[2] = SSB_SPROM1_ET1MAC;
-+ }
-+
-+ SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
-+ SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
-+ SSB_SPROM1_ETHPHY_ET1A_SHIFT);
-+ SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
-+ SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
-+ SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ if (out->revision == 1)
-+ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
-+ SSB_SPROM1_BINF_CCODE_SHIFT);
-+ SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
-+ SSB_SPROM1_BINF_ANTA_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
-+ SSB_SPROM1_BINF_ANTBG_SHIFT);
-+ SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
-+ SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
-+ SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
-+ SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
-+ SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
-+ SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
-+ SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
-+ SSB_SPROM1_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
-+ SSB_SPROM1_GPIOB_P3_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
-+ SSB_SPROM1_MAXPWR_A_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
-+ SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
-+ SSB_SPROM1_ITSSI_A_SHIFT);
-+ SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
-+ SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
-+
-+ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
-+
-+ /* Extract the antenna gain values. */
-+ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
-+ SSB_SPROM1_AGAIN_BG,
-+ SSB_SPROM1_AGAIN_BG_SHIFT);
-+ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
-+ SSB_SPROM1_AGAIN_A,
-+ SSB_SPROM1_AGAIN_A_SHIFT);
-+ if (out->revision >= 2)
-+ sprom_extract_r23(out, in);
-+}
-+
-+/* Revs 4 5 and 8 have partially shared layout */
-+static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
-+{
-+ SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
-+ SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
-+ SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
-+ SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
-+ SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
-+ SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
-+ SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
-+ SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
-+
-+ SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
-+ SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
-+ SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
-+ SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
-+ SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
-+ SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
-+ SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
-+ SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
-+
-+ SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
-+ SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
-+ SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
-+ SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
-+ SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
-+ SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
-+ SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
-+ SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
-+
-+ SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
-+ SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
-+ SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
-+ SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
-+ SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
-+ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
-+ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
-+ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
-+}
-+
-+static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
-+{
-+ u16 il0mac_offset;
-+
-+ if (out->revision == 4)
-+ il0mac_offset = SSB_SPROM4_IL0MAC;
-+ else
-+ il0mac_offset = SSB_SPROM5_IL0MAC;
-+
-+ SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
-+ SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
-+ SSB_SPROM4_ETHPHY_ET1A_SHIFT);
-+ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ if (out->revision == 4) {
-+ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
-+ } else {
-+ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
-+ }
-+ SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
-+ SSB_SPROM4_ANTAVAIL_A_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
-+ SSB_SPROM4_ANTAVAIL_BG_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
-+ SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
-+ SSB_SPROM4_ITSSI_BG_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
-+ SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
-+ SSB_SPROM4_ITSSI_A_SHIFT);
-+ if (out->revision == 4) {
-+ SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
-+ SSB_SPROM4_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
-+ SSB_SPROM4_GPIOB_P3_SHIFT);
-+ } else {
-+ SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
-+ SSB_SPROM5_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
-+ SSB_SPROM5_GPIOB_P3_SHIFT);
-+ }
-+
-+ /* Extract the antenna gain values. */
-+ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
-+ SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
-+ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
-+ SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
-+ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
-+ SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
-+ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
-+ SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
-+
-+ sprom_extract_r458(out, in);
-+
-+ /* TODO - get remaining rev 4 stuff needed */
-+}
-+
-+static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
-+{
-+ int i;
-+ u16 o;
-+ u16 pwr_info_offset[] = {
-+ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
-+ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
-+ };
-+ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
-+ ARRAY_SIZE(out->core_pwr_info));
-+
-+ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
-+ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
-+ SSB_SPROM8_ANTAVAIL_A_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
-+ SSB_SPROM8_ANTAVAIL_BG_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
-+ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
-+ SSB_SPROM8_ITSSI_BG_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
-+ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
-+ SSB_SPROM8_ITSSI_A_SHIFT);
-+ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
-+ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
-+ SSB_SPROM8_MAXP_AL_SHIFT);
-+ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
-+ SSB_SPROM8_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
-+ SSB_SPROM8_GPIOB_P3_SHIFT);
-+ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
-+ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
-+ SSB_SPROM8_TRI5G_SHIFT);
-+ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
-+ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
-+ SSB_SPROM8_TRI5GH_SHIFT);
-+ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
-+ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
-+ SSB_SPROM8_RXPO5G_SHIFT);
-+ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
-+ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
-+ SSB_SPROM8_RSSISMC2G_SHIFT);
-+ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
-+ SSB_SPROM8_RSSISAV2G_SHIFT);
-+ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
-+ SSB_SPROM8_BXA2G_SHIFT);
-+ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
-+ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
-+ SSB_SPROM8_RSSISMC5G_SHIFT);
-+ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
-+ SSB_SPROM8_RSSISAV5G_SHIFT);
-+ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
-+ SSB_SPROM8_BXA5G_SHIFT);
-+ SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
-+ SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
-+ SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
-+ SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
-+ SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
-+ SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
-+ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
-+ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
-+ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
-+ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
-+ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
-+ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
-+ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
-+ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
-+
-+ /* Extract the antenna gain values. */
-+ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
-+ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
-+ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
-+ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
-+ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
-+ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
-+ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
-+ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
-+
-+ /* Extract cores power info info */
-+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
-+ o = pwr_info_offset[i];
-+ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
-+ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
-+ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
-+ SSB_SPROM8_2G_MAXP, 0);
-+
-+ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
-+
-+ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
-+ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
-+ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
-+ SSB_SPROM8_5G_MAXP, 0);
-+ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
-+ SSB_SPROM8_5GH_MAXP, 0);
-+ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
-+ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
-+
-+ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
-+ }
-+
-+ /* Extract FEM info */
-+ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
-+ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
-+ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
-+ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
-+ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
-+
-+ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
-+ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
-+ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
-+ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
-+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
-+
-+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
-+ SSB_SPROM8_LEDDC_ON_SHIFT);
-+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
-+ SSB_SPROM8_LEDDC_OFF_SHIFT);
-+
-+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
-+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
-+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
-+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
-+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
-+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
-+
-+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
-+
-+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
-+
-+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
-+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
-+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
-+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
-+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
-+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
-+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
-+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
-+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
-+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
-+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
-+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
-+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
-+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
-+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
-+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
-+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
-+
-+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
-+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
-+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
-+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
-+
-+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
-+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
-+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
-+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
-+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
-+ SSB_SPROM8_TEMPDELTA_PHYCAL,
-+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
-+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
-+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
-+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
-+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
-+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
-+ sprom_extract_r458(out, in);
-+
-+ /* TODO - get remaining rev 8 stuff needed */
-+}
-+
-+static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size)
-+{
-+ memset(out, 0, sizeof(*out));
-+
-+ out->revision = in[size - 1] & 0x00FF;
-+ memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
-+ memset(out->et1mac, 0xFF, 6);
-+
-+ switch (out->revision) {
-+ case 1:
-+ case 2:
-+ case 3:
-+ sprom_extract_r123(out, in);
-+ break;
-+ case 4:
-+ case 5:
-+ sprom_extract_r45(out, in);
-+ break;
-+ case 8:
-+ sprom_extract_r8(out, in);
-+ break;
-+ default:
-+ pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
-+ out->revision);
-+ out->revision = 1;
-+ sprom_extract_r123(out, in);
-+ }
-+
-+ if (out->boardflags_lo == 0xFFFF)
-+ out->boardflags_lo = 0; /* per specs */
-+ if (out->boardflags_hi == 0xFFFF)
-+ out->boardflags_hi = 0; /* per specs */
-+
-+ return 0;
-+}
-+
-+static __initdata u16 template_sprom[220];
- #endif
-
-+
- int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
- {
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-+ u16 size = 0;
-+
- switch (data->type) {
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr
- return -EINVAL;
- }
-
-+ if (size > 0)
-+ sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+++ /dev/null
-From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:33:38 +0200
-Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common
- ssb cards
-
-Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 136 +++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 +
- 2 files changed, 142 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6
- .boardflags_hi = 0x0000,
- };
-
-+
-+static __initconst u16 bcm4306_sprom[] = {
-+ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4,
-+ 0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff,
-+ 0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002,
-+};
-+
-+static __initconst u16 bcm4318_sprom[] = {
-+ 0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7,
-+ 0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff,
-+ 0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002,
-+};
-+
-+static __initconst u16 bcm4321_sprom[] = {
-+ 0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36,
-+ 0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0004,
-+};
-+
-+static __initconst u16 bcm4322_sprom[] = {
-+ 0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000,
-+ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43222_sprom[] = {
-+ 0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000,
-+ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
- static struct ssb_sprom bcm63xx_sprom;
-
- int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr
- u16 size = 0;
-
- switch (data->type) {
-+ case SPROM_BCM4306:
-+ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
-+ size = ARRAY_SIZE(bcm4306_sprom);
-+ break;
-+ case SPROM_BCM4318:
-+ memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom));
-+ size = ARRAY_SIZE(bcm4318_sprom);
-+ break;
-+ case SPROM_BCM4321:
-+ memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom));
-+ size = ARRAY_SIZE(bcm4321_sprom);
-+ break;
-+ case SPROM_BCM4322:
-+ memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom));
-+ size = ARRAY_SIZE(bcm4322_sprom);
-+ break;
-+ case SPROM_BCM43222:
-+ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
-+ size = ARRAY_SIZE(bcm43222_sprom);
-+ break;
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -5,6 +5,12 @@
-
- enum sprom_type {
- SPROM_DEFAULT, /* default fallback sprom */
-+ /* SSB based */
-+ SPROM_BCM4306,
-+ SPROM_BCM4318,
-+ SPROM_BCM4321,
-+ SPROM_BCM4322,
-+ SPROM_BCM43222,
- };
-
- struct fallback_sprom_data {
+++ /dev/null
-From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:48:26 +0200
-Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma
-
-Similar to SSB, register a fallback sprom handler for BCMA.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 1 +
- arch/mips/bcm63xx/sprom.c | 40 +++++++++++++++++++++++++++++++++++-----
- 2 files changed, 36 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -4,6 +4,7 @@ menu "Board support"
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
-+ select BCMA
- default y
- help
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -12,6 +12,7 @@
- #include <linux/string.h>
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
-+#include <linux/bcma/bcma.h>
- #include <bcm63xx_fallback_sprom.h>
- #include <board_bcm963xx.h>
-
-@@ -21,7 +22,7 @@
- * Register a sane SPROMv2 to make the on-board
- * bcm4318 WLAN work
- */
--#ifdef CONFIG_SSB_PCIHOST
-+#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
- static __initconst struct ssb_sprom bcm63xx_default_sprom = {
- .revision = 0x02,
- .board_rev = 0x17,
-@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6
- .boardflags_hi = 0x0000,
- };
-
--
-+#if defined (CONFIG_SSB_PCIHOST)
- static __initconst u16 bcm4306_sprom[] = {
- 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
- 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[]
- 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
- 0xffff, 0xffff, 0xffff, 0x0008,
- };
-+#endif /* CONFIG_SSB_PCIHOST */
-
- static struct ssb_sprom bcm63xx_sprom;
-
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+#if defined(CONFIG_SSB_PCIHOST)
-+int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss
- return -EINVAL;
- }
- }
-+#endif
-+
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-
- /* FIXME: use lib_sprom after submission upstream */
-
-@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr
- {
- int ret = 0;
-
--#ifdef CONFIG_SSB_PCIHOST
-+#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
- u16 size = 0;
-
- switch (data->type) {
-+#if defined(CONFIG_SSB_PCIHOST)
- case SPROM_BCM4306:
- memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
- size = ARRAY_SIZE(bcm4306_sprom);
-@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr
- memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
- size = ARRAY_SIZE(bcm43222_sprom);
- break;
-+#endif
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
-@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-+#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
-+
-+#if defined(CONFIG_SSB_PCIHOST)
-+ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom);
-+ if (ret)
-+ return ret;
-+
-+#endif
-
-- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+ ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom);
-+ if (ret)
-+ return ret;
- #endif
- return ret;
- }
+++ /dev/null
-From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 30 Jul 2014 23:14:27 +0200
-Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates
-
-Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227,
-BCM43228, and BCM4331.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 256 +++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +
- 2 files changed, 264 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[]
- };
- #endif /* CONFIG_SSB_PCIHOST */
-
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+static __initconst u16 bcm4313_sprom[] = {
-+ 0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201,
-+ 0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000,
-+ 0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0008,
-+};
-+
-+static __initconst u16 bcm43131_sprom[] = {
-+ 0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202,
-+ 0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43217_sprom[] = {
-+ 0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x7a08,
-+};
-+
-+static __initconst u16 bcm43225_sprom[] = {
-+ 0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555,
-+ 0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43227_sprom[] = {
-+ 0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43228_sprom[] = {
-+ 0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215,
-+ 0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c,
-+ 0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000,
-+ 0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446,
-+ 0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888,
-+ 0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xf008,
-+};
-+
-+static __initconst u16 bcm4331_sprom[] = {
-+ 0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202,
-+ 0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657,
-+ 0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000,
-+ 0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d,
-+ 0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000,
-+ 0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4,
-+ 0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0009,
-+};
-+
-+#endif /* CONFIG_BCMA_HOST_PCI */
-+
- static struct ssb_sprom bcm63xx_sprom;
-
- #if defined(CONFIG_SSB_PCIHOST)
-@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr
- size = ARRAY_SIZE(bcm43222_sprom);
- break;
- #endif
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+ case SPROM_BCM4313:
-+ memcpy(&template_sprom, &bcm4313_sprom,
-+ sizeof(bcm4313_sprom));
-+ size = ARRAY_SIZE(bcm4313_sprom);
-+ break;
-+ case SPROM_BCM43131:
-+ memcpy(&template_sprom, &bcm43131_sprom,
-+ sizeof(bcm43131_sprom));
-+ size = ARRAY_SIZE(bcm43131_sprom);
-+ break;
-+ case SPROM_BCM43217:
-+ memcpy(&template_sprom, &bcm43217_sprom,
-+ sizeof(bcm43217_sprom));
-+ size = ARRAY_SIZE(bcm43217_sprom);
-+ break;
-+ case SPROM_BCM43225:
-+ memcpy(&template_sprom, &bcm43225_sprom,
-+ sizeof(bcm43225_sprom));
-+ size = ARRAY_SIZE(bcm43225_sprom);
-+ break;
-+ case SPROM_BCM43227:
-+ memcpy(&template_sprom, &bcm43227_sprom,
-+ sizeof(bcm43227_sprom));
-+ size = ARRAY_SIZE(bcm43227_sprom);
-+ break;
-+ case SPROM_BCM43228:
-+ memcpy(&template_sprom, &bcm43228_sprom,
-+ sizeof(bcm43228_sprom));
-+ size = ARRAY_SIZE(bcm43228_sprom);
-+ break;
-+ case SPROM_BCM4331:
-+ memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom));
-+ size = ARRAY_SIZE(bcm4331_sprom);
-+ break;
-+#endif
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -11,6 +11,14 @@ enum sprom_type {
- SPROM_BCM4321,
- SPROM_BCM4322,
- SPROM_BCM43222,
-+ /* BCMA based */
-+ SPROM_BCM4313,
-+ SPROM_BCM43131,
-+ SPROM_BCM43217,
-+ SPROM_BCM43225,
-+ SPROM_BCM43227,
-+ SPROM_BCM43228,
-+ SPROM_BCM4331,
- };
-
- struct fallback_sprom_data {
+++ /dev/null
-From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 31 Jul 2014 19:12:33 +0200
-Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom
- fixups
-
-Allow board_info files to supply fixups for the base sproms to adapt
-them to the actual used sprom contents in case they do not use the
-default ones.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 14 +++++++++++++-
- .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 ++++++++
- 2 files changed, 21 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro
- return 0;
- }
-
-+void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n)
-+{
-+ unsigned int i;
-+
-+ for (i = 0; i < n; i++)
-+ sprom[fixups[i].offset] = fixups[i].value;
-+}
-+
- static __initdata u16 template_sprom[220];
- #endif
-
-@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr
- return -EINVAL;
- }
-
-- if (size > 0)
-+ if (size > 0) {
-+ sprom_apply_fixups(template_sprom, data->board_fixups,
-+ data->num_board_fixups);
-+
- sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+ }
-
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -21,9 +21,17 @@ enum sprom_type {
- SPROM_BCM4331,
- };
-
-+struct sprom_fixup {
-+ u16 offset;
-+ u16 value;
-+};
-+
- struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
- enum sprom_type type;
-+
-+ struct sprom_fixup *board_fixups;
-+ unsigned int num_board_fixups;
- };
-
- int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+++ /dev/null
-From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 31 Jul 2014 20:39:44 +0200
-Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for
- fallback sprom
-
-Warn if the set pci bus/slot does not match the actual request.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 31 ++++++++++++++++++----
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 3 +++
- 2 files changed, 29 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] =
-
- #endif /* CONFIG_BCMA_HOST_PCI */
-
--static struct ssb_sprom bcm63xx_sprom;
-+struct fallback_sprom_match {
-+ u8 pci_bus;
-+ u8 pci_dev;
-+ struct ssb_sprom sprom;
-+};
-+
-+static struct fallback_sprom_match fallback_sprom;
-
- #if defined(CONFIG_SSB_PCIHOST)
- int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
-+ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
-+ pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ bus->host_pci->bus->number,
-+ PCI_SLOT(bus->host_pci->devfn));
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
- return 0;
- } else {
- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc
- int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
- {
- if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
-+ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
-+ pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ bus->host_pci->bus->number,
-+ PCI_SLOT(bus->host_pci->devfn));
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
- return 0;
- } else {
- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr
- break;
- #endif
- case SPROM_DEFAULT:
-- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-- sizeof(bcm63xx_sprom));
-+ memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom,
-+ sizeof(bcm63xx_default_sprom));
- break;
- default:
- return -EINVAL;
-@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr
- sprom_apply_fixups(template_sprom, data->board_fixups,
- data->num_board_fixups);
-
-- sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+ sprom_extract(&fallback_sprom.sprom, template_sprom, size);
- }
-
-- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN);
-+
-+ fallback_sprom.pci_bus = data->pci_bus;
-+ fallback_sprom.pci_dev = data->pci_dev;
- #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
-
- #if defined(CONFIG_SSB_PCIHOST)
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -30,6 +30,9 @@ struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
- enum sprom_type type;
-
-+ u8 pci_bus;
-+ u8 pci_dev;
-+
- struct sprom_fixup *board_fixups;
- unsigned int num_board_fixups;
- };
+++ /dev/null
-From 26546e5499d98616322fb3472b977e2e86603f3a Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 24 Jun 2014 10:57:51 +0200
-Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 4 ++++
- arch/mips/bcm63xx/boards/board_common.c | 34 +++++++++++++++++++++++++++++++
- arch/mips/bcm63xx/prom.c | 6 ++++++
- 3 files changed, 44 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -1,6 +1,10 @@
- menu "Board support"
- depends on BCM63XX
-
-+config BOARD_BCM63XX_DT
-+ bool "Device Tree boards (experimential)"
-+ select USE_OF
-+
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -10,11 +10,14 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
-+#include <linux/of_fdt.h>
-+#include <linux/of_platform.h>
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
- #include <asm/bootinfo.h>
- #include <asm/fw/cfe/cfe_api.h>
-+#include <asm/prom.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_uart.h>
-@@ -126,8 +129,23 @@ void __init board_setup(void)
- /* make sure we're running on expected cpu */
- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
- panic("unexpected CPU for bcm963xx board");
-+
-+#if CONFIG_OF
-+ if (initial_boot_params)
-+ __dt_setup_arch(initial_boot_params);
-+#endif
- }
-
-+#if CONFIG_OF
-+void __init device_tree_init(void)
-+{
-+ if (!initial_boot_params)
-+ return;
-+
-+ unflatten_and_copy_device_tree();
-+}
-+#endif
-+
- static struct gpio_led_platform_data bcm63xx_led_data;
-
- static struct platform_device bcm63xx_gpio_leds = {
-@@ -136,6 +154,13 @@ static struct platform_device bcm63xx_gp
- .dev.platform_data = &bcm63xx_led_data,
- };
-
-+#if CONFIG_OF
-+static struct of_device_id of_ids[] = {
-+ { /* filled at runtime */ },
-+ { .compatible = "simple-bus" },
-+ { },
-+};
-+#endif
- /*
- * third stage init callback, register all board devices.
- */
-@@ -143,6 +168,15 @@ int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-
-+#if CONFIG_OF
-+ if (of_have_populated_dt()) {
-+ snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible),
-+ "brcm,bcm%x", bcm63xx_get_cpu_id());
-+
-+ of_platform_populate(NULL, of_ids, NULL, NULL);
-+ }
-+#endif
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -8,6 +8,7 @@
-
- #include <linux/init.h>
- #include <linux/bootmem.h>
-+#include <linux/of_fdt.h>
- #include <linux/smp.h>
- #include <asm/bootinfo.h>
- #include <asm/bmips.h>
-@@ -23,6 +24,11 @@ void __init prom_init(void)
- {
- u32 reg, mask;
-
-+#if CONFIG_OF
-+ if (fw_passed_dtb)
-+ early_init_dt_verify((void *)fw_passed_dtb);
-+#endif
-+
- bcm63xx_cpu_init();
-
- /* stop any running watchdog */
+++ /dev/null
-From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 26 Jun 2014 12:51:00 +0200
-Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info
- by dtb
-
-Allow using the passed dtb's compatible property to match board_info
-structs instead of nvram's boardname field, which is not unique anyway.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 +++++++++++++++
- arch/mips/bcm63xx/boards/board_common.c | 18 ++++++++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 3 +++
- 3 files changed, 36 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -711,6 +711,10 @@ static const struct board_info __initcon
- #endif
- };
-
-+static struct of_device_id const bcm963xx_boards_dt[] = {
-+ { },
-+};
-+
- /*
- * early init callback, read nvram data from flash and checksum it
- */
-@@ -722,6 +726,7 @@ void __init board_bcm963xx_init(void)
- char *board_name = NULL;
- u32 val;
- struct bcm_hcs *hcs;
-+ const struct of_device_id *board_match;
-
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
-@@ -761,6 +766,16 @@ void __init board_bcm963xx_init(void)
- } else {
- board_name = bcm63xx_nvram_get_name();
- }
-+
-+ /* find board by compat */
-+ board_match = bcm63xx_match_board(bcm963xx_boards_dt);
-+ if (board_match) {
-+ board_early_setup(board_match->data,
-+ bcm63xx_nvram_get_mac_address);
-+
-+ return;
-+ }
-+
- /* find board by name */
- for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -243,3 +243,21 @@ int __init board_register_devices(void)
-
- return 0;
- }
-+
-+const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m)
-+{
-+ const struct of_device_id *match;
-+ unsigned long dt_root;
-+
-+ if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params)
-+ return NULL;
-+
-+ dt_root = of_get_flat_dt_root();
-+
-+ for (match = m; match->compatible[0]; match++) {
-+ if (of_flat_dt_is_compatible(dt_root, match->compatible))
-+ return match;
-+ }
-+
-+ return NULL;
-+}
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -1,11 +1,14 @@
- #ifndef __BOARD_COMMON_H
- #define __BOARD_COMMON_H
-
-+#include <linux/of.h>
- #include <board_bcm963xx.h>
-
- void board_early_setup(const struct board_info *board,
- int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
-+const struct of_device_id *bcm63xx_match_board(const struct of_device_id *);
-+
- #if defined(CONFIG_BOARD_BCM963XX)
- void board_bcm963xx_init(void);
- #else
+++ /dev/null
-From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 21 Nov 2014 16:54:06 +0100
-Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info
- list
-
-Populate the compatible to board_info list to allow dtbs to be used
-for known boards.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 34 +++++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -712,6 +712,48 @@ static const struct board_info __initcon
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-+#ifdef CONFIG_OF
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6338
-+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
-+ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6345
-+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
-+ { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
-+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
-+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
-+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
-+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
-+ { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
-+ { .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
-+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
-+ { .compatible = "usr,9108", .data = &board_96348gw_a, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6358
-+ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
-+ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
-+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+#endif
-+#endif /* CONFIG_OF */
- { },
- };
-
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -144,6 +144,18 @@ void __init device_tree_init(void)
-
- unflatten_and_copy_device_tree();
- }
-+
-+int board_of_device_present(const char *alias)
-+{
-+ bool present;
-+ struct device_node *np;
-+
-+ np = of_find_node_by_path(alias);
-+ present = of_device_is_available(np);
-+ of_node_put(np);
-+
-+ return present;
-+}
- #endif
-
- static struct gpio_led_platform_data bcm63xx_led_data;
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -15,4 +15,13 @@ void board_bcm963xx_init(void);
- static inline void board_bcm963xx_init(void) { }
- #endif
-
-+#if defined(CONFIG_OF)
-+int board_of_device_present(const char *alias);
-+#else
-+static inline void board_of_device_present(const char *alias)
-+{
-+ return 0;
-+}
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -23,6 +23,8 @@
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
-
-+#include "boards/board_common.h"
-+
- static int flash_type;
-
- static struct mtd_partition mtd_partitions[] = {
-@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void)
-
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
-+ /* don't register when already registered through from dtb */
-+ if (board_of_device_present("pflash"))
-+ return 0;
-
- if (!mtd_resources[0].start) {
- /* read base address of boot chip select (0) */
+++ /dev/null
-From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 1 Dec 2014 00:20:07 +0100
-Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -15,6 +15,8 @@
- #include <linux/irqchip.h>
- #include <linux/irqchip/irq-bcm6345-ext.h>
- #include <linux/irqchip/irq-bcm6345-periph.h>
-+#include <linux/of.h>
-+#include <linux/of_fdt.h>
- #include <asm/irq_cpu.h>
- #include <asm/mipsregs.h>
- #include <bcm63xx_cpu.h>
-@@ -22,6 +24,9 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
-
-+IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
-+ mips_cpu_irq_of_init);
-+
- void __init arch_init_irq(void)
- {
- void __iomem *periph_bases[2];
-@@ -30,6 +35,13 @@ void __init arch_init_irq(void)
- int periph_irqs[2] = { 2, 3 };
- int ext_irqs[6];
-
-+#ifdef CONFIG_OF
-+ if (initial_boot_params) {
-+ irqchip_init();
-+ return;
-+ }
-+#endif
-+
- periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
- periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
- ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+++ /dev/null
-From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 20 Feb 2015 19:55:32 +0100
-Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx
-
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/gpio/Kconfig | 8 +++
- drivers/gpio/Makefile | 1 +
- drivers/gpio/gpio-bcm63xx.c | 135 +++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 131 insertions(+)
- create mode 100644 drivers/gpio/gpio-bcm63xx.c
-
---- a/drivers/gpio/Kconfig
-+++ b/drivers/gpio/Kconfig
-@@ -133,6 +133,13 @@ config GPIO_BCM_KONA
- help
- Turn on GPIO support for Broadcom "Kona" chips.
-
-+config GPIO_BCM63XX
-+ bool "Broadcom BCM63XX GPIO"
-+ depends on MIPS || COMPILE_TEST
-+ select GPIO_GENERIC
-+ help
-+ Turn on GPIO support for Broadcom BCM63XX xDSL chips.
-+
- config GPIO_BRCMSTB
- tristate "BRCMSTB GPIO support"
- default y if ARCH_BRCMSTB
---- a/drivers/gpio/Makefile
-+++ b/drivers/gpio/Makefile
-@@ -24,6 +24,7 @@ obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o
- obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
- obj-$(CONFIG_ATH79) += gpio-ath79.o
- obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
-+obj-$(CONFIG_GPIO_BCM63XX) += gpio-bcm63xx.o
- obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
- obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
- obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o
---- /dev/null
-+++ b/drivers/gpio/gpio-bcm63xx.c
-@@ -0,0 +1,135 @@
-+/*
-+ * Driver for BCM63XX memory-mapped GPIO controllers, based on
-+ * Generic driver for memory-mapped GPIO controllers.
-+ *
-+ * Copyright 2008 MontaVista Software, Inc.
-+ * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
-+ * Copyright 2015 Jonas Gorski <jogo@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/err.h>
-+#include <linux/bug.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/spinlock.h>
-+#include <linux/compiler.h>
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+#include <linux/log2.h>
-+#include <linux/ioport.h>
-+#include <linux/io.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+#include <linux/mod_devicetable.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_gpio.h>
-+
-+static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
-+{
-+ char irq_name[7]; /* "gpioXX" */
-+
-+ sprintf(irq_name, "gpio%d", gpio);
-+ return of_irq_get_byname(chip->of_node, irq_name);
-+}
-+
-+static int bcm63xx_gpio_probe(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct resource *dat_r, *dirout_r;
-+ void __iomem *dat;
-+ void __iomem *dirout;
-+ unsigned long sz;
-+ int err;
-+ struct gpio_chip *gc;
-+ struct bgpio_pdata *pdata = dev_get_platdata(dev);
-+
-+ dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+ if (!dat_r || !dirout_r)
-+ return -EINVAL;
-+
-+ if (resource_size(dat_r) != resource_size(dirout_r))
-+ return -EINVAL;
-+
-+ sz = resource_size(dat_r);
-+
-+ dat = devm_ioremap_resource(dev, dat_r);
-+ if (IS_ERR(dat))
-+ return PTR_ERR(dat);
-+
-+ dirout = devm_ioremap_resource(dev, dirout_r);
-+ if (IS_ERR(dirout))
-+ return PTR_ERR(dirout);
-+
-+ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
-+ if (!gc)
-+ return -ENOMEM;
-+
-+ err = bgpio_init(gc, dev, sz, dat, NULL, NULL, dirout, NULL,
-+ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
-+ if (err)
-+ return err;
-+
-+ platform_set_drvdata(pdev, gc);
-+
-+ if (dev->of_node) {
-+ int id = of_alias_get_id(dev->of_node, "gpio");
-+ u32 ngpios;
-+
-+ if (id >= 0)
-+ gc->label = devm_kasprintf(dev, GFP_KERNEL,
-+ "bcm63xx-gpio.%d", id);
-+
-+ if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios))
-+ gc->ngpio = ngpios;
-+
-+ if (of_get_property(dev->of_node, "interrupt-names", NULL))
-+ gc->to_irq = bcm63xx_gpio_to_irq;
-+
-+ } else if (pdata) {
-+ gc->base = pdata->base;
-+ if (pdata->ngpio > 0)
-+ gc->ngpio = pdata->ngpio;
-+ }
-+
-+ return gpiochip_add(gc);
-+}
-+
-+static int bcm63xx_gpio_remove(struct platform_device *pdev)
-+{
-+ struct gpio_chip *gc = platform_get_drvdata(pdev);
-+
-+ gpiochip_remove(gc);
-+ return 0;
-+}
-+
-+#ifdef CONFIG_OF
-+static struct of_device_id bcm63xx_gpio_of_match[] = {
-+ { .compatible = "brcm,bcm6345-gpio" },
-+ { },
-+};
-+#endif
-+
-+static struct platform_driver bcm63xx_gpio_driver = {
-+ .probe = bcm63xx_gpio_probe,
-+ .remove = bcm63xx_gpio_remove,
-+ .driver = {
-+ .name = "bcm63xx-gpio",
-+ .of_match_table = of_match_ptr(bcm63xx_gpio_of_match),
-+ },
-+};
-+
-+module_platform_driver(bcm63xx_gpio_driver);
-+
-+MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers");
-+MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
-+MODULE_LICENSE("GPL");
+++ /dev/null
-From cc99dca188bb63ba390008e2f7fa62d0300233e0 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 20 Feb 2015 23:58:54 +0100
-Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_common.c | 2 +
- arch/mips/bcm63xx/gpio.c | 147 +++++++------------------------
- arch/mips/bcm63xx/setup.c | 3 -
- 3 files changed, 33 insertions(+), 119 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -189,6 +189,8 @@ int __init board_register_devices(void)
- }
- #endif
-
-+ bcm63xx_gpio_init();
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -5,147 +5,62 @@
- *
- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
- * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
-+ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
- */
-
- #include <linux/kernel.h>
--#include <linux/module.h>
--#include <linux/spinlock.h>
- #include <linux/platform_device.h>
-+#include <linux/gpio/driver.h>
- #include <linux/gpio.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_gpio.h>
--#include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-
--static u32 gpio_out_low_reg;
--
--static void bcm63xx_gpio_out_low_reg_init(void)
-+static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
- {
-- switch (bcm63xx_get_cpu_id()) {
-- case BCM6345_CPU_ID:
-- gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
-- break;
-- default:
-- gpio_out_low_reg = GPIO_DATA_LO_REG;
-- break;
-- }
--}
--
--static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
--static u32 gpio_out_low, gpio_out_high;
-+ struct resource res[2];
-+ struct bgpio_pdata pdata;
-
--static void bcm63xx_gpio_set(struct gpio_chip *chip,
-- unsigned gpio, int val)
--{
-- u32 reg;
-- u32 mask;
-- u32 *v;
-- unsigned long flags;
--
-- if (gpio >= chip->ngpio)
-- BUG();
--
-- if (gpio < 32) {
-- reg = gpio_out_low_reg;
-- mask = 1 << gpio;
-- v = &gpio_out_low;
-- } else {
-- reg = GPIO_DATA_HI_REG;
-- mask = 1 << (gpio - 32);
-- v = &gpio_out_high;
-- }
--
-- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
-- if (val)
-- *v |= mask;
-- else
-- *v &= ~mask;
-- bcm_gpio_writel(*v, reg);
-- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
--}
-+ memset(res, 0, sizeof(res));
-+ memset(&pdata, 0, sizeof(pdata));
-
--static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
--{
-- u32 reg;
-- u32 mask;
-+ res[0].flags = IORESOURCE_MEM;
-+ res[0].start = bcm63xx_regset_address(RSET_GPIO);
-+ res[0].start += dir;
-
-- if (gpio >= chip->ngpio)
-- BUG();
-+ res[0].end = res[0].start + 3;
-
-- if (gpio < 32) {
-- reg = gpio_out_low_reg;
-- mask = 1 << gpio;
-- } else {
-- reg = GPIO_DATA_HI_REG;
-- mask = 1 << (gpio - 32);
-- }
-+ res[1].flags = IORESOURCE_MEM;
-+ res[1].start = bcm63xx_regset_address(RSET_GPIO);
-+ res[1].start += data;
-
-- return !!(bcm_gpio_readl(reg) & mask);
--}
-+ res[1].end = res[1].start + 3;
-
--static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
-- unsigned gpio, int dir)
--{
-- u32 reg;
-- u32 mask;
-- u32 tmp;
-- unsigned long flags;
--
-- if (gpio >= chip->ngpio)
-- BUG();
--
-- if (gpio < 32) {
-- reg = GPIO_CTL_LO_REG;
-- mask = 1 << gpio;
-- } else {
-- reg = GPIO_CTL_HI_REG;
-- mask = 1 << (gpio - 32);
-- }
--
-- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
-- tmp = bcm_gpio_readl(reg);
-- if (dir == BCM63XX_GPIO_DIR_IN)
-- tmp &= ~mask;
-- else
-- tmp |= mask;
-- bcm_gpio_writel(tmp, reg);
-- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
-+ pdata.base = id * 32;
-+ pdata.ngpio = ngpio;
-
-- return 0;
-+ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
-+ &pdata, sizeof(pdata));
- }
-
--static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
-+int __init bcm63xx_gpio_init(void)
- {
-- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
--}
-+ int ngpio = bcm63xx_gpio_count();
-+ int data_low_reg;
-
--static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
-- unsigned gpio, int value)
--{
-- bcm63xx_gpio_set(chip, gpio, value);
-- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
--}
-+ if (BCMCPU_IS_6345())
-+ data_low_reg = GPIO_DATA_LO_REG_6345;
-+ else
-+ data_low_reg = GPIO_DATA_LO_REG;
-
-+ bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32));
-
--static struct gpio_chip bcm63xx_gpio_chip = {
-- .label = "bcm63xx-gpio",
-- .direction_input = bcm63xx_gpio_direction_input,
-- .direction_output = bcm63xx_gpio_direction_output,
-- .get = bcm63xx_gpio_get,
-- .set = bcm63xx_gpio_set,
-- .base = 0,
--};
-+ if (ngpio <= 32)
-+ return 0;
-
--int __init bcm63xx_gpio_init(void)
--{
-- bcm63xx_gpio_out_low_reg_init();
-+ bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32);
-
-- gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
-- if (!BCMCPU_IS_6345())
-- gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
-- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
-- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
-+ return 0;
-
-- return gpiochip_add(&bcm63xx_gpio_chip);
- }
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -164,9 +164,6 @@ void __init plat_mem_setup(void)
-
- int __init bcm63xx_register_devices(void)
- {
-- /* register gpiochip */
-- bcm63xx_gpio_init();
--
- return board_register_devices();
- }
-
+++ /dev/null
-From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Feb 2015 17:21:59 +0100
-Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio
-
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 7 +++--
- arch/mips/bcm63xx/gpio.c | 32 ++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 ++
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 5 +--
- 5 files changed, 42 insertions(+), 6 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -55,7 +55,7 @@ static struct board_info __initdata boar
- },
-
- .ephy_reset_gpio = 36,
-- .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
- #endif
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -251,9 +251,10 @@ int __init board_register_devices(void)
-
- platform_device_register(&bcm63xx_gpio_leds);
-
-- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-- gpio_request_one(board.ephy_reset_gpio,
-- board.ephy_reset_gpio_flags, "ephy-reset");
-+ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) {
-+ bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio,
-+ board.ephy_reset_gpio_flags);
-+ }
-
- return 0;
- }
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -8,15 +8,23 @@
- * Copyright (C) Jonas Gorski <jogo@openwrt.org>
- */
-
-+#include <asm/addrspace.h>
-+
- #include <linux/kernel.h>
- #include <linux/platform_device.h>
- #include <linux/gpio/driver.h>
- #include <linux/gpio.h>
-+#include <linux/gpio/machine.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_regs.h>
-
-+static const char * const gpio_chip_labels[] = {
-+ "bcm63xx-gpio.0",
-+ "bcm63xx-gpio.1",
-+};
-+
- static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
- {
- struct resource res[2];
-@@ -64,3 +72,25 @@ int __init bcm63xx_gpio_init(void)
- return 0;
-
- }
-+
-+static struct gpiod_lookup_table ephy_reset = {
-+ .dev_id = "bcm63xx_enet-0",
-+ .table = {
-+ { /* filled at runtime */ },
-+ { },
-+ },
-+};
-+
-+
-+void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags)
-+{
-+ if (ephy_reset.table[0].chip_label)
-+ return;
-+
-+ ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32];
-+ ephy_reset.table[0].chip_hwnum = hw_gpio % 32;
-+ ephy_reset.table[0].con_id = "reset";
-+ ephy_reset.table[0].flags = flags;
-+
-+ gpiod_add_lookup_table(&ephy_reset);
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -2,9 +2,11 @@
- #define BCM63XX_GPIO_H
-
- #include <linux/init.h>
-+#include <linux/gpio/machine.h>
- #include <bcm63xx_cpu.h>
-
- int __init bcm63xx_gpio_init(void);
-+void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags);
-
- static inline unsigned long bcm63xx_gpio_count(void)
- {
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -3,6 +3,7 @@
-
- #include <linux/types.h>
- #include <linux/gpio.h>
-+#include <linux/gpio/machine.h>
- #include <linux/leds.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -54,8 +55,8 @@ struct board_info {
- /* External PHY reset GPIO */
- unsigned int ephy_reset_gpio;
-
-- /* External PHY reset GPIO flags from gpio.h */
-- unsigned long ephy_reset_gpio_flags;
-+ /* External PHY reset GPIO flags from gpio/machine.h */
-+ enum gpio_lookup_flags ephy_reset_gpio_flags;
-
- /* fallback sprom config */
- struct fallback_sprom_data fallback_sprom;
+++ /dev/null
-From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Feb 2015 17:26:50 +0100
-Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if
-present in dtb
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/gpio.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -20,6 +20,8 @@
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_regs.h>
-
-+#include "boards/board_common.h"
-+
- static const char * const gpio_chip_labels[] = {
- "bcm63xx-gpio.0",
- "bcm63xx-gpio.1",
-@@ -48,8 +50,10 @@ static void __init bcm63xx_gpio_init_one
- pdata.base = id * 32;
- pdata.ngpio = ngpio;
-
-- platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
-- &pdata, sizeof(pdata));
-+ if (!board_of_device_present("gpio0") &&
-+ !board_of_device_present("pinctrl"))
-+ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res,
-+ 2, &pdata, sizeof(pdata));
- }
-
- int __init bcm63xx_gpio_init(void)
+++ /dev/null
-From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 25 Mar 2015 13:52:02 +0100
-Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia
- ready gpio
-
-To prepare for a time when gpiobases don't need to be fixed anymore.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-pcmcia.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-pcmcia.c
-+++ b/arch/mips/bcm63xx/dev-pcmcia.c
-@@ -10,6 +10,7 @@
- #include <linux/kernel.h>
- #include <asm/bootinfo.h>
- #include <linux/platform_device.h>
-+#include <linux/gpio/machine.h>
- #include <bcm63xx_cs.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_pcmcia.h>
-@@ -101,6 +102,14 @@ static const struct {
- },
- };
-
-+static struct gpiod_lookup_table pcmcia_gpios_table = {
-+ .dev_id = "bcm63xx_pcmcia.0",
-+ .table = {
-+ GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH),
-+ { },
-+ },
-+};
-+
- int __init bcm63xx_pcmcia_register(void)
- {
- int ret, i;
-@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void)
- switch (bcm63xx_get_cpu_id()) {
- case BCM6348_CPU_ID:
- pd.ready_gpio = 22;
-+ pcmcia_gpios_table.table[0].chip_hwnum = 22;
- break;
-
- case BCM6358_CPU_ID:
- pd.ready_gpio = 18;
-+ pcmcia_gpios_table.table[0].chip_hwnum = 18;
- break;
-
- default:
- return -ENODEV;
- }
-
-+ gpiod_add_lookup_table(&pcmcia_gpios_table);
-+
- pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
- pcmcia_resources[0].end = pcmcia_resources[0].start +
- RSET_PCMCIA_SIZE - 1;
+++ /dev/null
-From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 25 Mar 2015 13:54:56 +0100
-Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio
-
-Use the new named gpio instead of relying on the hardware gpio numbers
-matching the virtual gpio numbers.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/pcmcia/bcm63xx_pcmcia.c | 9 ++++++++-
- drivers/pcmcia/bcm63xx_pcmcia.h | 4 ++++
- 2 files changed, 12 insertions(+), 1 deletion(-)
-
---- a/drivers/pcmcia/bcm63xx_pcmcia.c
-+++ b/drivers/pcmcia/bcm63xx_pcmcia.c
-@@ -237,7 +237,7 @@ static unsigned int __get_socket_status(
- stat |= SS_XVCARD;
- stat |= SS_POWERON;
-
-- if (gpio_get_value(skt->pd->ready_gpio))
-+ if (gpiod_get_value(skt->ready_gpio))
- stat |= SS_READY;
-
- return stat;
-@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru
- goto err;
- }
-
-+ /* get ready gpio */
-+ skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN);
-+ if (IS_ERR(skt->ready_gpio)) {
-+ ret = PTR_ERR(skt->ready_gpio);
-+ goto err;
-+ }
-+
- /* resources are static */
- sock->resource_ops = &pccard_static_ops;
- sock->ops = &bcm63xx_pcmcia_operations;
---- a/drivers/pcmcia/bcm63xx_pcmcia.h
-+++ b/drivers/pcmcia/bcm63xx_pcmcia.h
-@@ -3,6 +3,7 @@
-
- #include <linux/types.h>
- #include <linux/timer.h>
-+#include <linux/gpio/consumer.h>
- #include <pcmcia/ss.h>
- #include <bcm63xx_dev_pcmcia.h>
-
-@@ -55,6 +56,9 @@ struct bcm63xx_pcmcia_socket {
-
- /* base address of io memory */
- void __iomem *io_base;
-+
-+ /* ready gpio */
-+ struct gpio_desc *ready_gpio;
- };
-
- #endif /* BCM63XX_PCMCIA_H_ */
+++ /dev/null
-From 8439e5d2e69f54a532bb5f8ec001b4b5a3035574 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:38:05 +0200
-Subject: [PATCH 14/16] Documentation: add BCM6318 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6318 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6318-pinctrl.txt | 79 ++++++++++++++++++++++
- 1 file changed, 79 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
-@@ -0,0 +1,79 @@
-+* Broadcom BCM6318 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6318-pinctrl".
-+- regs: Register specifiers of dirout, dat, mode, mux, and pad registers.
-+- reg-names: Must be "dirout", "dat", "mode", "mux", "pad".
-+- gpio-controller: Identifies this node as a gpio controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6318-pinctrl";
-+ reg = <0x10000080 0x08>,
-+ <0x10000088 0x08>,
-+ <0x10000098 0x04>,
-+ <0x1000009c 0x0c>,
-+ <0x100000d4 0x18>;
-+ reg-names = "dirout", "dat", "mode", "mux", "pad";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, ephy0_spd_led
-+gpio1 1 led, ephy1_spd_led
-+gpio2 2 led, ephy2_spd_led
-+gpio3 3 led, ephy3_spd_led
-+gpio4 4 led, ephy0_act_led
-+gpio5 5 led, ephy1_act_led
-+gpio6 6 led, ephy2_act_led, serial_led_data
-+gpio7 7 led, ephy3_act_led, serial_led_clk
-+gpio8 8 led, inet_act_led
-+gpio9 9 led, inet_fail_led
-+gpio10 10 led, dsl_led
-+gpio11 11 led, post_fail_led
-+gpio12 12 led, wlan_wps_led
-+gpio13 13 led, usb_pwron, usb_device_led
-+gpio14 14 led
-+gpio15 15 led
-+gpio16 16 led
-+gpio17 17 led
-+gpio18 18 led
-+gpio19 19 led
-+gpio20 20 led
-+gpio21 21 led
-+gpio22 22 led
-+gpio23 23 led
-+gpio24 24 -
-+gpio25 25 -
-+gpio26 26 -
-+gpio27 27 -
-+gpio28 28 -
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+gpio32 32 -
-+gpio33 33 -
-+gpio34 34 -
-+gpio35 35 -
-+gpio36 36 -
-+gpio37 37 -
-+gpio38 38 -
-+gpio39 39 -
-+gpio40 40 usb_active
-+gpio41 41 -
-+gpio42 42 -
-+gpio43 43 -
-+gpio44 44 -
-+gpio45 45 -
-+gpio46 46 -
-+gpio47 47 -
-+gpio48 48 -
-+gpio49 49 -
+++ /dev/null
-From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:20:39 +0200
-Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318
-
-Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
-to different functions. BCM6318 is similar to BCM6328 with the addition
-of a pad register, and the GPIO meaning of the mux register changes
-based on the GPIO number.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++
- 3 files changed, 572 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -2,6 +2,13 @@ config PINCTRL_BCM63XX
- bool
- select GPIO_GENERIC
-
-+config PINCTRL_BCM6318
-+ bool "BCM6318 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+
- config PINCTRL_BCM6328
- bool "BCM6328 pincontrol driver" if COMPILE_TEST
- select PINMUX
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,4 +1,5 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
-+obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
-@@ -0,0 +1,564 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6318_NGPIO 50
-+
-+struct bcm6318_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6318_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned mode_val:1;
-+ unsigned mux_val:2;
-+};
-+
-+struct bcm6318_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ void __iomem *mux[3];
-+ void __iomem *pad[6];
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+static const struct pinctrl_pin_desc bcm6318_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+ PINCTRL_PIN(48, "gpio48"),
-+ PINCTRL_PIN(49, "gpio49"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+static unsigned gpio48_pins[] = { 48 };
-+static unsigned gpio49_pins[] = { 49 };
-+
-+#define BCM6318_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6318_pingroup bcm6318_groups[] = {
-+ BCM6318_GROUP(gpio0),
-+ BCM6318_GROUP(gpio1),
-+ BCM6318_GROUP(gpio2),
-+ BCM6318_GROUP(gpio3),
-+ BCM6318_GROUP(gpio4),
-+ BCM6318_GROUP(gpio5),
-+ BCM6318_GROUP(gpio6),
-+ BCM6318_GROUP(gpio7),
-+ BCM6318_GROUP(gpio8),
-+ BCM6318_GROUP(gpio9),
-+ BCM6318_GROUP(gpio10),
-+ BCM6318_GROUP(gpio11),
-+ BCM6318_GROUP(gpio12),
-+ BCM6318_GROUP(gpio13),
-+ BCM6318_GROUP(gpio14),
-+ BCM6318_GROUP(gpio15),
-+ BCM6318_GROUP(gpio16),
-+ BCM6318_GROUP(gpio17),
-+ BCM6318_GROUP(gpio18),
-+ BCM6318_GROUP(gpio19),
-+ BCM6318_GROUP(gpio20),
-+ BCM6318_GROUP(gpio21),
-+ BCM6318_GROUP(gpio22),
-+ BCM6318_GROUP(gpio23),
-+ BCM6318_GROUP(gpio24),
-+ BCM6318_GROUP(gpio25),
-+ BCM6318_GROUP(gpio26),
-+ BCM6318_GROUP(gpio27),
-+ BCM6318_GROUP(gpio28),
-+ BCM6318_GROUP(gpio29),
-+ BCM6318_GROUP(gpio30),
-+ BCM6318_GROUP(gpio31),
-+ BCM6318_GROUP(gpio32),
-+ BCM6318_GROUP(gpio33),
-+ BCM6318_GROUP(gpio34),
-+ BCM6318_GROUP(gpio35),
-+ BCM6318_GROUP(gpio36),
-+ BCM6318_GROUP(gpio37),
-+ BCM6318_GROUP(gpio38),
-+ BCM6318_GROUP(gpio39),
-+ BCM6318_GROUP(gpio40),
-+ BCM6318_GROUP(gpio41),
-+ BCM6318_GROUP(gpio42),
-+ BCM6318_GROUP(gpio43),
-+ BCM6318_GROUP(gpio44),
-+ BCM6318_GROUP(gpio45),
-+ BCM6318_GROUP(gpio46),
-+ BCM6318_GROUP(gpio47),
-+ BCM6318_GROUP(gpio48),
-+ BCM6318_GROUP(gpio49),
-+};
-+
-+/* GPIO_MODE */
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+/* PINMUX_SEL */
-+static const char * const ephy0_spd_led_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const ephy1_spd_led_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const ephy2_spd_led_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const ephy3_spd_led_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const ephy0_act_led_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const ephy1_act_led_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const ephy2_act_led_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const ephy3_act_led_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_act_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const inet_fail_led_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const dsl_led_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const post_fail_led_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const wlan_wps_led_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const usb_pwron_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_active_groups[] = {
-+ "gpio40",
-+};
-+
-+#define BCM6318_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mode_val = 1, \
-+ }
-+
-+#define BCM6318_MUX_FUN(n, mux) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mux_val = mux, \
-+ }
-+
-+static const struct bcm6318_function bcm6318_funcs[] = {
-+ BCM6318_MODE_FUN(led),
-+ BCM6318_MUX_FUN(ephy0_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy1_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy2_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy3_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy0_act_led, 1),
-+ BCM6318_MUX_FUN(ephy1_act_led, 1),
-+ BCM6318_MUX_FUN(ephy2_act_led, 1),
-+ BCM6318_MUX_FUN(ephy3_act_led, 1),
-+ BCM6318_MUX_FUN(serial_led_data, 3),
-+ BCM6318_MUX_FUN(serial_led_clk, 3),
-+ BCM6318_MUX_FUN(inet_act_led, 1),
-+ BCM6318_MUX_FUN(inet_fail_led, 1),
-+ BCM6318_MUX_FUN(dsl_led, 1),
-+ BCM6318_MUX_FUN(post_fail_led, 1),
-+ BCM6318_MUX_FUN(wlan_wps_led, 1),
-+ BCM6318_MUX_FUN(usb_pwron, 1),
-+ BCM6318_MUX_FUN(usb_device_led, 2),
-+ BCM6318_MUX_FUN(usb_active, 2),
-+};
-+
-+static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6318_groups);
-+}
-+
-+static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6318_groups[group].name;
-+}
-+
-+static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6318_groups[group].pins;
-+ *num_pins = bcm6318_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6318_funcs);
-+}
-+
-+static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6318_funcs[selector].name;
-+}
-+
-+static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6318_funcs[selector].groups;
-+ *num_groups = bcm6318_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin,
-+ u32 mode, u32 mux)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (pin < 32) {
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~BIT(pin);
-+ if (mode)
-+ reg |= BIT(pin);
-+ __raw_writel(reg, pctl->mode);
-+ }
-+
-+ if (pin < 48) {
-+ reg = __raw_readl(pctl->mux[pin / 16]);
-+ reg &= ~(3UL << ((pin % 16) * 2));
-+ reg |= mux << ((pin % 16) * 2);
-+ __raw_writel(reg, pctl->mux[pin / 16]);
-+ }
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ reg = __raw_readl(pctl->pad[pin / 8]);
-+ reg &= ~(0xfUL << ((pin % 8) * 4));
-+ reg |= val << ((pin % 8) * 4);
-+ __raw_writel(reg, pctl->pad[pin / 8]);
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6318_pingroup *grp = &bcm6318_groups[group];
-+ const struct bcm6318_function *f = &bcm6318_funcs[selector];
-+
-+ bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
-+
-+ return 0;
-+}
-+
-+static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ if (offset < 13) {
-+ /* GPIOs 0-12 use mux 0 as GPIO function */
-+ bcm6318_rmw_mux(pctl, offset, 0, 0);
-+ } else if (offset < 42) {
-+ /* GPIOs 13-41 use mux 3 as GPIO function */
-+ bcm6318_rmw_mux(pctl, offset, 0, 3);
-+
-+ /* FIXME: revert to old value for non gpio? */
-+ bcm6318_set_pad(pctl, offset, 0);
-+ } else {
-+ /* no idea, really */
-+ }
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6318_pctl_ops = {
-+ .get_groups_count = bcm6318_pinctrl_get_group_count,
-+ .get_group_name = bcm6318_pinctrl_get_group_name,
-+ .get_group_pins = bcm6318_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6318_pmx_ops = {
-+ .get_functions_count = bcm6318_pinctrl_get_func_count,
-+ .get_function_name = bcm6318_pinctrl_get_func_name,
-+ .get_function_groups = bcm6318_pinctrl_get_groups,
-+ .set_mux = bcm6318_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6318_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6318_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6318_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode, *mux, *pad;
-+ unsigned i;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
-+ mux = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mux))
-+ return PTR_ERR(mux);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad");
-+ pad = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(pad))
-+ return PTR_ERR(pad);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ for (i = 0; i < 3; i++)
-+ pctl->mux[i] = mux + (i * 4);
-+
-+ for (i = 0; i < 6; i++)
-+ pctl->pad[i] = pad + (i * 4);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6318_pctl_ops;
-+ pctl->desc.pmxops = &bcm6318_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6318_pins);
-+ pctl->desc.pins = bcm6318_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6318_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6318_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6318-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6318_pinctrl_driver = {
-+ .probe = bcm6318_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6318-pinctrl",
-+ .of_match_table = bcm6318_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6318_pinctrl_driver);
+++ /dev/null
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -24,6 +24,8 @@ config BCM63XX_CPU_6318
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6318
-
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
-@@ -31,6 +33,8 @@ config BCM63XX_CPU_6328
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6328
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -46,6 +50,8 @@ config BCM63XX_CPU_6348
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6348
-
- config BCM63XX_CPU_6358
- bool "support 6358 CPU"
-@@ -53,6 +59,8 @@ config BCM63XX_CPU_6358
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6358
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
-@@ -60,6 +68,8 @@ config BCM63XX_CPU_6362
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6362
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
-@@ -67,6 +77,8 @@ config BCM63XX_CPU_6368
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6368
-
- config BCM63XX_CPU_63268
- bool "support 63268 CPU"
-@@ -74,6 +86,8 @@ config BCM63XX_CPU_63268
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM63268
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 31 Jul 2017 20:10:36 +0200
-Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
-
----
- arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -485,6 +485,8 @@ static struct clk_lookup bcm3368_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -501,7 +503,9 @@ static struct clk_lookup bcm6318_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -515,7 +519,10 @@ static struct clk_lookup bcm6328_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -528,6 +535,7 @@ static struct clk_lookup bcm6338_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -542,6 +550,7 @@ static struct clk_lookup bcm6345_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -556,6 +565,7 @@ static struct clk_lookup bcm6348_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -572,6 +582,8 @@ static struct clk_lookup bcm6358_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -591,7 +603,10 @@ static struct clk_lookup bcm6362_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -607,6 +622,8 @@ static struct clk_lookup bcm6368_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -621,7 +638,10 @@ static struct clk_lookup bcm63268_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+++ /dev/null
-From 39d2882058345b5994680b8731848a0343878019 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 4 Feb 2017 12:58:50 +0100
-Subject: [PATCH 7/8] MIPS: BCM63XX: do not register SPI controllers
-
-We now register them through DT, so no need to keep them here.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 7 -------
- 1 file changed, 7 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -28,9 +28,7 @@
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_dsp.h>
- #include <bcm63xx_dev_flash.h>
--#include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
--#include <bcm63xx_dev_spi.h>
- #include <bcm63xx_dev_usb_ehci.h>
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -240,10 +238,6 @@ int __init board_register_devices(void)
- bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
- pr_err(PFX "failed to register fallback SPROM\n");
-
-- bcm63xx_spi_register();
--
-- bcm63xx_hsspi_register();
--
- bcm63xx_flash_register();
-
- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,6 +1,6 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
-- dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
-+ dev-pcmcia.o dev-rng.o dev-uart.o \
- dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
- usb-common.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ /dev/null
-@@ -1,48 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/platform_device.h>
--
--#include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_hsspi.h>
--#include <bcm63xx_regs.h>
--
--static struct resource spi_resources[] = {
-- {
-- .start = -1, /* filled at runtime */
-- .end = -1, /* filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- .start = -1, /* filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_hsspi_device = {
-- .name = "bcm63xx-hsspi",
-- .id = 0,
-- .num_resources = ARRAY_SIZE(spi_resources),
-- .resource = spi_resources,
--};
--
--int __init bcm63xx_hsspi_register(void)
--{
-- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-- !BCMCPU_IS_63268())
-- return -ENODEV;
--
-- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
-- spi_resources[0].end = spi_resources[0].start;
-- spi_resources[0].end += RSET_HSSPI_SIZE - 1;
-- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
--
-- return platform_device_register(&bcm63xx_hsspi_device);
--}
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ /dev/null
-@@ -1,60 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
-- * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/export.h>
--#include <linux/platform_device.h>
--#include <linux/err.h>
--#include <linux/clk.h>
--
--#include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_spi.h>
--#include <bcm63xx_regs.h>
--
--static struct resource spi_resources[] = {
-- {
-- .start = -1, /* filled at runtime */
-- .end = -1, /* filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- .start = -1, /* filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_spi_device = {
-- .id = -1,
-- .num_resources = ARRAY_SIZE(spi_resources),
-- .resource = spi_resources,
--};
--
--int __init bcm63xx_spi_register(void)
--{
-- if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
-- return -ENODEV;
--
-- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
-- spi_resources[0].end = spi_resources[0].start;
-- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
--
-- if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
-- bcm63xx_spi_device.name = "bcm6348-spi",
-- spi_resources[0].end += BCM_6348_RSET_SPI_SIZE - 1;
-- }
--
-- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
-- BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
-- bcm63xx_spi_device.name = "bcm6358-spi",
-- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
-- }
--
-- return platform_device_register(&bcm63xx_spi_device);
--}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
-+++ /dev/null
-@@ -1,8 +0,0 @@
--#ifndef BCM63XX_DEV_HSSPI_H
--#define BCM63XX_DEV_HSSPI_H
--
--#include <linux/types.h>
--
--int bcm63xx_hsspi_register(void);
--
--#endif /* BCM63XX_DEV_HSSPI_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,6 +1,6 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
-- dev-pcmcia.o dev-rng.o dev-uart.o \
-+ dev-pcmcia.o dev-rng.o \
- dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
- usb-common.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
---- a/arch/mips/bcm63xx/dev-uart.c
-+++ /dev/null
-@@ -1,76 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/platform_device.h>
--#include <bcm63xx_cpu.h>
--
--static struct resource uart0_resources[] = {
-- {
-- /* start & end filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- /* start filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct resource uart1_resources[] = {
-- {
-- /* start & end filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- /* start filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_uart_devices[] = {
-- {
-- .name = "bcm63xx_uart",
-- .id = 0,
-- .num_resources = ARRAY_SIZE(uart0_resources),
-- .resource = uart0_resources,
-- },
--
-- {
-- .name = "bcm63xx_uart",
-- .id = 1,
-- .num_resources = ARRAY_SIZE(uart1_resources),
-- .resource = uart1_resources,
-- }
--};
--
--int __init bcm63xx_uart_register(unsigned int id)
--{
-- if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
-- return -ENODEV;
--
-- if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() &&
-- !BCMCPU_IS_6368()))
-- return -ENODEV;
--
-- if (id == 0) {
-- uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0);
-- uart0_resources[0].end = uart0_resources[0].start +
-- RSET_UART_SIZE - 1;
-- uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
-- }
--
-- if (id == 1) {
-- uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1);
-- uart1_resources[0].end = uart1_resources[0].start +
-- RSET_UART_SIZE - 1;
-- uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1);
-- }
--
-- return platform_device_register(&bcm63xx_uart_devices[id]);
--}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
-+++ /dev/null
-@@ -1,6 +0,0 @@
--#ifndef BCM63XX_DEV_UART_H_
--#define BCM63XX_DEV_UART_H_
--
--int bcm63xx_uart_register(unsigned int id);
--
--#endif /* BCM63XX_DEV_UART_H_ */
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -33,8 +33,6 @@ struct board_info {
- unsigned int has_ehci0:1;
- unsigned int has_usbd:1;
- unsigned int has_dsp:1;
-- unsigned int has_uart0:1;
-- unsigned int has_uart1:1;
- unsigned int use_fallback_sprom:1;
-
- /* ethernet config */
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -20,7 +20,6 @@
- #include <asm/prom.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_gpio.h>
-@@ -189,12 +188,6 @@ int __init board_register_devices(void)
-
- bcm63xx_gpio_init();
-
-- if (board.has_uart0)
-- bcm63xx_uart_register(0);
--
-- if (board.has_uart1)
-- bcm63xx_uart_register(1);
--
- if (board.has_pccard)
- bcm63xx_pcmcia_register();
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -35,9 +35,6 @@ static struct board_info __initdata boar
- .name = "CVG834G_E15R3921",
- .expected_cpu_id = 0x3368,
-
-- .has_uart0 = 1,
-- .has_uart1 = 1,
--
- .has_enet0 = 1,
- .has_pci = 1,
-
-@@ -67,7 +64,6 @@ static struct board_info __initdata boar
- .name = "96328avng",
- .expected_cpu_id = 0x6328,
-
-- .has_uart0 = 1,
- .has_pci = 1,
- .has_usbd = 0,
- .use_fallback_sprom = 1,
-@@ -116,7 +112,6 @@ static struct board_info __initdata boar
- .name = "96338GW",
- .expected_cpu_id = 0x6338,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .enet0 = {
- .force_speed_100 = 1,
-@@ -159,7 +154,6 @@ static struct board_info __initdata boar
- .name = "96338W",
- .expected_cpu_id = 0x6338,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .enet0 = {
- .force_speed_100 = 1,
-@@ -204,8 +198,6 @@ static struct board_info __initdata boar
- static struct board_info __initdata board_96345gw2 = {
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
--
-- .has_uart0 = 1,
- };
- #endif
-
-@@ -217,7 +209,6 @@ static struct board_info __initdata boar
- .name = "96348R",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_pci = 1,
- .use_fallback_sprom = 1,
-@@ -262,7 +253,6 @@ static struct board_info __initdata boar
- .name = "96348GW-10",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -323,7 +313,6 @@ static struct board_info __initdata boar
- .name = "96348GW-11",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -378,7 +367,6 @@ static struct board_info __initdata boar
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -437,7 +425,6 @@ static struct board_info __initdata boar
- .name = "F@ST2404",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -482,7 +469,6 @@ static struct board_info __initdata boar
- .name = "DV201AMR",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_pci = 1,
- .use_fallback_sprom = 1,
- .has_ohci0 = 1,
-@@ -503,7 +489,6 @@ static struct board_info __initdata boar
- .name = "96348GW-A",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -530,7 +515,6 @@ static struct board_info __initdata boar
- .name = "96358VW",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -583,7 +567,6 @@ static struct board_info __initdata boar
- .name = "96358VW2",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -633,7 +616,6 @@ static struct board_info __initdata boar
- .name = "AGPF-S0",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
+++ /dev/null
-From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Feb 2015 17:52:32 +0100
-Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 262 -----------------------------
- 1 file changed, 262 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -43,14 +43,6 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
-
-- .leds = {
-- {
-- .name = "CVG834G:green:power",
-- .gpio = 37,
-- .default_trigger= "default-on",
-- },
-- },
--
- .ephy_reset_gpio = 36,
- .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
-@@ -72,35 +64,6 @@ static struct board_info __initdata boar
- .use_fullspeed = 0,
- .port_no = 0,
- },
--
-- .leds = {
-- {
-- .name = "96328avng::ppp-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::power",
-- .gpio = 4,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "96328avng::power-fail",
-- .gpio = 8,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::wps",
-- .gpio = 9,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::ppp",
-- .gpio = 11,
-- .active_low = 1,
-- },
-- },
- };
- #endif
-
-@@ -119,35 +82,6 @@ static struct board_info __initdata boar
- },
-
- .has_ohci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ses",
-- .gpio = 5,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- }
-- },
- };
-
- static struct board_info __initdata board_96338w = {
-@@ -159,35 +93,6 @@ static struct board_info __initdata boar
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ses",
-- .gpio = 5,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
- #endif
-
-@@ -217,36 +122,6 @@ static struct board_info __initdata boar
- .has_phy = 1,
- .use_internal_phy = 1,
- },
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
--
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw_10 = {
-@@ -278,35 +153,6 @@ static struct board_info __initdata boar
- .cs = 2,
- .ext_irq = 2,
- },
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw_11 = {
-@@ -332,35 +178,6 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw = {
-@@ -390,35 +207,6 @@ static struct board_info __initdata boar
- .ext_irq = 2,
- .cs = 2,
- },
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_FAST2404 = {
-@@ -534,33 +322,6 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 15,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 22,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 23,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 4,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 5,
-- },
-- },
- };
-
- static struct board_info __initdata board_96358vw2 = {
-@@ -587,29 +348,6 @@ static struct board_info __initdata boar
- .has_pccard = 1,
- .has_ehci0 = 1,
- .num_usbh_ports = 2,
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 22,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 23,
-- },
-- {
-- .name = "power",
-- .gpio = 5,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_AGPFS0 = {
+++ /dev/null
-From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001
-From: Axel Gembe <ago@bastart.eu.org>
-Date: Mon, 12 May 2008 18:54:09 +0200
-Subject: [PATCH] bcm963xx: flashmap support
-
-Signed-off-by: Axel Gembe <ago@bastart.eu.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 19 +----------------
- drivers/mtd/maps/bcm963xx-flash.c | 32 ++++++++++++++++++++++++----
- drivers/mtd/redboot.c | 13 +++++++++--
- 3 files changed, 38 insertions(+), 26 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio
- }
- };
-
--static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
-+static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
-
- static struct physmap_flash_data flash_data = {
- .width = 2,
---- a/drivers/mtd/redboot.c
-+++ b/drivers/mtd/redboot.c
-@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru
- int nulllen = 0;
- int numslots;
- unsigned long offset;
-+ unsigned long fis_origin = 0;
- #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
- static char nullstring[] = "unallocated";
- #endif
-@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru
- goto out;
- }
-
-+ if (data && data->origin) {
-+ fis_origin = data->origin;
-+ } else {
-+ for (i = 0; i < numslots; i++) {
-+ if (!strncmp(buf[i].name, "RedBoot", 8)) {
-+ fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
-+ }
-+ }
-+ }
-+
- for (i = 0; i < numslots; i++) {
- struct fis_list *new_fl, **prev;
-
-@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru
- goto out;
- }
- new_fl->img = &buf[i];
-- if (data && data->origin)
-- buf[i].flash_base -= data->origin;
-- else
-- buf[i].flash_base &= master->size-1;
-+ if (fis_origin)
-+ buf[i].flash_base -= fis_origin;
-+
-+ buf[i].flash_base &= (master->size << 1) - 1;
-
- /* I'm sure the JFFS2 code has done me permanent damage.
- * I now think the following is _normal_
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm963xx_tag.h
-@@ -85,8 +85,10 @@ struct bcm_tag {
- __u32 rootfs_crc;
- /* 224-227: CRC32 of kernel partition */
- __u32 kernel_crc;
-- /* 228-235: Unused at present */
-- char reserved1[8];
-+ /* 228-231: Image sequence number */
-+ char image_sequence[4];
-+ /* 222-235: Openwrt: real rootfs length */
-+ __u32 real_rootfs_length;
- /* 236-239: CRC32 of header excluding last 20 bytes */
- __u32 header_crc;
- /* 240-255: Unused at present */
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -110,7 +110,8 @@ static int bcm63xx_parse_cfe_partitions(
- } else {
- /* OpenWrt layout */
- rootfsaddr = kerneladdr + kernellen;
-- rootfslen = spareaddr - rootfsaddr;
-+ rootfslen = buf->real_rootfs_length;
-+ spareaddr = rootfsaddr + rootfslen;
- }
- } else {
- pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n",
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1632,7 +1632,7 @@ static int compute_hw_mtu(struct bcm_ene
- actual_mtu = mtu;
-
- /* add ethernet header + vlan tag size */
-- actual_mtu += VLAN_ETH_HLEN;
-+ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN;
-
- if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU)
- return -EINVAL;
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -98,6 +98,8 @@ void __init board_early_setup(const stru
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G3_EXT_MII |
- GPIO_MODE_6348_G0_EXT_MII;
-+ else if (BCMCPU_IS_6358())
-+ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
- }
-
- bcm_gpio_writel(val, GPIO_MODE_REG);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -651,6 +651,8 @@
- #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
- #define GPIO_MODE_6358_SERIAL_LED (1 << 10)
- #define GPIO_MODE_6358_UTOPIA (1 << 12)
-+#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30)
-+#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31)
-
- #define GPIO_MODE_6368_ANALOG_AFE_0 (1 << 0)
- #define GPIO_MODE_6368_ANALOG_AFE_1 (1 << 1)
+++ /dev/null
-From b11218c750ab92cfab4408a0328f1b36ceec3f33 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 6 Jan 2012 12:24:18 +0100
-Subject: [PATCH 19/63] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove
-
-Only connect/disconnect the phy during probe and remove, not during any
-open/close. The phy seldom changes during the runtime, and disconnecting
-the phy during close will prevent it from keeping any configuration over
-a down/up cycle.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 84 +++++++++++++-------------
- 1 files changed, 41 insertions(+), 43 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -870,10 +870,8 @@ static int bcm_enet_open(struct net_devi
- struct bcm_enet_priv *priv;
- struct sockaddr addr;
- struct device *kdev;
-- struct phy_device *phydev;
- int i, ret;
- unsigned int size;
-- char phy_id[MII_BUS_ID_SIZE + 3];
- void *p;
- u32 val;
-
-@@ -881,40 +879,10 @@ static int bcm_enet_open(struct net_devi
- kdev = &priv->pdev->dev;
-
- if (priv->has_phy) {
-- /* connect to PHY */
-- snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
-- priv->mii_bus->id, priv->phy_id);
--
-- phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
-- PHY_INTERFACE_MODE_MII);
--
-- if (IS_ERR(phydev)) {
-- dev_err(kdev, "could not attach to PHY\n");
-- return PTR_ERR(phydev);
-- }
--
-- /* mask with MAC supported features */
-- phydev->supported &= (SUPPORTED_10baseT_Half |
-- SUPPORTED_10baseT_Full |
-- SUPPORTED_100baseT_Half |
-- SUPPORTED_100baseT_Full |
-- SUPPORTED_Autoneg |
-- SUPPORTED_Pause |
-- SUPPORTED_MII);
-- phydev->advertising = phydev->supported;
--
-- if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
-- phydev->advertising |= SUPPORTED_Pause;
-- else
-- phydev->advertising &= ~SUPPORTED_Pause;
--
-- dev_info(kdev, "attached PHY at address %d [%s]\n",
-- phydev->addr, phydev->drv->name);
--
-+ /* Reset state */
- priv->old_link = 0;
- priv->old_duplex = -1;
- priv->old_pause = -1;
-- priv->phydev = phydev;
- }
-
- /* mask all interrupts and request them */
-@@ -924,7 +892,7 @@ static int bcm_enet_open(struct net_devi
-
- ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
- if (ret)
-- goto out_phy_disconnect;
-+ return ret;
-
- ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0,
- dev->name, dev);
-@@ -1128,9 +1096,6 @@ out_freeirq_rx:
- out_freeirq:
- free_irq(dev->irq, dev);
-
--out_phy_disconnect:
-- phy_disconnect(priv->phydev);
--
- return ret;
- }
-
-@@ -1235,12 +1200,6 @@ static int bcm_enet_stop(struct net_devi
- free_irq(priv->irq_rx, dev);
- free_irq(dev->irq, dev);
-
-- /* release phy */
-- if (priv->has_phy) {
-- phy_disconnect(priv->phydev);
-- priv->phydev = NULL;
-- }
--
- return 0;
- }
-
-@@ -1821,6 +1780,8 @@ static int bcm_enet_probe(struct platfor
-
- /* MII bus registration */
- if (priv->has_phy) {
-+ struct phy_device *phydev;
-+ char phy_id[MII_BUS_ID_SIZE + 3];
-
- priv->mii_bus = mdiobus_alloc();
- if (!priv->mii_bus) {
-@@ -1858,6 +1819,38 @@ static int bcm_enet_probe(struct platfor
- dev_err(&pdev->dev, "unable to register mdio bus\n");
- goto out_free_mdio;
- }
-+
-+ /* connect to PHY */
-+ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
-+ priv->mii_bus->id, priv->phy_id);
-+
-+ phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
-+ PHY_INTERFACE_MODE_MII);
-+
-+ if (IS_ERR(phydev)) {
-+ dev_err(&pdev->dev, "could not attach to PHY\n");
-+ goto out_unregister_mdio;
-+ }
-+
-+ /* mask with MAC supported features */
-+ phydev->supported &= (SUPPORTED_10baseT_Half |
-+ SUPPORTED_10baseT_Full |
-+ SUPPORTED_100baseT_Half |
-+ SUPPORTED_100baseT_Full |
-+ SUPPORTED_Autoneg |
-+ SUPPORTED_Pause |
-+ SUPPORTED_MII);
-+ phydev->advertising = phydev->supported;
-+
-+ if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
-+ phydev->advertising |= SUPPORTED_Pause;
-+ else
-+ phydev->advertising &= ~SUPPORTED_Pause;
-+
-+ dev_info(&pdev->dev, "attached PHY at address %d [%s]\n",
-+ phydev->addr, phydev->drv->name);
-+
-+ priv->phydev = phydev;
- } else {
-
- /* run platform code to initialize PHY device */
-@@ -1903,6 +1896,9 @@ static int bcm_enet_probe(struct platfor
- return 0;
-
- out_unregister_mdio:
-+ if (priv->phydev)
-+ phy_disconnect(priv->phydev);
-+
- if (priv->mii_bus)
- mdiobus_unregister(priv->mii_bus);
-
-@@ -1940,6 +1936,8 @@ static int bcm_enet_remove(struct platfo
- enet_writel(priv, 0, ENET_MIISC_REG);
-
- if (priv->has_phy) {
-+ phy_disconnect(priv->phydev);
-+ priv->phydev = NULL;
- mdiobus_unregister(priv->mii_bus);
- mdiobus_free(priv->mii_bus);
- } else {
+++ /dev/null
-From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 15 Jul 2012 20:08:57 +0200
-Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
-
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++
- 2 files changed, 25 insertions(+), 0 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -967,6 +967,19 @@
- #define ENETSW_PORTOV_FDX_MASK (1 << 1)
- #define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
-
-+/* Port RGMII control register */
-+#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x))
-+#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7)
-+#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6)
-+#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4)
-+#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4)
-+#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4)
-+#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4)
-+#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0)
-+
-+/* Port RGMII timing register */
-+#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x))
-+
- /* MDIO control register */
- #define ENETSW_MDIOC_REG (0xb0)
- #define ENETSW_MDIOC_EXT_MASK (1 << 16)
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2212,6 +2212,18 @@ static int bcm_enetsw_open(struct net_de
- priv->sw_port_link[i] = 0;
- }
-
-+ /* enable external ports */
-+ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) {
-+ u8 rgmii_ctrl;
-+
-+ if (!priv->used_ports[i].used)
-+ continue;
-+
-+ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
-+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
-+ }
-+
- /* reset mib */
- val = enetsw_readb(priv, ENETSW_GMCR_REG);
- val |= ENETSW_GMCR_RST_MIB_MASK;
+++ /dev/null
-From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 3 Jul 2011 15:00:38 +0200
-Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/dev-flash.c | 35 +++++++++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +
- 2 files changed, 33 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -17,6 +17,9 @@
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/physmap.h>
- #include <linux/mtd/spi-nor.h>
-+#include <linux/of.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/flash.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
-@@ -66,6 +69,41 @@ void __init bcm63xx_flash_force_phys_bas
- mtd_resources[0].end = end;
- }
-
-+static struct spi_board_info bcm63xx_spi_flash_info[] = {
-+ {
-+ .bus_num = 0,
-+ .chip_select = 0,
-+ .mode = 0,
-+ .max_speed_hz = 781000,
-+ .modalias = "m25p80",
-+ },
-+};
-+
-+static void bcm63xx_of_update_spi_flash_speed(struct device_node *np,
-+ unsigned int new_hz)
-+{
-+ struct property *max_hz;
-+ __be32 *hz;
-+
-+ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL);
-+ if (!max_hz)
-+ return;
-+
-+ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL);
-+ if (!max_hz->name) {
-+ kfree(max_hz);
-+ return;
-+ }
-+
-+ max_hz->value = max_hz + 1;
-+ max_hz->length = sizeof(*hz);
-+
-+ hz = max_hz->value;
-+ *hz = cpu_to_be32(new_hz);
-+
-+ of_update_property(np, max_hz);
-+}
-+
- static int __init bcm63xx_detect_flash_type(void)
- {
- u32 val;
-@@ -73,9 +111,15 @@ static int __init bcm63xx_detect_flash_t
- switch (bcm63xx_get_cpu_id()) {
- case BCM6318_CPU_ID:
- /* only support serial flash */
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
- return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6328_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
-+ if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
-+
- if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
-@@ -94,12 +138,20 @@ static int __init bcm63xx_detect_flash_t
- return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6362_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
-+ if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
- return BCM63XX_FLASH_TYPE_NAND;
- case BCM6368_CPU_ID:
- val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
-+ if (val & STRAPBUS_6368_SPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
- case STRAPBUS_6368_BOOT_SEL_NAND:
- return BCM63XX_FLASH_TYPE_NAND;
-@@ -110,6 +162,11 @@ static int __init bcm63xx_detect_flash_t
- }
- case BCM63268_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
-@@ -176,6 +233,7 @@ void __init bcm63xx_flash_detect(void)
-
- int __init bcm63xx_flash_register(void)
- {
-+ struct device_node *np;
- u32 val;
-
- switch (flash_type) {
-@@ -195,8 +253,14 @@ int __init bcm63xx_flash_register(void)
-
- return platform_device_register(&mtd_dev);
- case BCM63XX_FLASH_TYPE_SERIAL:
-- pr_warn("unsupported serial flash detected\n");
-- return -ENODEV;
-+ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor");
-+ if (np) {
-+ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz);
-+ of_node_put(np);
-+ return 0;
-+ } else {
-+ return -ENODEV;
-+ }
- case BCM63XX_FLASH_TYPE_NAND:
- pr_warn("unsupported NAND flash detected\n");
- return -ENODEV;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -708,6 +708,7 @@
- #define GPIO_STRAPBUS_REG 0x40
- #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
- #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
-+#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6)
- #define STRAPBUS_6368_BOOT_SEL_MASK 0x3
- #define STRAPBUS_6368_BOOT_SEL_NAND 0
- #define STRAPBUS_6368_BOOT_SEL_SERIAL 1
-@@ -1564,6 +1565,7 @@
- #define IDDQ_CTRL_63268_USBH (1 << 4)
-
- #define MISC_STRAPBUS_6328_REG 0x240
-+#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4)
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
- #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)
+++ /dev/null
-From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 3 May 2012 14:40:03 +0200
-Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 9 ++++++++-
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 10 ++++++++++
- 2 files changed, 18 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -32,6 +32,7 @@
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-+#include <pci_ath9k_fixup.h>
-
- #include "board_common.h"
-
-@@ -178,6 +179,7 @@ static struct of_device_id of_ids[] = {
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-+ int i;
-
- #if CONFIG_OF
- if (of_have_populated_dt()) {
-@@ -245,6 +247,10 @@ int __init board_register_devices(void)
- board.ephy_reset_gpio_flags);
- }
-
-+ /* register any fixups */
-+ for (i = 0; i < board.has_caldata; i++)
-+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
-+
- return 0;
- }
-
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -9,6 +9,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_dev_dsp.h>
- #include <bcm63xx_fallback_sprom.h>
-+#include <pci_ath9k_fixup.h>
-
- /*
- * flash mapping
-@@ -16,6 +17,11 @@
- #define BCM963XX_CFE_VERSION_OFFSET 0x570
- #define BCM963XX_NVRAM_OFFSET 0x580
-
-+struct ath9k_caldata {
-+ unsigned int slot;
-+ u32 caldata_offset;
-+};
-+
- /*
- * board definition
- */
-@@ -34,6 +40,10 @@ struct board_info {
- unsigned int has_usbd:1;
- unsigned int has_dsp:1;
- unsigned int use_fallback_sprom:1;
-+ unsigned int has_caldata:2;
-+
-+ /* wifi calibration data config */
-+ struct ath9k_caldata caldata[2];
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
+++ /dev/null
-From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 13 Jan 2014 12:12:30 +0100
-Subject: [PATCH] MIPS: BCM63XX: export the attached flash type
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 5 +++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -270,3 +270,8 @@ int __init bcm63xx_flash_register(void)
- return -ENODEV;
- }
- }
-+
-+int bcm63xx_flash_get_type(void)
-+{
-+ return flash_type;
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -13,4 +13,6 @@ void bcm63xx_flash_force_phys_base_addre
-
- int __init bcm63xx_flash_register(void);
-
-+int bcm63xx_flash_get_type(void);
-+
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 3 May 2012 14:36:11 +0200
-Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
-
----
- arch/mips/bcm63xx/Makefile | 3 +-
- arch/mips/bcm63xx/pci-ath9k-fixup.c | 190 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h | 7 +
- 3 files changed, 199 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- dev-pcmcia.o dev-rng.o \
- dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
-- usb-common.o sprom.o
-+ pci-ath9k-fixup.o usb-common.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -0,0 +1,200 @@
-+/*
-+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
-+ *
-+ * Copytight (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-+ *
-+ * Based on
-+ *
-+ * Atheros AP94 reference board PCI initialization
-+ *
-+ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/pci.h>
-+#include <linux/delay.h>
-+#include <linux/ath9k_platform.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_nvram.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <pci_ath9k_fixup.h>
-+
-+#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
-+
-+struct ath9k_fixup {
-+ unsigned slot;
-+ u8 mac[ETH_ALEN];
-+ struct ath9k_platform_data pdata;
-+};
-+
-+static int ath9k_num_fixups;
-+static struct ath9k_fixup ath9k_fixups[2] = {
-+ {
-+ .slot = 255,
-+ .pdata = {
-+ .led_pin = -1,
-+ },
-+ },
-+ {
-+ .slot = 255,
-+ .pdata = {
-+ .led_pin = -1,
-+ },
-+ },
-+};
-+
-+static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset)
-+{
-+ u32 addr;
-+
-+ if (BCMCPU_IS_6328()) {
-+ addr = 0x18000000;
-+ } else {
-+ addr = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ addr &= MPI_CSBASE_BASE_MASK;
-+ }
-+
-+ switch (bcm63xx_flash_get_type()) {
-+ case BCM63XX_FLASH_TYPE_PARALLEL:
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ return eeprom;
-+ case BCM63XX_FLASH_TYPE_SERIAL:
-+ /* the first megabyte is memory mapped */
-+ if (offset < 0x100000) {
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ return eeprom;
-+ }
-+
-+ if (BCMCPU_IS_6328()) {
-+ /* we can change the memory mapped megabyte */
-+ bcm_hsspi_writel(offset & 0xf00000, 0x18);
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ bcm_hsspi_writel(0, 0x18);
-+ return eeprom;
-+ }
-+ /* can't do anything here without talking to the SPI controller. */
-+ case BCM63XX_FLASH_TYPE_NAND:
-+ default:
-+ return NULL;
-+ }
-+}
-+
-+static void ath9k_pci_fixup(struct pci_dev *dev)
-+{
-+ void __iomem *mem;
-+ struct ath9k_platform_data *pdata = NULL;
-+ struct pci_dev *bridge = pci_upstream_bridge(dev);
-+ u16 *cal_data = NULL;
-+ u16 cmd;
-+ u32 bar0;
-+ u32 val;
-+ unsigned i;
-+
-+ for (i = 0; i < ath9k_num_fixups; i++) {
-+ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
-+ continue;
-+
-+ cal_data = ath9k_fixups[i].pdata.eeprom_data;
-+ pdata = &ath9k_fixups[i].pdata;
-+ break;
-+ }
-+
-+ if (cal_data == NULL)
-+ return;
-+
-+ if (*cal_data != 0xa55a) {
-+ pr_err("pci %s: invalid calibration data\n", pci_name(dev));
-+ return;
-+ }
-+
-+ pr_info("pci %s: fixup device configuration\n", pci_name(dev));
-+
-+ switch (bcm63xx_get_cpu_id()) {
-+ case BCM6328_CPU_ID:
-+ val = BCM_PCIE_MEM_BASE_PA_6328;
-+ break;
-+ case BCM6348_CPU_ID:
-+ case BCM6358_CPU_ID:
-+ case BCM6368_CPU_ID:
-+ val = BCM_PCI_MEM_BASE_PA;
-+ break;
-+ default:
-+ BUG();
-+ }
-+
-+ mem = ioremap(val, 0x10000);
-+ if (!mem) {
-+ pr_err("pci %s: ioremap error\n", pci_name(dev));
-+ return;
-+ }
-+
-+ if (bridge)
-+ pci_enable_device(bridge);
-+
-+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
-+
-+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
-+ pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+ /* set offset to first reg address */
-+ cal_data += 3;
-+ while(*cal_data != 0xffff) {
-+ u32 reg;
-+ reg = *cal_data++;
-+ val = *cal_data++;
-+ val |= (*cal_data++) << 16;
-+
-+ writel(val, mem + reg);
-+ udelay(100);
-+ }
-+
-+ pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
-+ dev->vendor = val & 0xffff;
-+ dev->device = (val >> 16) & 0xffff;
-+
-+ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
-+ dev->revision = val & 0xff;
-+ dev->class = val >> 8; /* upper 3 bytes */
-+
-+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
-+ pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
-+
-+ if (bridge)
-+ pci_disable_device(bridge);
-+
-+ iounmap(mem);
-+
-+ dev->dev.platform_data = pdata;
-+}
-+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-+
-+void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
-+{
-+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
-+ return;
-+
-+ ath9k_fixups[ath9k_num_fixups].slot = slot;
-+
-+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
-+ return;
-+
-+ if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac))
-+ return;
-+
-+ ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac;
-+ ath9k_num_fixups++;
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -0,0 +1,7 @@
-+#ifndef _PCI_ATH9K_FIXUP
-+#define _PCI_ATH9K_FIXUP
-+
-+
-+void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
-+
-+#endif /* _PCI_ATH9K_FIXUP */
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -2,6 +2,7 @@
- #define _PCI_ATH9K_FIXUP
-
-
--void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
-+void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-+ unsigned endian_check) __init;
-
- #endif /* _PCI_ATH9K_FIXUP */
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -20,6 +20,7 @@
- struct ath9k_caldata {
- unsigned int slot;
- u32 caldata_offset;
-+ unsigned int endian_check:1;
- };
-
- /*
---- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -182,12 +182,14 @@ static void ath9k_pci_fixup(struct pci_d
- }
- DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-
--void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
-+void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-+ unsigned endian_check)
- {
- if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
- return;
-
- ath9k_fixups[ath9k_num_fixups].slot = slot;
-+ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
-
- if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
- return;
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -249,7 +249,8 @@ int __init board_register_devices(void)
-
- /* register any fixups */
- for (i = 0; i < board.has_caldata; i++)
-- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
-+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-+ board.caldata[i].endian_check);
-
- return 0;
- }
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -250,7 +250,7 @@ int __init board_register_devices(void)
- /* register any fixups */
- for (i = 0; i < board.has_caldata; i++)
- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-- board.caldata[i].endian_check);
-+ board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
-
- return 0;
- }
---- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -183,13 +183,15 @@ static void ath9k_pci_fixup(struct pci_d
- DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-
- void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-- unsigned endian_check)
-+ unsigned endian_check, int led_pin, bool led_active_high)
- {
- if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
- return;
-
- ath9k_fixups[ath9k_num_fixups].slot = slot;
- ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
-+ ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin;
-+ ath9k_fixups[ath9k_num_fixups].pdata.led_active_high = led_active_high;
-
- if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
- return;
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -21,6 +21,8 @@ struct ath9k_caldata {
- unsigned int slot;
- u32 caldata_offset;
- unsigned int endian_check:1;
-+ int led_pin;
-+ bool led_active_high;
- };
-
- /*
---- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -3,6 +3,6 @@
-
-
- void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-- unsigned endian_check) __init;
-+ unsigned endian_check, int led_pin, bool led_active_high) __init;
-
- #endif /* _PCI_ATH9K_FIXUP */
+++ /dev/null
-From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 7 Jan 2013 17:45:39 +0100
-Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
-
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 17 ++++-
- arch/mips/bcm63xx/dev-flash.c | 2 +-
- arch/mips/bcm63xx/pci-rt2x00-fixup.c | 71 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +-
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 9 ++-
- .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h | 9 +++
- 7 files changed, 104 insertions(+), 8 deletions(-)
- create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- dev-pcmcia.o dev-rng.o \
- dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
-- pci-ath9k-fixup.o usb-common.o sprom.o
-+ pci-ath9k-fixup.o pci-rt2x00-fixup.o usb-common.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -33,6 +33,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
- #include <pci_ath9k_fixup.h>
-+#include <pci_rt2x00_fixup.h>
-
- #include "board_common.h"
-
-@@ -248,9 +249,19 @@ int __init board_register_devices(void)
- }
-
- /* register any fixups */
-- for (i = 0; i < board.has_caldata; i++)
-- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-- board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
-+ for (i = 0; i < board.has_caldata; i++) {
-+ switch (board.caldata[i].vendor) {
-+ case PCI_VENDOR_ID_ATHEROS:
-+ pci_enable_ath9k_fixup(board.caldata[i].slot,
-+ board.caldata[i].caldata_offset, board.caldata[i].endian_check,
-+ board.caldata[i].led_pin, board.caldata[i].led_active_high);
-+ break;
-+ case PCI_VENDOR_ID_RALINK:
-+ pci_enable_rt2x00_fixup(board.caldata[i].slot,
-+ board.caldata[i].eeprom);
-+ break;
-+ }
-+ }
-
- return 0;
- }
---- /dev/null
-+++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
-@@ -0,0 +1,72 @@
-+/*
-+ * Broadcom BCM63XX RT2x00 EEPROM fixup helper.
-+ *
-+ * Copyright (C) 2012 Álvaro Fernández Rojas <noltari@gmail.com>
-+ *
-+ * Based on
-+ *
-+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
-+ *
-+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/pci.h>
-+#include <linux/platform_device.h>
-+#include <linux/rt2x00_platform.h>
-+
-+#include <bcm63xx_nvram.h>
-+#include <pci_rt2x00_fixup.h>
-+
-+struct rt2x00_fixup {
-+ unsigned slot;
-+ u8 mac[ETH_ALEN];
-+ struct rt2x00_platform_data pdata;
-+};
-+
-+static int rt2x00_num_fixups;
-+static struct rt2x00_fixup rt2x00_fixups[2] = {
-+ {
-+ .slot = 255,
-+ },
-+ {
-+ .slot = 255,
-+ },
-+};
-+
-+static void rt2x00_pci_fixup(struct pci_dev *dev)
-+{
-+ unsigned i;
-+ struct rt2x00_platform_data *pdata = NULL;
-+
-+ for (i = 0; i < rt2x00_num_fixups; i++) {
-+ if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn))
-+ continue;
-+
-+ pdata = &rt2x00_fixups[i].pdata;
-+ break;
-+ }
-+
-+ dev->dev.platform_data = pdata;
-+}
-+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup);
-+
-+void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom)
-+{
-+ if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups))
-+ return;
-+
-+ rt2x00_fixups[rt2x00_num_fixups].slot = slot;
-+ rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
-+
-+ if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac))
-+ return;
-+
-+ rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac;
-+ rt2x00_num_fixups++;
-+}
-+
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -10,6 +10,7 @@
- #include <bcm63xx_dev_dsp.h>
- #include <bcm63xx_fallback_sprom.h>
- #include <pci_ath9k_fixup.h>
-+#include <pci_rt2x00_fixup.h>
-
- /*
- * flash mapping
-@@ -17,12 +18,16 @@
- #define BCM963XX_CFE_VERSION_OFFSET 0x570
- #define BCM963XX_NVRAM_OFFSET 0x580
-
--struct ath9k_caldata {
-+struct bcm63xx_caldata {
-+ unsigned int vendor;
- unsigned int slot;
- u32 caldata_offset;
-+ /* Atheros */
- unsigned int endian_check:1;
- int led_pin;
- bool led_active_high;
-+ /* Ralink */
-+ char* eeprom;
- };
-
- /*
-@@ -46,7 +51,7 @@ struct board_info {
- unsigned int has_caldata:2;
-
- /* wifi calibration data config */
-- struct ath9k_caldata caldata[2];
-+ struct bcm63xx_caldata caldata[2];
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
-@@ -0,0 +1,9 @@
-+#ifndef _PCI_RT2X00_FIXUP
-+#define _PCI_RT2X00_FIXUP
-+
-+#define PCI_VENDOR_ID_RALINK 0x1814
-+
-+void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init;
-+
-+#endif /* _PCI_RT2X00_FIXUP */
-+
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -332,6 +332,9 @@ struct bcm_enet_priv {
- struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
- int sw_port_link[ENETSW_MAX_PORT];
-
-+ /* platform device for associated switch */
-+ struct platform_device *b53_device;
-+
- /* used to poll switch port state */
- struct timer_list swphy_poll;
- spinlock_t enetsw_mdio_lock;
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -30,6 +30,7 @@
- #include <linux/dma-mapping.h>
- #include <linux/platform_device.h>
- #include <linux/if_vlan.h>
-+#include <linux/platform_data/b53.h>
-
- #include <bcm63xx_dev_enet.h>
- #include "bcm63xx_enet.h"
-@@ -1957,7 +1958,8 @@ static int bcm_enet_remove(struct platfo
- return 0;
- }
-
--struct platform_driver bcm63xx_enet_driver = {
-+
-+static struct platform_driver bcm63xx_enet_driver = {
- .probe = bcm_enet_probe,
- .remove = bcm_enet_remove,
- .driver = {
-@@ -1966,6 +1968,42 @@ struct platform_driver bcm63xx_enet_driv
- },
- };
-
-+struct b53_platform_data bcm63xx_b53_pdata = {
-+ .chip_id = 0x6300,
-+ .big_endian = 1,
-+};
-+
-+struct platform_device bcm63xx_b53_dev = {
-+ .name = "b53-switch",
-+ .id = -1,
-+ .dev = {
-+ .platform_data = &bcm63xx_b53_pdata,
-+ },
-+};
-+
-+static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask)
-+{
-+ int ret;
-+
-+ bcm63xx_b53_pdata.regs = priv->base;
-+ bcm63xx_b53_pdata.enabled_ports = port_mask;
-+ bcm63xx_b53_pdata.alias = priv->net_dev->name;
-+
-+ ret = platform_device_register(&bcm63xx_b53_dev);
-+ if (!ret)
-+ priv->b53_device = &bcm63xx_b53_dev;
-+
-+ return ret;
-+}
-+
-+static void bcmenet_switch_unregister(struct bcm_enet_priv *priv)
-+{
-+ if (priv->b53_device)
-+ platform_device_unregister(&bcm63xx_b53_dev);
-+
-+ priv->b53_device = NULL;
-+}
-+
- /*
- * switch mii access callbacks
- */
-@@ -2224,29 +2262,6 @@ static int bcm_enetsw_open(struct net_de
- enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
- }
-
-- /* reset mib */
-- val = enetsw_readb(priv, ENETSW_GMCR_REG);
-- val |= ENETSW_GMCR_RST_MIB_MASK;
-- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-- mdelay(1);
-- val &= ~ENETSW_GMCR_RST_MIB_MASK;
-- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-- mdelay(1);
--
-- /* force CPU port state */
-- val = enetsw_readb(priv, ENETSW_IMPOV_REG);
-- val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
-- enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
--
-- /* enable switch forward engine */
-- val = enetsw_readb(priv, ENETSW_SWMODE_REG);
-- val |= ENETSW_SWMODE_FWD_EN_MASK;
-- enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
--
-- /* enable jumbo on all ports */
-- enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
-- enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
--
- /* initialize flow control buffer allocation */
- enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
- ENETDMA_BUFALLOC_REG(priv->rx_chan));
-@@ -2705,6 +2720,9 @@ static int bcm_enetsw_probe(struct platf
- struct bcm63xx_enetsw_platform_data *pd;
- struct resource *res_mem;
- int ret, irq_rx, irq_tx;
-+ unsigned i, num_ports = 0;
-+ u16 port_mask = BIT(8);
-+ u8 val;
-
- if (!bcm_enet_shared_base[0])
- return -EPROBE_DEFER;
-@@ -2787,6 +2805,43 @@ static int bcm_enetsw_probe(struct platf
- priv->pdev = pdev;
- priv->net_dev = dev;
-
-+ /* reset mib */
-+ val = enetsw_readb(priv, ENETSW_GMCR_REG);
-+ val |= ENETSW_GMCR_RST_MIB_MASK;
-+ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-+ mdelay(1);
-+ val &= ~ENETSW_GMCR_RST_MIB_MASK;
-+ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-+ mdelay(1);
-+
-+ /* force CPU port state */
-+ val = enetsw_readb(priv, ENETSW_IMPOV_REG);
-+ val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
-+ enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
-+
-+ /* enable switch forward engine */
-+ val = enetsw_readb(priv, ENETSW_SWMODE_REG);
-+ val |= ENETSW_SWMODE_FWD_EN_MASK;
-+ enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
-+
-+ /* enable jumbo on all ports */
-+ enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
-+ enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
-+
-+ for (i = 0; i < priv->num_ports; i++) {
-+ struct bcm63xx_enetsw_port *port = &priv->used_ports[i];
-+
-+ if (!port->used)
-+ continue;
-+
-+ num_ports++;
-+ port_mask |= BIT(i);
-+ }
-+
-+ /* only register if there is more than one external port */
-+ if (num_ports > 1)
-+ bcmenet_switch_register(priv, port_mask);
-+
- return 0;
-
- out_disable_clk:
-@@ -2808,6 +2863,9 @@ static int bcm_enetsw_remove(struct plat
- priv = netdev_priv(dev);
- unregister_netdev(dev);
-
-+ /* remove switch */
-+ bcmenet_switch_unregister(priv);
-+
- clk_disable_unprepare(priv->mac_clk);
-
- free_netdev(dev);
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2764,9 +2764,9 @@ static int bcm_enetsw_probe(struct platf
- if (ret)
- goto out;
-
-- priv->base = devm_ioremap_resource(&pdev->dev, res_mem);
-- if (IS_ERR(priv->base)) {
-- ret = PTR_ERR(priv->base);
-+ priv->base = devm_ioremap(&pdev->dev, res_mem->start, resource_size(res_mem));
-+ if (priv->base == NULL) {
-+ ret = -ENOMEM;
- goto out;
- }
-
+++ /dev/null
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -32,6 +32,7 @@
- #include <linux/vmalloc.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
-+#include <linux/of.h>
-
- #include <asm/mach-bcm63xx/bcm63xx_nvram.h>
- #include <asm/mach-bcm63xx/bcm963xx_tag.h>
-@@ -43,46 +44,35 @@
-
- #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
-
--static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
-- struct mtd_partition **pparts,
-- struct mtd_part_parser_data *data)
-+static bool node_has_compatible(struct device_node *pp)
-+{
-+ return of_get_property(pp, "compatible", NULL);
-+}
-+
-+static int parse_bcmtag(struct mtd_info *master, struct mtd_partition *pparts,
-+ int next_part, size_t offset, size_t size)
- {
-- /* CFE, NVRAM and global Linux are always present */
-- int nrparts = 3, curpart = 0;
- struct bcm_tag *buf;
-- struct mtd_partition *parts;
-+ u32 computed_crc;
- int ret;
- size_t retlen;
-- unsigned int rootfsaddr, kerneladdr, spareaddr;
-- unsigned int rootfslen, kernellen, sparelen, totallen;
-- unsigned int cfelen, nvramlen;
-- unsigned int cfe_erasesize;
-- int i;
-- u32 computed_crc;
-+ unsigned int rootfsaddr, kerneladdr;
-+ unsigned int rootfslen, kernellen, totallen;
- bool rootfs_first = false;
--
-- if (!bcm63xx_is_cfe_present())
-- return -EINVAL;
--
-- cfe_erasesize = max_t(uint32_t, master->erasesize,
-- BCM63XX_CFE_BLOCK_SIZE);
--
-- cfelen = cfe_erasesize;
-- nvramlen = bcm63xx_nvram_get_psi_size() * SZ_1K;
-- nvramlen = roundup(nvramlen, cfe_erasesize);
-+ int curr_part = next_part;
-
- /* Allocate memory for buffer */
-- buf = vmalloc(sizeof(struct bcm_tag));
-+ buf = vmalloc(sizeof(*buf));
- if (!buf)
- return -ENOMEM;
-
- /* Get the tag */
-- ret = mtd_read(master, cfelen, sizeof(struct bcm_tag), &retlen,
-+ ret = mtd_read(master, offset, sizeof(*buf), &retlen,
- (void *)buf);
-
-- if (retlen != sizeof(struct bcm_tag)) {
-+ if (retlen != sizeof(*buf)) {
- vfree(buf);
-- return -EIO;
-+ return 0;
- }
-
- computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
-@@ -101,7 +91,6 @@ static int bcm63xx_parse_cfe_partitions(
-
- kerneladdr = kerneladdr - BCM63XX_EXTENDED_SIZE;
- rootfsaddr = rootfsaddr - BCM63XX_EXTENDED_SIZE;
-- spareaddr = roundup(totallen, master->erasesize) + cfelen;
-
- if (rootfsaddr < kerneladdr) {
- /* default Broadcom layout */
-@@ -110,8 +99,8 @@ static int bcm63xx_parse_cfe_partitions(
- } else {
- /* OpenWrt layout */
- rootfsaddr = kerneladdr + kernellen;
-- rootfslen = buf->real_rootfs_length;
-- spareaddr = rootfsaddr + rootfslen;
-+ rootfslen = size - kernellen -
-+ sizeof(*buf);
- }
- } else {
- pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n",
-@@ -119,23 +108,145 @@ static int bcm63xx_parse_cfe_partitions(
- kernellen = 0;
- rootfslen = 0;
- rootfsaddr = 0;
-- spareaddr = cfelen;
- }
-- sparelen = master->size - spareaddr - nvramlen;
-
-- /* Determine number of partitions */
-- if (rootfslen > 0)
-- nrparts++;
-+ if (kernellen > 0) {
-+ int kernelpart = curr_part;
-+
-+ if (rootfslen > 0 && rootfs_first)
-+ kernelpart++;
-+ pparts[kernelpart].name = "kernel";
-+ pparts[kernelpart].offset = kerneladdr;
-+ pparts[kernelpart].size = kernellen;
-+ curr_part++;
-+ }
-+
-+ if (rootfslen > 0) {
-+ int rootfspart = curr_part;
-+
-+ if (kernellen > 0 && rootfs_first)
-+ rootfspart--;
-+ pparts[rootfspart].name = "rootfs";
-+ pparts[rootfspart].offset = rootfsaddr;
-+ pparts[rootfspart].size = rootfslen;
-+
-+ curr_part++;
-+ }
-+
-+ vfree(buf);
-+
-+ return curr_part - next_part;
-+}
-+
-+
-+static int bcm63xx_parse_cfe_partitions_of(struct mtd_info *master,
-+ struct mtd_partition **pparts,
-+ struct mtd_part_parser_data *data)
-+{
-+ struct device_node *dp, *mtd_node = mtd_get_of_node(master);
-+ struct device_node *pp;
-+ int i, nr_parts = 0;
-+ const char *partname;
-+ int len;
-+
-+ dp = of_get_child_by_name(mtd_node, "partitions");
-+ if (!dp)
-+ dp = mtd_node;
-+
-+ for_each_child_of_node(dp, pp) {
-+ if (node_has_compatible(pp) && dp == mtd_node)
-+ continue;
-+
-+ if (!of_get_property(pp, "reg", &len))
-+ continue;
-+
-+ partname = of_get_property(pp, "label", &len);
-+ if (!partname)
-+ partname = of_get_property(pp, "name", &len);
-+
-+ if (!strcmp(partname, "linux") ||
-+ of_device_is_compatible(pp, "brcm,bcm963xx-imagetag"))
-+ nr_parts += 2;
-+
-+ nr_parts++;
-+ }
-+
-+ *pparts = kzalloc(nr_parts * sizeof(**pparts), GFP_KERNEL);
-+ if (!*pparts)
-+ return -ENOMEM;
-+
-+ i = 0;
-+ for_each_child_of_node(dp, pp) {
-+ const __be32 *reg;
-+ int a_cells, s_cells;
-+ size_t size, offset;
-+
-+ if (node_has_compatible(pp) && dp == mtd_node)
-+ continue;
-+
-+ reg = of_get_property(pp, "reg", &len);
-+ if (!reg)
-+ continue;
-+
-+ a_cells = of_n_addr_cells(pp);
-+ s_cells = of_n_size_cells(pp);
-+ offset = of_read_number(reg, a_cells);
-+ size = of_read_number(reg + a_cells, s_cells);
-+ partname = of_get_property(pp, "label", &len);
-+ if (!partname)
-+ partname = of_get_property(pp, "name", &len);
-+
-+ if (!strcmp(partname, "linux") ||
-+ of_device_is_compatible(pp, "brcm,bcm963xx-imagetag"))
-+ i += parse_bcmtag(master, *pparts, i, offset, size);
-+
-+ if (of_get_property(pp, "read-only", &len))
-+ (*pparts)[i].mask_flags |= MTD_WRITEABLE;
-+
-+ if (of_get_property(pp, "lock", &len))
-+ (*pparts)[i].mask_flags |= MTD_POWERUP_LOCK;
-+
-+ (*pparts)[i].offset = offset;
-+ (*pparts)[i].size = size;
-+ (*pparts)[i].name = partname;
-+
-+ i++;
-+ }
-+
-+ return i;
-+}
-+
-+static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
-+ struct mtd_partition **pparts,
-+ struct mtd_part_parser_data *data)
-+{
-+ /* CFE, NVRAM and global Linux are always present */
-+ int nrparts = 5, curpart = 0;
-+ struct mtd_partition *parts;
-+ unsigned int nvramaddr;
-+ unsigned int cfelen, nvramlen;
-+ unsigned int cfe_erasesize;
-+ unsigned int imageaddr, imagelen;
-+ int i;
-+
-+ if (!bcm63xx_is_cfe_present())
-+ return -EINVAL;
-+
-+ cfe_erasesize = max_t(uint32_t, master->erasesize,
-+ BCM63XX_CFE_BLOCK_SIZE);
-+
-+ cfelen = cfe_erasesize;
-+ nvramlen = bcm63xx_nvram_get_psi_size() * SZ_1K;
-+ nvramlen = roundup(nvramlen, cfe_erasesize);
-+ nvramaddr = master->size - nvramlen;
-
-- if (kernellen > 0)
-- nrparts++;
-+ imageaddr = cfelen;
-+ imagelen = nvramaddr - imageaddr;
-
- /* Ask kernel for more memory */
- parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
-- if (!parts) {
-- vfree(buf);
-+ if (!parts)
- return -ENOMEM;
-- }
-
- /* Start building partition list */
- parts[curpart].name = "CFE";
-@@ -143,29 +254,7 @@ static int bcm63xx_parse_cfe_partitions(
- parts[curpart].size = cfelen;
- curpart++;
-
-- if (kernellen > 0) {
-- int kernelpart = curpart;
--
-- if (rootfslen > 0 && rootfs_first)
-- kernelpart++;
-- parts[kernelpart].name = "kernel";
-- parts[kernelpart].offset = kerneladdr;
-- parts[kernelpart].size = kernellen;
-- curpart++;
-- }
--
-- if (rootfslen > 0) {
-- int rootfspart = curpart;
--
-- if (kernellen > 0 && rootfs_first)
-- rootfspart--;
-- parts[rootfspart].name = "rootfs";
-- parts[rootfspart].offset = rootfsaddr;
-- parts[rootfspart].size = rootfslen;
-- if (sparelen > 0 && !rootfs_first)
-- parts[rootfspart].size += sparelen;
-- curpart++;
-- }
-+ curpart += parse_bcmtag(master, parts, curpart, imageaddr, imagelen);
-
- parts[curpart].name = "nvram";
- parts[curpart].offset = master->size - nvramlen;
-@@ -174,25 +263,37 @@ static int bcm63xx_parse_cfe_partitions(
-
- /* Global partition "linux" to make easy firmware upgrade */
- parts[curpart].name = "linux";
-- parts[curpart].offset = cfelen;
-- parts[curpart].size = master->size - cfelen - nvramlen;
-+ parts[curpart].offset = imageaddr;
-+ parts[curpart].size = imagelen;
-+ curpart++;
-
-- for (i = 0; i < nrparts; i++)
-+ for (i = 0; i < curpart; i++)
- pr_info("Partition %d is %s offset %llx and length %llx\n", i,
- parts[i].name, parts[i].offset, parts[i].size);
-
-- pr_info("Spare partition is offset %x and length %x\n", spareaddr,
-- sparelen);
--
- *pparts = parts;
-- vfree(buf);
-
- return nrparts;
- };
-
-+
-+static int bcm63xx_parse_partitions(struct mtd_info *master,
-+ struct mtd_partition **pparts,
-+ struct mtd_part_parser_data *data)
-+{
-+ struct device_node *np, *mtd_node = mtd_get_of_node(master);
-+ np = of_get_child_by_name(mtd_node, "partitions");
-+
-+ if ((np && of_device_is_compatible(np, "fixed-partitions")) ||
-+ (!np && of_get_child_count(mtd_node)))
-+ return bcm63xx_parse_cfe_partitions_of(master, pparts, data);
-+ else
-+ return bcm63xx_parse_cfe_partitions(master, pparts, data);
-+}
-+
- static struct mtd_part_parser bcm63xx_cfe_parser = {
- .owner = THIS_MODULE,
-- .parse_fn = bcm63xx_parse_cfe_partitions,
-+ .parse_fn = bcm63xx_parse_partitions,
- .name = "bcm63xxpart",
- };
-
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -77,6 +77,8 @@ static struct board_info __initdata boar
-
- .has_enet0 = 1,
- .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -90,6 +92,8 @@ static struct board_info __initdata boar
-
- .has_enet0 = 1,
- .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -138,6 +142,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -170,6 +176,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -194,6 +202,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -224,6 +234,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -247,6 +259,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -268,6 +282,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -287,6 +303,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -314,6 +332,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -339,6 +359,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -364,6 +386,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -387,6 +411,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -46,7 +46,7 @@ static struct board_info __initdata boar
- .ephy_reset_gpio = 36,
- .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_3368 */
-
- /*
- * known 6328 boards
-@@ -65,7 +65,7 @@ static struct board_info __initdata boar
- .port_no = 0,
- },
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
- * known 6338 boards
-@@ -98,7 +98,7 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
- * known 6345 boards
-@@ -108,7 +108,7 @@ static struct board_info __initdata boar
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
- * known 6348 boards
-@@ -311,7 +311,7 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
- * known 6358 boards
-@@ -419,7 +419,7 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
- * all boards
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -311,6 +311,21 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
-+
-+static struct board_info __initdata board_96348_D4PW = {
-+ .name = "D-4P-W",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -447,6 +462,7 @@ static const struct board_info __initcon
- &board_DV201AMR,
- &board_96348gw_a,
- &board_rta1025w_16,
-+ &board_96348_D4PW,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -478,6 +494,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -434,6 +434,60 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
-+
-+static struct board_info __initdata board_nb4_ser_r0 = {
-+ .name = "NB4-SER-r0",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+};
-+
-+static struct board_info __initdata board_nb4_fxc_r1 = {
-+ .name = "NB4-FXC-r1",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -470,6 +524,8 @@ static const struct board_info __initcon
- &board_96358vw2,
- &board_AGPFS0,
- &board_DWVS0,
-+ &board_nb4_ser_r0,
-+ &board_nb4_fxc_r1,
- #endif
- };
-
-@@ -511,6 +567,8 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
-+ { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
-+ { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -98,6 +98,20 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct board_info __initdata board_96338w2_e7t = {
-+ .name = "96338W2_E7T",
-+ .expected_cpu_id = 0x6338,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
-@@ -503,6 +517,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
- &board_96338w,
-+ &board_96338w2_e7t,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-@@ -540,6 +555,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
- { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -401,6 +401,25 @@ static struct board_info __initdata boar
- .num_usbh_ports = 2,
- };
-
-+static struct board_info __initdata board_CPVA642 = {
-+ .name = "CPVA642",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
-+
-+
- static struct board_info __initdata board_AGPFS0 = {
- .name = "AGPF-S0",
- .expected_cpu_id = 0x6358,
-@@ -538,6 +557,7 @@ static const struct board_info __initcon
- &board_96358vw,
- &board_96358vw2,
- &board_AGPFS0,
-+ &board_CPVA642,
- &board_DWVS0,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-@@ -585,6 +605,7 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
- { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
- { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
-+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -468,6 +468,22 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- };
-
-+/* D-Link DSL-274xB revison C2/C3 */
-+static struct board_info __initdata board_dsl_274xb_rev_c = {
-+ .name = "AW4139",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_nb4_ser_r0 = {
- .name = "NB4-SER-r0",
- .expected_cpu_id = 0x6358,
-@@ -559,6 +575,7 @@ static const struct board_info __initcon
- &board_AGPFS0,
- &board_CPVA642,
- &board_DWVS0,
-+ &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- #endif
-@@ -598,6 +615,7 @@ static struct of_device_id const bcm963x
- { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
- { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -340,6 +340,44 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct sprom_fixup __initdata spw500v_fixups[] = {
-+ { .offset = 46, .value = 0x3046 },
-+ { .offset = 47, .value = 0x15a7 },
-+ { .offset = 48, .value = 0xfa89 },
-+ { .offset = 49, .value = 0xfe79 },
-+ { .offset = 57, .value = 0x6a49 },
-+};
-+
-+static struct board_info __initdata board_spw500v = {
-+ .name = "SPW500V",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .has_dsp = 1,
-+ .dsp = {
-+ .gpio_rst = 6,
-+ .gpio_int = 34,
-+ .ext_irq = 2,
-+ .cs = 2,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = spw500v_fixups,
-+ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -567,6 +605,7 @@ static const struct board_info __initcon
- &board_96348gw_a,
- &board_rta1025w_16,
- &board_96348_D4PW,
-+ &board_spw500v,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -608,6 +647,7 @@ static struct of_device_id const bcm963x
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
- { .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
-+ { .compatible = "t-com,spw500v", .data = &board_spw500v, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usr,9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -233,6 +233,64 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_gw6200 = {
-+ .name = "GW6200",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+
-+ .has_dsp = 1,
-+ .dsp = {
-+ .gpio_rst = 8, /* FIXME: What is real GPIO here? */
-+ .gpio_int = 34,
-+ .ext_irq = 2,
-+ .cs = 2,
-+ },
-+};
-+
-+static struct board_info __initdata board_gw6000 = {
-+ .name = "GW6000",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+
-+ .has_dsp = 1,
-+ .dsp = {
-+ .gpio_rst = 6,
-+ .gpio_int = 34,
-+ .ext_irq = 2,
-+ .cs = 2,
-+ },
-+};
-+
-+
-+
- static struct board_info __initdata board_FAST2404 = {
- .name = "F@ST2404",
- .expected_cpu_id = 0x6348,
-@@ -598,6 +656,8 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
- &board_96348gw,
-+ &board_gw6000,
-+ &board_gw6200,
- &board_96348gw_10,
- &board_96348gw_11,
- &board_FAST2404,
-@@ -648,6 +708,8 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
- { .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
- { .compatible = "t-com,spw500v", .data = &board_spw500v, },
-+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
-+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usr,9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -436,6 +436,39 @@ static struct board_info __initdata boar
- .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
- },
- };
-+
-+static struct board_info __initdata board_96348sv = {
-+ .name = "MAGIC",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ /* it has BP_ENET_EXTERNAL_PHY */
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_dsp = 1,
-+ .dsp = {
-+ .gpio_rst = 25,
-+ .gpio_int = 34,
-+ .cs = 2,
-+ .ext_irq = 2,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -666,6 +699,7 @@ static const struct board_info __initcon
- &board_rta1025w_16,
- &board_96348_D4PW,
- &board_spw500v,
-+ &board_96348sv,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -710,6 +744,7 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,spw500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
-+ { .compatible = "telsey,magic", .data = &board_96348sv, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usr,9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -666,6 +666,32 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- .num_usbh_ports = 2,
- };
-+
-+static struct board_info __initdata board_HW553 = {
-+ .name = "HW553",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -711,6 +737,7 @@ static const struct board_info __initcon
- &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-+ &board_HW553,
- #endif
- };
-
-@@ -754,6 +781,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "huawei,hg553", .data = &board_HW553, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -112,6 +112,20 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct board_info __initdata board_rta1320_16m = {
-+ .name = "RTA1320_16M",
-+ .expected_cpu_id = 0x6338,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
-@@ -708,6 +722,7 @@ static const struct board_info __initcon
- &board_96338gw,
- &board_96338w,
- &board_96338w2_e7t,
-+ &board_rta1320_16m,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-@@ -752,6 +767,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
- { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
- { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -706,6 +706,20 @@ static struct board_info __initdata boar
- .pci_dev = 1,
- },
- };
-+
-+ /* T-Home Speedport W 303V Typ B */
-+static struct board_info __initdata board_spw303v = {
-+ .name = "96358-502V",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -753,6 +767,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_HW553,
-+ &board_spw303v,
- #endif
- };
-
-@@ -804,6 +819,7 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
- { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
- { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
-+ { .compatible = "t-com,spw303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -483,6 +483,26 @@ static struct board_info __initdata boar
- .ext_irq = 2,
- },
- };
-+
-+static struct board_info __initdata board_V2500V_BB = {
-+ .name = "V2500V_BB",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -755,6 +775,7 @@ static const struct board_info __initcon
- &board_96348_D4PW,
- &board_spw500v,
- &board_96348sv,
-+ &board_V2500V_BB,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -794,6 +815,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
-@@ -853,6 +875,22 @@ void __init board_bcm963xx_init(void)
- val &= MPI_CSBASE_BASE_MASK;
- }
- boot_addr = (u8 *)KSEG1ADDR(val);
-+ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr);
-+
-+ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
-+ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
-+ /* Loading firmware from the CFE Prompt always loads to Bank 0 */
-+ /* Do an early check of CFE and then select bank 0 */
-+
-+ if (boot_addr == (u8 *)0xbf800000) {
-+ u8 *tmp_boot_addr = (u8*)0xbfc00000;
-+
-+ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
-+ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
-+ pr_info("V2500V: nvram bank 0\n");
-+ boot_addr = tmp_boot_addr;
-+ }
-+ }
-
- /* dump cfe version */
- cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -21,6 +21,7 @@
- #include <linux/spi/spi.h>
- #include <linux/spi/flash.h>
-
-+#include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
- #include <bcm63xx_regs.h>
-@@ -247,6 +248,13 @@ int __init bcm63xx_flash_register(void)
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
- val &= MPI_CSBASE_BASE_MASK;
-
-+ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
-+ /* Loading from CFE always uses Bank 0 */
-+ if (!strcmp(board_get_name(), "V2500V_BB")) {
-+ pr_info("V2500V: Start in Bank 0\n");
-+ val = val + 0x400000; // Select Bank 0 start address
-+ }
-+
- mtd_resources[0].start = val;
- mtd_resources[0].end = 0x1FFFFFFF;
- }
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -216,6 +216,24 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+
-+/* BT Voyager 2110 */
-+static struct board_info __initdata board_V2110 = {
-+ .name = "V2110",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -776,6 +794,7 @@ static const struct board_info __initcon
- &board_spw500v,
- &board_96348sv,
- &board_V2500V_BB,
-+ &board_V2110,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -815,6 +834,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "bt,v2110", .data = &board_V2110, },
- { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+++ /dev/null
-From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:55:52 +0100
-Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support
-
----
- arch/mips/bcm63xx/boards/Kconfig | 6 +
- arch/mips/bcm63xx/boards/Makefile | 1 +
- arch/mips/bcm63xx/boards/board_common.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.h | 6 +
- arch/mips/bcm63xx/boards/board_livebox.c | 215 ++++++++++++++++++++++++++++++
- 5 files changed, 229 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -12,4 +12,10 @@ config BOARD_BCM963XX
- default y
- help
-
-+config BOARD_LIVEBOX
-+ bool "Inventel Livebox(es) boards"
-+ select SSB
-+ help
-+ Inventel Livebox boards using the RedBoot bootloader.
-+
- endmenu
---- a/arch/mips/bcm63xx/boards/Makefile
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -1,2 +1,3 @@
- obj-y += board_common.o
- obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
-+obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -55,7 +55,7 @@ void __init board_prom_init(void)
- if (fw_arg3 == CFE_EPTSEAL)
- board_bcm963xx_init();
- else
-- panic("unsupported bootloader detected");
-+ board_livebox_init();
- }
-
- static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -24,4 +24,10 @@ static inline void board_of_device_prese
- }
- #endif
-
-+#if defined(CONFIG_BOARD_LIVEBOX)
-+void board_livebox_init(void);
-+#else
-+static inline void board_livebox_init(void) { }
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_livebox.c
-@@ -0,0 +1,163 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/input.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <board_bcm963xx.h>
-+
-+#include "board_common.h"
-+
-+#define PFX "board_livebox: "
-+
-+static unsigned int mac_addr_used = 0;
-+
-+/*
-+ * known 6348 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+static struct board_info __initdata board_livebox_blue5g = {
-+ .name = "Livebox-blue-5g",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 31,
-+ },
-+
-+ .ephy_reset_gpio = 6,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+
-+ .has_dsp = 0, /*TODO some Liveboxes have dsp*/
-+ .dsp = {
-+ .gpio_rst = 6,
-+ .gpio_int = 35,
-+ .cs = 2,
-+ .ext_irq = 2,
-+ },
-+};
-+#endif
-+
-+/*
-+ * all boards
-+ */
-+static const struct board_info __initdata *bcm963xx_boards[] = {
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+ &board_livebox_blue5g
-+#endif
-+};
-+
-+static struct of_device_id const livebox_boards_dt[] = {
-+ { .compatible = "inventel,livebox-blue-5g", .data = &board_livebox_blue5g, },
-+ { }
-+};
-+
-+/*
-+ * register & return a new board mac address
-+ */
-+static int livebox_get_mac_address(u8 *mac)
-+{
-+ u8 *p;
-+ int count;
-+
-+ memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN);
-+
-+ p = mac + ETH_ALEN - 1;
-+ count = mac_addr_used;
-+
-+ while (count--) {
-+ do {
-+ (*p)++;
-+ if (*p != 0)
-+ break;
-+ p--;
-+ } while (p != mac);
-+ }
-+
-+ if (p == mac) {
-+ printk(KERN_ERR PFX "unable to fetch mac address\n");
-+ return -ENODEV;
-+ }
-+ mac_addr_used++;
-+
-+ return 0;
-+}
-+
-+/*
-+ * early init callback
-+ */
-+#define LIVEBOX_GPIO_DETECT_MASK 0x000000ff
-+#define LIVEBOX_BOOT_ADDR 0x1e400000
-+
-+#define LIVEBOX_HW_BLUE5G_9 0x90
-+
-+void __init board_livebox_init(void)
-+{
-+ u32 val;
-+ u8 hw_version;
-+ const struct board_info *board;
-+ const struct of_device_id *board_match;
-+
-+ /* find board by compat */
-+ board_match = bcm63xx_match_board(livebox_boards_dt);
-+ if (board_match) {
-+ board = board_match->data;
-+ } else {
-+ /* Get hardware version */
-+ val = bcm_gpio_readl(GPIO_CTL_LO_REG);
-+ val &= ~LIVEBOX_GPIO_DETECT_MASK;
-+ bcm_gpio_writel(val, GPIO_CTL_LO_REG);
-+
-+ hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG);
-+ hw_version &= LIVEBOX_GPIO_DETECT_MASK;
-+
-+ switch (hw_version) {
-+ case LIVEBOX_HW_BLUE5G_9:
-+ printk(KERN_INFO PFX "Livebox BLUE5G.9\n");
-+ board = bcm963xx_boards[0];
-+ break;
-+ default:
-+ printk(KERN_INFO PFX "Unknown livebox version: %02x\n",
-+ hw_version);
-+ /* use default livebox configuration */
-+ board = bcm963xx_boards[0];
-+ break;
-+ }
-+ }
-+
-+ /* use default livebox configuration */
-+ board_early_setup(board, livebox_get_mac_address);
-+
-+ /* read base address of boot chip select (0) */
-+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ val &= MPI_CSBASE_BASE_MASK;
-+ if (val != LIVEBOX_BOOT_ADDR) {
-+ printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n",
-+ val, LIVEBOX_BOOT_ADDR);
-+ bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff);
-+ }
-+}
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -234,6 +234,33 @@ static struct board_info __initdata boar
- };
-
-
-+static struct board_info __initdata board_ct536_ct5621 = {
-+ .name = "CT536_CT5621",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 0,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -795,6 +822,7 @@ static const struct board_info __initcon
- &board_96348sv,
- &board_V2500V_BB,
- &board_V2110,
-+ &board_ct536_ct5621,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -836,6 +864,8 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
- { .compatible = "bt,v2110", .data = &board_V2110, },
- { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
-+ { .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, },
-+ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -674,6 +674,7 @@ static struct board_info __initdata boar
- },
-
- .has_ohci0 = 1,
-+ .has_ehci0 = 1,
- };
-
- /* D-Link DSL-274xB revison C2/C3 */
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -261,6 +261,30 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_96348A_122 = {
-+ .name = "96348A-122",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -824,6 +848,7 @@ static const struct board_info __initcon
- &board_V2500V_BB,
- &board_V2110,
- &board_ct536_ct5621,
-+ &board_96348A_122,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -866,6 +891,7 @@ static struct of_device_id const bcm963x
- { .compatible = "bt,v2110", .data = &board_V2110, },
- { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, },
-+ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
- { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -233,6 +233,33 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_CPVA502plus = {
-+ .name = "CPVA502+",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ },
-+
-+ .ephy_reset_gpio = 4,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-
- static struct board_info __initdata board_ct536_ct5621 = {
- .name = "CT536_CT5621",
-@@ -849,6 +876,7 @@ static const struct board_info __initcon
- &board_V2110,
- &board_ct536_ct5621,
- &board_96348A_122,
-+ &board_CPVA502plus,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -901,6 +929,7 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,spw500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
-+ { .compatible = "telsey,cpva502+", .data = &board_CPVA502plus, },
- { .compatible = "telsey,magic", .data = &board_96348sv, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usr,9108", .data = &board_96348gw_a, },
+++ /dev/null
-From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Wed, 20 Jan 2010 16:21:30 +0100
-Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 +
- 2 files changed, 97 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -840,6 +840,58 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-+ * known 6368 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+static struct board_info __initdata board_96368mvwg = {
-+ .name = "96368MVWG",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port1",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port2",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0x12,
-+ .name = "port0",
-+ },
-+
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0x11,
-+ .name = "port3",
-+ },
-+ },
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6368 */
-+
-+/*
- * all boards
- */
- static const struct board_info __initconst *bcm963xx_boards[] = {
-@@ -891,6 +943,10 @@ static const struct board_info __initcon
- &board_HW553,
- &board_spw303v,
- #endif
-+
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+ &board_96368mvwg,
-+#endif
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-@@ -951,6 +1007,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- #endif
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -82,12 +82,25 @@ void __init board_early_setup(const stru
- bcm63xx_pci_enabled = 1;
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G2_PCI;
-+
-+ if (BCMCPU_IS_6368())
-+ val |= GPIO_MODE_6368_PCI_REQ1 |
-+ GPIO_MODE_6368_PCI_GNT1 |
-+ GPIO_MODE_6368_PCI_INTB |
-+ GPIO_MODE_6368_PCI_REQ0 |
-+ GPIO_MODE_6368_PCI_GNT0;
- }
- #endif
-
- if (board.has_pccard) {
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+
-+ if (BCMCPU_IS_6368())
-+ val |= GPIO_MODE_6368_PCMCIA_CD1 |
-+ GPIO_MODE_6368_PCMCIA_CD2 |
-+ GPIO_MODE_6368_PCMCIA_VS1 |
-+ GPIO_MODE_6368_PCMCIA_VS2;
- }
-
- if (board.has_enet0 && !board.enet0.use_internal_phy) {
+++ /dev/null
-From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Fri, 4 Nov 2011 12:33:48 +0100
-Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board.
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 67 +++++++++++++++++++++++++++++
- 1 files changed, 67 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -889,6 +889,45 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_ehci0 = 1,
- };
-+
-+static struct board_info __initdata board_96368mvngr = {
-+ .name = "96368MVNgr",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-@@ -946,6 +985,7 @@ static const struct board_info __initcon
-
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
-+ &board_96368mvngr,
- #endif
- };
-
-@@ -1007,6 +1047,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
-From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 29 May 2012 10:52:25 +0200
-Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 77 +++++++++++++++++++++++++++++
- 1 files changed, 77 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -64,6 +64,33 @@ static struct board_info __initdata boar
- .use_fullspeed = 0,
- .port_no = 0,
- },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
- };
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
+++ /dev/null
-From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 29 May 2012 11:01:12 +0200
-Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 71 +++++++++++++++++++++++++++++
- 1 files changed, 71 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -92,6 +92,40 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_963281TAN = {
-+ .name = "963281TAN",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -966,6 +1000,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_963281TAN,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -1022,6 +1057,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
-From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 30 Apr 2012 09:10:51 +0200
-Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link
- DSL-274xB rev F1
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 104 +++++++++++++++++++++++++++++
- 1 files changed, 104 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -126,6 +126,51 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_dsl_274xb_f1 = {
-+ .name = "AW4339U",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0x7d1000,
-+ .slot = 0,
-+ .led_pin = -1,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 1",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -1001,6 +1046,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_963281TAN,
-+ &board_dsl_274xb_f1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -1059,6 +1105,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -600,6 +600,24 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- };
-
-+/* NetGear DG834G v4 */
-+static struct board_info __initdata board_96348W3 = {
-+ .name = "96348W3",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+};
-+
- static struct board_info __initdata board_96348_D4PW = {
- .name = "D-4P-W",
- .expected_cpu_id = 0x6348,
-@@ -1076,6 +1094,7 @@ static const struct board_info __initcon
- &board_ct536_ct5621,
- &board_96348A_122,
- &board_CPVA502plus,
-+ &board_96348W3,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -1131,6 +1150,7 @@ static struct of_device_id const bcm963x
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
-+ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
- { .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
- { .compatible = "t-com,spw500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -922,6 +922,30 @@ static struct board_info __initdata boar
- .num_usbh_ports = 2,
- };
-
-+static struct board_info __initdata board_ct6373_1 = {
-+ .name = "CT6373-1",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW553 = {
- .name = "HW553",
- .expected_cpu_id = 0x6358,
-@@ -1106,6 +1130,7 @@ static const struct board_info __initcon
- &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-+ &board_ct6373_1,
- &board_HW553,
- &board_spw303v,
- #endif
-@@ -1164,6 +1189,7 @@ static struct of_device_id const bcm963x
- { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
- { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "huawei,hg553", .data = &board_HW553, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -985,6 +985,35 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- };
-+
-+/* D-Link DVA-G3810BN/TL */
-+static struct board_info __initdata board_DVAG3810BN = {
-+ .name = "DVAG3810BN",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 0,
-+ .use_internal_phy = 1,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -1133,6 +1162,7 @@ static const struct board_info __initcon
- &board_ct6373_1,
- &board_HW553,
- &board_spw303v,
-+ &board_DVAG3810BN,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-@@ -1192,6 +1222,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
- { .compatible = "huawei,hg553", .data = &board_HW553, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1016,6 +1016,32 @@ static struct board_info __initdata boar
- };
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+static struct board_info __initdata board_nb6 = {
-+ .name = "NB6",
-+ .expected_cpu_id = 0x6362,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6362 */
-+
- /*
- * known 6368 boards
- */
-@@ -1165,6 +1191,10 @@ static const struct board_info __initcon
- &board_DVAG3810BN,
- #endif
-
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+ &board_nb6,
-+#endif
-+
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-@@ -1233,6 +1263,9 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,spw303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+ { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, },
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -533,6 +533,22 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_FAST2604 = {
-+ .name = "F@ST2604",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_rta1025w_16 = {
- .name = "RTA1025W_16",
- .expected_cpu_id = 0x6348,
-@@ -1162,6 +1178,7 @@ static const struct board_info __initcon
- &board_96348gw_10,
- &board_96348gw_11,
- &board_FAST2404,
-+ &board_FAST2604,
- &board_DV201AMR,
- &board_96348gw_a,
- &board_rta1025w_16,
-@@ -1237,6 +1254,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, },
- { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
- { .compatible = "sagem,f@st2404", .data = &board_FAST2404, },
-+ { .compatible = "sagem,f@st2604", .data = &board_FAST2604, },
- { .compatible = "t-com,spw500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -127,6 +127,49 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_A4001N1 = {
-+ .name = "963281T_TEF",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- static struct board_info __initdata board_dsl_274xb_f1 = {
- .name = "AW4339U",
- .expected_cpu_id = 0x6328,
-@@ -1159,6 +1202,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_963281TAN,
-+ &board_A4001N1,
- &board_dsl_274xb_f1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
-@@ -1224,6 +1268,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
- { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -93,6 +93,78 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5387un_fixups[] = {
-+ { .offset = 2, .value = 0x05bb },
-+ { .offset = 65, .value = 0x1204 },
-+ { .offset = 78, .value = 0x0303 },
-+ { .offset = 79, .value = 0x0202 },
-+ { .offset = 80, .value = 0xff02 },
-+ { .offset = 87, .value = 0x0315 },
-+ { .offset = 88, .value = 0x0315 },
-+ { .offset = 96, .value = 0x2048 },
-+ { .offset = 97, .value = 0xff11 },
-+ { .offset = 98, .value = 0x1567 },
-+ { .offset = 99, .value = 0xfb24 },
-+ { .offset = 100, .value = 0x3e3c },
-+ { .offset = 101, .value = 0x4038 },
-+ { .offset = 102, .value = 0xfe7f },
-+ { .offset = 103, .value = 0x1279 },
-+ { .offset = 112, .value = 0x2048 },
-+ { .offset = 113, .value = 0xff03 },
-+ { .offset = 114, .value = 0x154c },
-+ { .offset = 115, .value = 0xfb27 },
-+ { .offset = 116, .value = 0x3e3c },
-+ { .offset = 117, .value = 0x4038 },
-+ { .offset = 118, .value = 0xfe87 },
-+ { .offset = 119, .value = 0x1233 },
-+ { .offset = 203, .value = 0x2226 },
-+};
-+
-+static struct board_info __initdata board_AR5387un = {
-+ .name = "96328A-1441N1",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5387un_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
-+ },
-+};
-+
- static struct board_info __initdata board_963281TAN = {
- .name = "963281TAN",
- .expected_cpu_id = 0x6328,
-@@ -1201,6 +1273,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AR5387un,
- &board_963281TAN,
- &board_A4001N1,
- &board_dsl_274xb_f1,
-@@ -1271,6 +1344,7 @@ static struct of_device_id const bcm963x
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -93,6 +93,60 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5381u_fixups[] = {
-+ { .offset = 97, .value = 0xfee5 },
-+ { .offset = 98, .value = 0x157c },
-+ { .offset = 99, .value = 0xfae7 },
-+ { .offset = 113, .value = 0xfefa },
-+ { .offset = 114, .value = 0x15d6 },
-+ { .offset = 115, .value = 0xfaf8 },
-+};
-+
-+static struct board_info __initdata board_AR5381u = {
-+ .name = "96328A-1241N",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5381u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata ar5387un_fixups[] = {
- { .offset = 2, .value = 0x05bb },
- { .offset = 65, .value = 0x1204 },
-@@ -1273,6 +1327,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
- &board_A4001N1,
-@@ -1344,6 +1399,7 @@ static struct of_device_id const bcm963x
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -411,6 +411,20 @@ static struct board_info __initdata boar
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
- };
-+
-+static struct board_info __initdata board_rta770bw = {
-+ .name = "RTA770BW",
-+ .expected_cpu_id = 0x6345,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
-@@ -1341,6 +1355,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-+ &board_rta770bw,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
-@@ -1411,6 +1426,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
-+ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -12,6 +12,7 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
-+#include <linux/pci_ids.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -1171,6 +1172,92 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HW556_C = {
-+ .name = "HW556_C",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0xeffe00,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+static struct board_info __initdata board_HW556_A = {
-+ .name = "HW556_A",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0xf7e000,
-+ .slot = 1,
-+ .endian_check = 1,
-+ .led_pin = 2,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+static struct board_info __initdata board_HW556_B = {
-+ .name = "HW556_B",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0xefe000,
-+ .slot = 1,
-+ .endian_check = 1,
-+ .led_pin = 2,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- /* T-Home Speedport W 303V Typ B */
- static struct board_info __initdata board_spw303v = {
- .name = "96358-502V",
-@@ -1391,6 +1478,9 @@ static const struct board_info __initcon
- &board_nb4_fxc_r1,
- &board_ct6373_1,
- &board_HW553,
-+ &board_HW556_A,
-+ &board_HW556_B,
-+ &board_HW556_C,
- &board_spw303v,
- &board_DVAG3810BN,
- #endif
-@@ -1463,6 +1553,9 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
- { .compatible = "huawei,hg553", .data = &board_HW553, },
-+ { .compatible = "huawei,hg556a-a", .data = &board_HW556_A, },
-+ { .compatible = "huawei,hg556a-b", .data = &board_HW556_B, },
-+ { .compatible = "huawei,hg556a-c", .data = &board_HW556_C, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -426,6 +426,25 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+// Actually this board is the very same as the rta770bw,
-+// where the additional 'b' within the name just
-+// just indicates 'Annex B'. The ADSL Modem itself is able
-+// to handle both Annex A as well as Annex B -
-+// the loaded firmware makes the only difference
-+static struct board_info __initdata board_rta770w = {
-+ .name = "RTA770W",
-+ .expected_cpu_id = 0x6345,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
-@@ -1443,6 +1462,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
- &board_rta770bw,
-+ &board_rta770w,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
-@@ -1517,6 +1537,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
- { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
-+ { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+++ /dev/null
-From: Marcin Jurkowski <marcin1j@gmail.com>
-Date: Thu, 31 Oct 2013 22:33:10 +0000
-Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL
- router
-
-This adds kernel support support for Sagemcom F@st 2704 wireless ADSL
-router.
-It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+
-modem equipped with 64 MiB RAM and 8 MiB flash.
-
-Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -341,6 +341,43 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_FAST2704V2 = {
-+ .name = "F@ST2704V2",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .has_usbd = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -1452,6 +1489,7 @@ static const struct board_info __initcon
- &board_963281TAN,
- &board_A4001N1,
- &board_dsl_274xb_f1,
-+ &board_FAST2704V2,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -1527,6 +1565,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
-+ { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
-From: Max Staudt <openwrt.max@enpas.org>
-Date: Wed, 15 Jan 2014 18:51:13 +0000
-Subject: [PATCH] brcm63xx: F@ST2504n board support (Linux-3.10.26)
-
-Signed-off-by: Max Staudt <openwrt.max@enpas.org>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1382,6 +1382,41 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_fast2504n = {
-+ .name = "F@ST2504n",
-+ .expected_cpu_id = 0x6362,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6362 */
-
- /*
-@@ -1545,6 +1580,7 @@ static const struct board_info __initcon
-
- #ifdef CONFIG_BCM63XX_CPU_6362
- &board_nb6,
-+ &board_fast2504n,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-@@ -1626,6 +1662,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6362
-+ { .compatible = "sagem,f@st2504n", .data = &board_fast2504n, },
- { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -50,6 +50,55 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_3368 */
-
- /*
-+ * known 6318 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+static struct board_info __initdata board_96318ref = {
-+ .name = "96318REF",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6318 */
-+
-+/*
- * known 6328 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_6328
-@@ -1517,6 +1566,9 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_3368
- &board_cvg834g,
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ &board_96318ref,
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_AR5381u,
-@@ -1594,6 +1646,9 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_3368
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -96,6 +96,50 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_96318ref_p300 = {
-+ .name = "96318REF_P300",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -1568,6 +1612,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
-+ &board_96318ref_p300,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -1648,6 +1693,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
-+ { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1604,6 +1604,50 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-+ * known 63268/63269 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+static struct board_info __initdata board_963269bhr = {
-+ .name = "963269BHR",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_pci = 1,
-+
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_63268 */
-+
-+/*
- * all boards
- */
- static const struct board_info __initconst *bcm963xx_boards[] = {
-@@ -1684,6 +1728,9 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+ &board_963269bhr,
-+#endif
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-@@ -1771,6 +1818,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
- #endif
- #endif /* CONFIG_OF */
- { },
+++ /dev/null
-From: "mexit@o2.pl" <mexit@o2.pl>
-Date: Sun, 24 Nov 2013 21:33:38 +0000
-Subject: [PATCH 4/5] brcm63xx: add support for Asmax AR 1004g router
-
-Support for Asmax AR 1004g router
-
-Signed-off-by: Adrian Feliks <mexit@o2.pl>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -655,6 +655,21 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_96348gw_10_AR1004G = {
-+ .name = "AR1004G",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
-
- /* BT Voyager 2110 */
- static struct board_info __initdata board_V2110 = {
-@@ -1699,6 +1714,7 @@ static const struct board_info __initcon
- &board_96348A_122,
- &board_CPVA502plus,
- &board_96348W3,
-+ &board_96348gw_10_AR1004G,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -1763,6 +1779,7 @@ static struct of_device_id const bcm963x
- { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
-+ { .compatible = "asmax,ar1004g", .data = &board_96348gw_10_AR1004G, },
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1660,6 +1660,51 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_vw6339gu = {
-+ .name = "VW6339GU",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_ehci0 = 1,
-+ .has_ohci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN2",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN4",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 7,
-+ .name = "WAN",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_63268 */
-
- /*
-@@ -1746,6 +1791,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- &board_963269bhr,
-+ &board_vw6339gu,
- #endif
- };
-
-@@ -1836,6 +1882,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
-+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
- #endif
- #endif /* CONFIG_OF */
- { },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1622,6 +1622,64 @@ static struct board_info __initdata boar
- * known 63268/63269 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_63268
-+static struct board_info __initdata board_963268bu_p300 = {
-+ .name = "963268BU_P300",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_ehci0 = 1,
-+ .has_ohci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 17,
-+ .name = "FE1",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "GbE2",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0,
-+ .name = "GbE3",
-+ },
-+
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "GbE1",
-+ },
-+
-+ [6] = {
-+ .used = 1,
-+ .phy_id = 24,
-+ .name = "GbE4",
-+ },
-+
-+ [7] = {
-+ .used = 1,
-+ .phy_id = 25,
-+ .name = "GbE5",
-+ },
-+ },
-+ },
-+};
-+
- static struct board_info __initdata board_963269bhr = {
- .name = "963269BHR",
- .expected_cpu_id = 0x63268,
-@@ -1790,6 +1848,7 @@ static const struct board_info __initcon
- &board_96368mvngr,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ &board_963268bu_p300,
- &board_963269bhr,
- &board_vw6339gu,
- #endif
-@@ -1881,6 +1940,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
- { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
- { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -13,6 +13,8 @@
- #include <linux/kernel.h>
- #include <linux/string.h>
- #include <linux/pci_ids.h>
-+#include <linux/platform_data/b53.h>
-+#include <linux/spi/spi.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -1616,6 +1618,47 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_ehci0 = 1,
- };
-+
-+static struct sprom_fixup __initdata wap5813n_fixups[] = {
-+ { .offset = 97, .value = 0xfeed },
-+ { .offset = 98, .value = 0x15d1 },
-+ { .offset = 99, .value = 0xfb0d },
-+ { .offset = 113, .value = 0xfef7 },
-+ { .offset = 114, .value = 0x15f7 },
-+ { .offset = 115, .value = 0xfb1a },
-+};
-+
-+static struct board_info __initdata board_WAP5813n = {
-+ .name = "96369R-1231N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = wap5813n_fixups,
-+ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-@@ -1846,6 +1889,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- &board_963268bu_p300,
-@@ -1938,6 +1982,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
-+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1619,6 +1619,59 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct sprom_fixup __initdata vr3025u_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3025u = {
-+ .name = "96368M-1541N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3025u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -1889,6 +1942,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_VR3025u,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -1982,6 +2036,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
-+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1672,6 +1672,59 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata vr3025un_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3025un = {
-+ .name = "96368M-1341N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3025un_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -1943,6 +1996,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_VR3025u,
-+ &board_VR3025un,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -2037,6 +2091,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
-+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1628,6 +1628,48 @@ static struct sprom_fixup __initdata vr3
- { .offset = 115, .value = 0xfad9 },
- };
-
-+static struct board_info __initdata board_P870HW51A_V2 = {
-+ .name = "P870HW-51a_v2",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_VR3025u = {
- .name = "96368M-1541N",
- .expected_cpu_id = 0x6368,
-@@ -1995,6 +2037,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
- &board_WAP5813n,
-@@ -2093,6 +2136,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1312,6 +1312,36 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HW520 = {
-+ .name = "HW6358GW_B",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enet0 = 1,
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW553 = {
- .name = "HW553",
- .expected_cpu_id = 0x6358,
-@@ -2021,6 +2051,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_ct6373_1,
-+ &board_HW520,
- &board_HW553,
- &board_HW556_A,
- &board_HW556_B,
-@@ -2113,6 +2144,7 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, },
-+ { .compatible = "huawei,hg520v", .data = &board_HW520, },
- { .compatible = "huawei,hg553", .data = &board_HW553, },
- { .compatible = "huawei,hg556a-a", .data = &board_HW556_A, },
- { .compatible = "huawei,hg556a-b", .data = &board_HW556_B, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -349,6 +349,49 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_A4001N = {
-+ .name = "96328dg2x2",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- static struct board_info __initdata board_A4001N1 = {
- .name = "963281T_TEF",
- .expected_cpu_id = 0x6328,
-@@ -2002,6 +2045,7 @@ static const struct board_info __initcon
- &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
-+ &board_A4001N,
- &board_A4001N1,
- &board_dsl_274xb_f1,
- &board_FAST2704V2,
-@@ -2090,6 +2134,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -142,6 +142,74 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
-+ { .offset = 96, .value = 0x2046 },
-+ { .offset = 97, .value = 0xfe9d },
-+ { .offset = 98, .value = 0x1854 },
-+ { .offset = 99, .value = 0xfa59 },
-+ { .offset = 112, .value = 0x2046 },
-+ { .offset = 113, .value = 0xfe79 },
-+ { .offset = 114, .value = 0x17f5 },
-+ { .offset = 115, .value = 0xfa47 },
-+ { .offset = 161, .value = 0x2222 },
-+ { .offset = 162, .value = 0x2222 },
-+ { .offset = 169, .value = 0x2222 },
-+ { .offset = 170, .value = 0x2222 },
-+ { .offset = 171, .value = 0x5555 },
-+ { .offset = 172, .value = 0x5555 },
-+ { .offset = 173, .value = 0x4444 },
-+ { .offset = 174, .value = 0x4444 },
-+ { .offset = 175, .value = 0x5555 },
-+ { .offset = 176, .value = 0x5555 },
-+};
-+
-+static struct board_info __initdata board_dsl_2751b_d1 = {
-+ .name = "AW5200B",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = dsl2751b_e1_fixups,
-+ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -2039,6 +2107,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
- &board_96318ref_p300,
-+ &board_dsl_2751b_d1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -2132,6 +2201,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
-+ { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n", .data = &board_A4001N, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1760,6 +1760,30 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_DGND3700v1_3800B = {
-+ .name = "DGND3700v1_3800B",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2181,6 +2205,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_DGND3700v1_3800B,
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2283,6 +2308,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1423,6 +1423,31 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_homehub2a = {
-+ .name = "HOMEHUB2A",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4322,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW520 = {
- .name = "HW6358GW_B",
- .expected_cpu_id = 0x6358,
-@@ -2188,6 +2213,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_ct6373_1,
-+ &board_homehub2a,
- &board_HW520,
- &board_HW553,
- &board_HW556_A,
-@@ -2297,6 +2323,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
- { .compatible = "t-com,spw303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
-+ { .compatible = "thomson,homehub2a", .data = &board_homehub2a, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6362
- { .compatible = "sagem,f@st2504n", .data = &board_fast2504n, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1809,6 +1809,52 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HG655b = {
-+ .name = "HW65x",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0x7c0000,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2232,6 +2278,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_HG655b,
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2335,6 +2382,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "huawei,hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -210,6 +210,45 @@ static struct board_info __initdata boar
- .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
- },
- };
-+
-+static struct board_info __initdata board_FAST2704N = {
-+ .name = "F@ST2704N",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -2203,6 +2242,7 @@ static const struct board_info __initcon
- &board_96318ref,
- &board_96318ref_p300,
- &board_dsl_2751b_d1,
-+ &board_FAST2704N,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -2300,6 +2340,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
- { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, },
-+ { .compatible = "sagem,f@st2704n", .data = &board_FAST2704N, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n", .data = &board_A4001N, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2042,6 +2042,59 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata vr3026e_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3026e = {
-+ .name = "96368MT-1341N1",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3026e_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -2322,6 +2375,7 @@ static const struct board_info __initcon
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-+ &board_VR3026e,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -2422,6 +2476,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
-+ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- { .compatible = "huawei,hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -623,6 +623,50 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_R5010UNV2 = {
-+ .name = "96328ang",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -2306,6 +2350,7 @@ static const struct board_info __initcon
- &board_A4001N1,
- &board_dsl_274xb_f1,
- &board_FAST2704V2,
-+ &board_R5010UNV2,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -2404,6 +2449,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
-+ { .compatible = "nucom,r5010unv2", .data = &board_R5010UNV2, },
- { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1938,6 +1938,52 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HG622 = {
-+ .name = "96368MVWG_hg622",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0xfa0000,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2416,6 +2462,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
- &board_VR3025u,
-@@ -2524,6 +2571,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "huawei,hg622", .data = &board_HG622, },
- { .compatible = "huawei,hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1892,6 +1892,42 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata EVG2000_fixups[] = {
-+ { .offset = 219, .value = 0xec08 },
-+};
-+
-+static struct board_info __initdata board_EVG2000 = {
-+ .name = "96369PVG",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+ .use_fallback_sprom = 1,
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4322,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = EVG2000_fixups,
-+ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups),
-+ },
-+};
-+
- static struct board_info __initdata board_HG655b = {
- .name = "HW65x",
- .expected_cpu_id = 0x6368,
-@@ -2462,6 +2498,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_EVG2000,
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-@@ -2574,6 +2611,7 @@ static struct of_device_id const bcm963x
- { .compatible = "huawei,hg622", .data = &board_HG622, },
- { .compatible = "huawei,hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
-+ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1782,6 +1782,51 @@ static struct board_info __initdata boar
- * known 6368 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_6368
-+static struct board_info __initdata board_AV4202N = {
-+ .name = "96368_Swiss_S1",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+ .use_fallback_sprom = 1,
-+ .fallback_sprom = {
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+
-+};
-+
- static struct board_info __initdata board_96368mvwg = {
- .name = "96368MVWG",
- .expected_cpu_id = 0x6368,
-@@ -2495,6 +2540,7 @@ static const struct board_info __initcon
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ &board_AV4202N,
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-@@ -2602,6 +2648,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2266,6 +2266,44 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_VH4032N = {
-+ .name = "VH4032N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .use_fallback_sprom = 1,
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -2548,6 +2586,7 @@ static const struct board_info __initcon
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-+ &board_VH4032N,
- &board_VR3025u,
- &board_VR3025un,
- &board_VR3026e,
-@@ -2659,6 +2698,7 @@ static struct of_device_id const bcm963x
- { .compatible = "huawei,hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
-+ { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2116,6 +2116,29 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_R1000H = {
-+ .name = "R1000H",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+
- static struct board_info __initdata board_VR3025u = {
- .name = "96368M-1541N",
- .expected_cpu_id = 0x6368,
-@@ -2586,6 +2609,7 @@ static const struct board_info __initcon
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-+ &board_R1000H,
- &board_VH4032N,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2687,6 +2711,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "actiontec,r1000h", .data = &board_R1000H, },
- { .compatible = "adb,av4202n", .data = &board_AV4202N, },
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -143,6 +143,67 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5315u_fixups[] = {
-+ { .offset = 6, .value = 0x1c00 },
-+ { .offset = 65, .value = 0x1255 },
-+ { .offset = 97, .value = 0xfe55 },
-+ { .offset = 98, .value = 0x171d },
-+ { .offset = 99, .value = 0xfa42 },
-+ { .offset = 113, .value = 0xfeb7 },
-+ { .offset = 114, .value = 0x18cd },
-+ { .offset = 115, .value = 0xfa4f },
-+ { .offset = 162, .value = 0x6444 },
-+ { .offset = 170, .value = 0x6444 },
-+ { .offset = 172, .value = 0x6444 },
-+};
-+
-+static struct board_info __initdata board_AR5315u = {
-+ .name = "96318A-1441N1",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5315u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
- { .offset = 96, .value = 0x2046 },
- { .offset = 97, .value = 0xfe9d },
-@@ -2526,6 +2587,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
- &board_96318ref_p300,
-+ &board_AR5315u,
- &board_dsl_2751b_d1,
- &board_FAST2704N,
- #endif
-@@ -2631,6 +2693,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, },
-+ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, },
- { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, },
- { .compatible = "sagem,f@st2704n", .data = &board_FAST2704N, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -357,6 +357,73 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ad1018_fixups[] = {
-+ { .offset = 6, .value = 0x1c00 },
-+ { .offset = 65, .value = 0x1256 },
-+ { .offset = 96, .value = 0x2046 },
-+ { .offset = 97, .value = 0xfe69 },
-+ { .offset = 98, .value = 0x1726 },
-+ { .offset = 99, .value = 0xfa5c },
-+ { .offset = 112, .value = 0x2046 },
-+ { .offset = 113, .value = 0xfea8 },
-+ { .offset = 114, .value = 0x1978 },
-+ { .offset = 115, .value = 0xfa26 },
-+ { .offset = 161, .value = 0x2222 },
-+ { .offset = 169, .value = 0x2222 },
-+ { .offset = 171, .value = 0x2222 },
-+ { .offset = 173, .value = 0x2222 },
-+ { .offset = 174, .value = 0x4444 },
-+ { .offset = 175, .value = 0x2222 },
-+ { .offset = 176, .value = 0x4444 },
-+};
-+
-+static struct board_info __initdata board_AD1018 = {
-+ .name = "96328avngr",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "FIBRE",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ad1018_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata ar5381u_fixups[] = {
- { .offset = 97, .value = 0xfee5 },
- { .offset = 98, .value = 0x157c },
-@@ -2593,6 +2660,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AD1018,
- &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
-@@ -2707,6 +2775,7 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, },
- { .compatible = "nucom,r5010unv2", .data = &board_R5010UNV2, },
- { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, },
-+ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
---- a/arch/mips/bcm63xx/nvram.c
-+++ b/arch/mips/bcm63xx/nvram.c
-@@ -40,6 +40,12 @@ struct bcm963xx_nvram {
- static struct bcm963xx_nvram nvram;
- static int mac_addr_used;
-
-+/*
-+ * Required export for WL
-+ */
-+u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 };
-+EXPORT_SYMBOL(nvram_buf);
-+
- void __init bcm63xx_nvram_init(void *addr)
- {
- unsigned int check_len;
---- a/arch/mips/mm/cache.c
-+++ b/arch/mips/mm/cache.c
-@@ -59,6 +59,7 @@ void (*_dma_cache_wback)(unsigned long s
- void (*_dma_cache_inv)(unsigned long start, unsigned long size);
-
- EXPORT_SYMBOL(_dma_cache_wback_inv);
-+EXPORT_SYMBOL(_dma_cache_inv);
-
- #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */
-
+++ /dev/null
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -8,6 +8,7 @@
- */
-
- #include <linux/init.h>
-+#include <linux/export.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
- #include <linux/platform_device.h>
-@@ -387,7 +388,19 @@ struct fallback_sprom_match {
- struct ssb_sprom sprom;
- };
-
--static struct fallback_sprom_match fallback_sprom;
-+struct fallback_sprom_match fallback_sprom;
-+
-+int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out)
-+{
-+ if (pci_bus != fallback_sprom.pci_bus ||
-+ pci_slot != fallback_sprom.pci_dev)
-+ pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ pci_bus, pci_slot);
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+}
-+EXPORT_SYMBOL(bcm63xx_get_fallback_sprom);
-
- #if defined(CONFIG_SSB_PCIHOST)
- int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+++ /dev/null
-From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001
-From: Miguel GAIO <miguel.gaio@efixo.com>
-Date: Fri, 6 Jul 2012 14:12:33 +0200
-Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support
-
----
- drivers/net/phy/rtl8367.c | 5 +++++
- 1 files changed, 5 insertions(+), 0 deletions(-)
-
---- a/drivers/net/phy/rtl8367.c
-+++ b/drivers/net/phy/rtl8367.c
-@@ -146,6 +146,10 @@
- #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1
- #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7
-
-+#define RTL8367_PHY_AD_REG 0x130f
-+#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5
-+#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0
-+
- #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x))
- #define RTL8367_DI_FORCE_MODE BIT(12)
- #define RTL8367_DI_FORCE_NWAY BIT(7)
-@@ -897,6 +901,7 @@ static int rtl8367_extif_set_mode(struct
- case RTL8367_EXTIF_MODE_RGMII_33V:
- REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367);
- REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777);
-+ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0);
- break;
-
- case RTL8367_EXTIF_MODE_TMII_MAC:
+++ /dev/null
-From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 6 Apr 2014 22:33:16 +0200
-Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp
-
-Unligned memcpy_fromio randomly fails with an unaligned dst. Work around
-it by ensuring we are always doing aligned copies.
-
-Should fix filename corruption in jffs2 with SMP.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- fs/jffs2/nodelist.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/fs/jffs2/nodelist.h
-+++ b/fs/jffs2/nodelist.h
-@@ -259,7 +259,7 @@ struct jffs2_full_dirent
- uint32_t ino; /* == zero for unlink */
- unsigned int nhash;
- unsigned char type;
-- unsigned char name[0];
-+ unsigned char name[0] __attribute__((aligned((sizeof(long)))));
- };
-
- /*
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2259,6 +2259,10 @@ static int bcm_enetsw_open(struct net_de
-
- rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
- rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
-+ if (BCMCPU_IS_63268()) {
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN;
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN;
-+ }
- enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
- }
-
projects / openwrt / staging / hauke.git / commitdiff