drm/amd/display: Set one 4:2:0-related PPS field as recommended by DSC spec

[why]
'second_line_offset_adj' was mistakenly left at zero, even though DSC spec
v1.2a recommends setting this field to 512 for 4:2:0.

[how]
Set 'second_line_offset_adj' to 512 for 4:2:0 and leave at zero otherwise

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dsc/drm_dsc_dc.c b/drivers/gpu/drm/amd/display/dc/dsc/drm_dsc_dc.c
index 04c6295f296e58b5231b4a45f89be1efd8ad6d8b..fd1fb16534793025c09862a9e77c17a035276df4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dsc/drm_dsc_dc.c
+++ b/drivers/gpu/drm/amd/display/dc/dsc/drm_dsc_dc.c
@@ -442,6 +442,12 @@ int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg)
        vdsc_cfg->rc_bits = (hrd_delay * vdsc_cfg->bits_per_pixel) / 16;
        vdsc_cfg->initial_dec_delay = hrd_delay - vdsc_cfg->initial_xmit_delay;
 
+       /* As per DSC spec v1.2a recommendation: */
+       if (vdsc_cfg->native_420)
+               vdsc_cfg->second_line_offset_adj = 512;
+       else
+               vdsc_cfg->second_line_offset_adj = 0;
+
        return 0;
 }
 EXPORT_SYMBOL(drm_dsc_compute_rc_parameters);