rockchip: add ArmSoM Sige7 support

This board is also as known as Bananapi BPi-M7.

Hardware
--------
RockChip RK3588 ARM64 (8 cores)
8/16/32GB LPDDR4/LPDDR4x RAM
2x 2500 Base-T (PCIe, rtl8125b)
2 LEDs (RED / GREEN)
16GB/32GB/64GB/128GB eMMC on-board
Micro-SD Slot
USB 2.0 Port
USB 3.0 Port
M.2 M-Key
40-Pin Header
USB PD 2.0 9/12/15V Power

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/16462
Signed-off-by: Nick Hainke <vincent@systemli.org>

diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
index 193bfd90247da59b7198129b06106906be39b909..192b825244da4ebf6734842eafbe60fa1852475d 100644 (file)
--- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
+++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
@@ -7,12 +7,7 @@ rockchip_setup_interfaces()
        local board="$1"
 
        case "$board" in
-       friendlyarm,nanopc-t6|\
-       friendlyarm,nanopi-r5c|\
-       radxa,e25|\
-       radxa,rock-3b)
-               ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
-               ;;
+       armsom,sige7|\
        friendlyarm,nanopi-r2c|\
        friendlyarm,nanopi-r2c-plus|\
        friendlyarm,nanopi-r2s|\
@@ -24,6 +19,12 @@ rockchip_setup_interfaces()
        xunlong,orangepi-r1-plus-lts)
                ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
                ;;
+       friendlyarm,nanopc-t6|\
+       friendlyarm,nanopi-r5c|\
+       radxa,e25|\
+       radxa,rock-3b)
+               ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
+               ;;
        friendlyarm,nanopi-r5s)
                ucidef_set_interfaces_lan_wan 'eth1 eth2' 'eth0'
                ;;
@@ -47,6 +48,7 @@ rockchip_setup_macs()
        local label_mac=""
 
        case "$board" in
+       armsom,sige7|\
        friendlyarm,nanopc-t6|\
        friendlyarm,nanopi-r2c|\
        friendlyarm,nanopi-r2s)

diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
index c876bfe0ae4b8364ca15d674ff2967351be2b28f..f65d008ef4127a8a6a50862c78510f41d160df41 100644 (file)
--- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
+++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
@@ -29,6 +29,7 @@ set_interface_core() {
 }
 
 case "$(board_name)" in
+armsom,sige7|\
 friendlyarm,nanopc-t6|\
 friendlyarm,nanopi-r5c|\
 friendlyarm,nanopi-r6c|\

diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index c867037d0e2ccde12f087c583fb667671983f155..39eb3bb0343d10ea3b2c16166a0ddbdde3f44f59 100644 (file)
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -5,6 +5,17 @@
 # FIT will be loaded at 0x02080000. Leave 16M for that, align it to 2M and load the kernel after it.
 KERNEL_LOADADDR := 0x03200000
 
+define Device/armsom_sige7
+  DEVICE_VENDOR := ArmSoM
+  DEVICE_MODEL := Sige7
+  DEVICE_ALT0_VENDOR := Bananapi
+  DEVICE_ALT0_MODEL := BPi-M7
+  SOC := rk3588
+  DEVICE_DTS := rockchip/rk3588-armsom-sige7
+  DEVICE_PACKAGES := kmod-r8169
+endef
+TARGET_DEVICES += armsom_sige7
+
 define Device/firefly_roc-rk3328-cc
   DEVICE_VENDOR := Firefly
   DEVICE_MODEL := ROC-RK3328-CC

diff --git a/target/linux/rockchip/patches-6.6/052-16-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch b/target/linux/rockchip/patches-6.6/052-16-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch
deleted file mode 100644 (file)
index d59574b..0000000
--- a/target/linux/rockchip/patches-6.6/052-16-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 2f8064b9c4a012b4d4e8383818f13b682b6c156a Mon Sep 17 00:00:00 2001
-From: Alexey Charkov <alchark@gmail.com>
-Date: Mon, 17 Jun 2024 22:28:52 +0400
-Subject: [PATCH] arm64: dts: rockchip: enable thermal management on all RK3588
- boards
-
-This enables the on-chip thermal monitoring sensor (TSADC) on all
-RK3588(s) boards that don't have it enabled yet. It provides temperature
-monitoring for the SoC and emergency thermal shutdowns, and is thus
-important to have in place before CPU DVFS is enabled, as high CPU
-operating performance points can overheat the chip quickly in the
-absence of thermal management.
-
-Signed-off-by: Alexey Charkov <alchark@gmail.com>
-Link: https://lore.kernel.org/r/20240617-rk-dts-additions-v5-2-c1f5f3267f1e@gmail.com
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
----
- arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts          | 4 ++++
- arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi | 4 ++++
- arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts              | 4 ++++
- arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts              | 4 ++++
- arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts               | 4 ++++
- arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts           | 4 ++++
- arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi           | 4 ++++
- arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts              | 4 ++++
- 8 files changed, 32 insertions(+)
-
---- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
-@@ -807,6 +807,10 @@
-       status = "okay";
- };
- 
-+&tsadc {
-+      status = "okay";
-+};
-+
- &u2phy2 {
-       status = "okay";
- };
---- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-@@ -787,6 +787,10 @@
-       };
- };
- 
-+&tsadc {
-+      status = "okay";
-+};
-+
- &uart2 {
-       pinctrl-0 = <&uart2m0_xfer>;
-       status = "okay";
---- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
-@@ -741,6 +741,10 @@
-       };
- };
- 
-+&tsadc {
-+      status = "okay";
-+};
-+
- &u2phy0 {
-       status = "okay";
- };

diff --git a/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch b/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch
new file mode 100644 (file)
index 0000000..bc1845b
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch
@@ -0,0 +1,778 @@
+From 81c828a67c78bb03ea75819c417c93c7f3d637b5 Mon Sep 17 00:00:00 2001
+From: Jianfeng Liu <liujianfeng1994@gmail.com>
+Date: Sat, 20 Apr 2024 11:43:00 +0800
+Subject: [PATCH] arm64: dts: rockchip: Add ArmSom Sige7 board
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Specification:
+        Rockchip Rk3588 SoC
+        4x ARM Cortex-A76, 4x ARM Cortex-A55
+        8/16/32GB Memory LPDDR4/LPDDR4x
+        Mali G610MP4 GPU
+        2× MIPI-CSI Connector
+        1× MIPI-DSI Connector
+        1x M.2 Key M (PCIe 3.0 4-lanes)
+        2x RTL8125 2.5G Ethernet
+        Onboard AP6275P for WIFI6/BT5
+        32GB/64GB/128GB eMMC
+        MicroSD card slot
+        1x USB2.0, 1x USB3.0 Type-A, 1x US3.0 Type-C
+        1x HDMI Output, 1x type-C DP Output
+
+Functions work normally:
+        USB2.0 Host
+        USB3.0 Type-A Host
+        M.2 Key M (PCIe 3.0 4-lanes)
+        2x RTL8125 2.5G Ethernet
+        eMMC
+        MicroSD card
+
+More information can be obtained from the following website
+        https://docs.armsom.org/armsom-sige7
+
+Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
+Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com>
+Link: https://lore.kernel.org/r/20240420034300.176920-4-liujianfeng1994@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/Makefile         |   1 +
+ .../boot/dts/rockchip/rk3588-armsom-sige7.dts | 721 ++++++++++++++++++
+ 2 files changed, 722 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ra
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-sige7.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
+@@ -0,0 +1,721 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include "rk3588.dtsi"
++
++/ {
++      model = "ArmSoM Sige7";
++      compatible = "armsom,sige7", "rockchip,rk3588";
++
++      aliases {
++              mmc0 = &sdhci;
++              mmc1 = &sdmmc;
++      };
++
++      chosen {
++              stdout-path = "serial2:1500000n8";
++      };
++
++      analog-sound {
++              compatible = "audio-graph-card";
++              dais = <&i2s0_8ch_p0>;
++              label = "rk3588-es8316";
++              hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&hp_detect>;
++              routing = "MIC2", "Mic Jack",
++                        "Headphones", "HPOL",
++                        "Headphones", "HPOR";
++              widgets = "Microphone", "Mic Jack",
++                        "Headphone", "Headphones";
++      };
++
++      leds {
++              compatible = "gpio-leds";
++              pinctrl-names = "default";
++              pinctrl-0 = <&led_rgb_g>;
++
++              led_green: led-0 {
++                      color = <LED_COLOR_ID_GREEN>;
++                      function = LED_FUNCTION_STATUS;
++                      gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
++                      linux,default-trigger = "heartbeat";
++              };
++
++              led_red: led-1 {
++                      color = <LED_COLOR_ID_RED>;
++                      function = LED_FUNCTION_STATUS;
++                      gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
++                      linux,default-trigger = "none";
++              };
++      };
++
++      fan: pwm-fan {
++              compatible = "pwm-fan";
++              cooling-levels = <0 95 145 195 255>;
++              fan-supply = <&vcc5v0_sys>;
++              pwms = <&pwm1 0 50000 0>;
++              #cooling-cells = <2>;
++      };
++
++      vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
++              compatible = "regulator-fixed";
++              regulator-name = "vcc3v3_pcie2x1l2";
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              startup-delay-us = <5000>;
++              vin-supply = <&vcc_3v3_s3>;
++      };
++
++      vcc3v3_pcie30: vcc3v3-pcie30-regulator {
++              compatible = "regulator-fixed";
++              enable-active-high;
++              gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
++              regulator-name = "vcc3v3_pcie30";
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              startup-delay-us = <5000>;
++              vin-supply = <&vcc5v0_sys>;
++      };
++
++      vcc5v0_host: vcc5v0-host-regulator {
++              compatible = "regulator-fixed";
++              regulator-name = "vcc5v0_host";
++              regulator-boot-on;
++              regulator-always-on;
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++              enable-active-high;
++              gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&vcc5v0_host_en>;
++              vin-supply = <&vcc5v0_sys>;
++      };
++
++      vcc5v0_sys: vcc5v0-sys-regulator {
++              compatible = "regulator-fixed";
++              regulator-name = "vcc5v0_sys";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++      };
++
++      vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
++              compatible = "regulator-fixed";
++              regulator-name = "vcc_1v1_nldo_s3";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <1100000>;
++              regulator-max-microvolt = <1100000>;
++              vin-supply = <&vcc5v0_sys>;
++      };
++};
++
++&combphy0_ps {
++      status = "okay";
++};
++
++&combphy1_ps {
++      status = "okay";
++};
++
++&combphy2_psu {
++      status = "okay";
++};
++
++&cpu_b0 {
++      cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b1 {
++      cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b2 {
++      cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_b3 {
++      cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_l0 {
++      cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l1 {
++      cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l2 {
++      cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l3 {
++      cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&gpu {
++      mali-supply = <&vdd_gpu_s0>;
++      status = "okay";
++};
++
++&i2c0 {
++      pinctrl-names = "default";
++      pinctrl-0 = <&i2c0m2_xfer>;
++      status = "okay";
++
++      vdd_cpu_big0_s0: regulator@42 {
++              compatible = "rockchip,rk8602";
++              reg = <0x42>;
++              fcs,suspend-voltage-selector = <1>;
++              regulator-name = "vdd_cpu_big0_s0";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <550000>;
++              regulator-max-microvolt = <1050000>;
++              regulator-ramp-delay = <2300>;
++              vin-supply = <&vcc5v0_sys>;
++
++              regulator-state-mem {
++                      regulator-off-in-suspend;
++              };
++      };
++
++      vdd_cpu_big1_s0: regulator@43 {
++              compatible = "rockchip,rk8603", "rockchip,rk8602";
++              reg = <0x43>;
++              fcs,suspend-voltage-selector = <1>;
++              regulator-name = "vdd_cpu_big1_s0";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <550000>;
++              regulator-max-microvolt = <1050000>;
++              regulator-ramp-delay = <2300>;
++              vin-supply = <&vcc5v0_sys>;
++
++              regulator-state-mem {
++                      regulator-off-in-suspend;
++              };
++      };
++};
++
++&i2c6 {
++      status = "okay";
++
++      hym8563: rtc@51 {
++              compatible = "haoyu,hym8563";
++              reg = <0x51>;
++              interrupt-parent = <&gpio0>;
++              interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
++              #clock-cells = <0>;
++              clock-output-names = "hym8563";
++              pinctrl-names = "default";
++              pinctrl-0 = <&hym8563_int>;
++              wakeup-source;
++      };
++};
++
++&i2c7 {
++      status = "okay";
++
++      es8316: audio-codec@11 {
++              compatible = "everest,es8316";
++              reg = <0x11>;
++              assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
++              assigned-clock-rates = <12288000>;
++              clocks = <&cru I2S0_8CH_MCLKOUT>;
++              clock-names = "mclk";
++              #sound-dai-cells = <0>;
++
++              port {
++                      es8316_p0_0: endpoint {
++                              remote-endpoint = <&i2s0_8ch_p0_0>;
++                      };
++              };
++      };
++};
++
++&i2s0_8ch {
++      pinctrl-names = "default";
++      pinctrl-0 = <&i2s0_lrck
++                   &i2s0_mclk
++                   &i2s0_sclk
++                   &i2s0_sdi0
++                   &i2s0_sdo0>;
++      status = "okay";
++
++      i2s0_8ch_p0: port {
++              i2s0_8ch_p0_0: endpoint {
++                      dai-format = "i2s";
++                      mclk-fs = <256>;
++                      remote-endpoint = <&es8316_p0_0>;
++              };
++      };
++};
++
++/* phy1 - right ethernet port */
++&pcie2x1l0 {
++      reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
++      status = "okay";
++};
++
++/* phy2 - WiFi */
++&pcie2x1l1 {
++      reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
++      status = "okay";
++};
++
++/* phy0 - left ethernet port */
++&pcie2x1l2 {
++      reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
++      status = "okay";
++};
++
++&pcie30phy {
++      status = "okay";
++};
++
++&pcie3x4 {
++      reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
++      vpcie3v3-supply = <&vcc3v3_pcie30>;
++      status = "okay";
++};
++
++&pinctrl {
++      hym8563 {
++              hym8563_int: hym8563-int {
++                      rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      leds {
++              led_rgb_g: led-rgb-g {
++                      rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++              led_rgb_r: led-rgb-r {
++                      rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      sound {
++              hp_detect: hp-detect {
++                      rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      usb {
++              vcc5v0_host_en: vcc5v0-host-en {
++                      rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++};
++
++&pwm1 {
++      status = "okay";
++};
++
++&saradc {
++      vref-supply = <&avcc_1v8_s0>;
++      status = "okay";
++};
++
++&sdhci {
++      bus-width = <8>;
++      no-sdio;
++      no-sd;
++      non-removable;
++      mmc-hs200-1_8v;
++      status = "okay";
++};
++
++&sdmmc {
++      bus-width = <4>;
++      cap-mmc-highspeed;
++      cap-sd-highspeed;
++      disable-wp;
++      max-frequency = <200000000>;
++      no-sdio;
++      no-mmc;
++      sd-uhs-sdr104;
++      vmmc-supply = <&vcc_3v3_s3>;
++      vqmmc-supply = <&vccio_sd_s0>;
++      status = "okay";
++};
++
++&spi2 {
++      assigned-clocks = <&cru CLK_SPI2>;
++      assigned-clock-rates = <200000000>;
++      num-cs = <1>;
++      pinctrl-names = "default";
++      pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
++      status = "okay";
++
++      pmic@0 {
++              compatible = "rockchip,rk806";
++              spi-max-frequency = <1000000>;
++              reg = <0x0>;
++
++              interrupt-parent = <&gpio0>;
++              interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
++
++              gpio-controller;
++              #gpio-cells = <2>;
++
++              pinctrl-names = "default";
++              pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
++                          <&rk806_dvs2_null>, <&rk806_dvs3_null>;
++
++              system-power-controller;
++
++              vcc1-supply = <&vcc5v0_sys>;
++              vcc2-supply = <&vcc5v0_sys>;
++              vcc3-supply = <&vcc5v0_sys>;
++              vcc4-supply = <&vcc5v0_sys>;
++              vcc5-supply = <&vcc5v0_sys>;
++              vcc6-supply = <&vcc5v0_sys>;
++              vcc7-supply = <&vcc5v0_sys>;
++              vcc8-supply = <&vcc5v0_sys>;
++              vcc9-supply = <&vcc5v0_sys>;
++              vcc10-supply = <&vcc5v0_sys>;
++              vcc11-supply = <&vcc_2v0_pldo_s3>;
++              vcc12-supply = <&vcc5v0_sys>;
++              vcc13-supply = <&vcc_1v1_nldo_s3>;
++              vcc14-supply = <&vcc_1v1_nldo_s3>;
++              vcca-supply = <&vcc5v0_sys>;
++
++              rk806_dvs1_null: dvs1-null-pins {
++                      pins = "gpio_pwrctrl1";
++                      function = "pin_fun0";
++              };
++
++              rk806_dvs2_null: dvs2-null-pins {
++                      pins = "gpio_pwrctrl2";
++                      function = "pin_fun0";
++              };
++
++              rk806_dvs3_null: dvs3-null-pins {
++                      pins = "gpio_pwrctrl3";
++                      function = "pin_fun0";
++              };
++
++              regulators {
++                      vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <950000>;
++                              regulator-ramp-delay = <12500>;
++                              regulator-name = "vdd_gpu_s0";
++                              regulator-enable-ramp-delay = <400>;
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <950000>;
++                              regulator-ramp-delay = <12500>;
++                              regulator-name = "vdd_cpu_lit_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_log_s0: dcdc-reg3 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <675000>;
++                              regulator-max-microvolt = <750000>;
++                              regulator-ramp-delay = <12500>;
++                              regulator-name = "vdd_log_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                                      regulator-suspend-microvolt = <750000>;
++                              };
++                      };
++
++                      vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <950000>;
++                              regulator-ramp-delay = <12500>;
++                              regulator-name = "vdd_vdenc_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_ddr_s0: dcdc-reg5 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <675000>;
++                              regulator-max-microvolt = <900000>;
++                              regulator-ramp-delay = <12500>;
++                              regulator-name = "vdd_ddr_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                                      regulator-suspend-microvolt = <850000>;
++                              };
++                      };
++
++                      vdd2_ddr_s3: dcdc-reg6 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-name = "vdd2_ddr_s3";
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                              };
++                      };
++
++                      vcc_2v0_pldo_s3: dcdc-reg7 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <2000000>;
++                              regulator-max-microvolt = <2000000>;
++                              regulator-ramp-delay = <12500>;
++                              regulator-name = "vdd_2v0_pldo_s3";
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <2000000>;
++                              };
++                      };
++
++                      vcc_3v3_s3: dcdc-reg8 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <3300000>;
++                              regulator-max-microvolt = <3300000>;
++                              regulator-name = "vcc_3v3_s3";
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <3300000>;
++                              };
++                      };
++
++                      vddq_ddr_s0: dcdc-reg9 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-name = "vddq_ddr_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc_1v8_s3: dcdc-reg10 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++                              regulator-name = "vcc_1v8_s3";
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <1800000>;
++                              };
++                      };
++
++                      avcc_1v8_s0: pldo-reg1 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++                              regulator-name = "avcc_1v8_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc_1v8_s0: pldo-reg2 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++                              regulator-name = "vcc_1v8_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                                      regulator-suspend-microvolt = <1800000>;
++                              };
++                      };
++
++                      avdd_1v2_s0: pldo-reg3 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1200000>;
++                              regulator-max-microvolt = <1200000>;
++                              regulator-name = "avdd_1v2_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc_3v3_s0: pldo-reg4 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <3300000>;
++                              regulator-max-microvolt = <3300000>;
++                              regulator-ramp-delay = <12500>;
++                              regulator-name = "vcc_3v3_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vccio_sd_s0: pldo-reg5 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <3300000>;
++                              regulator-ramp-delay = <12500>;
++                              regulator-name = "vccio_sd_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      pldo6_s3: pldo-reg6 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++                              regulator-name = "pldo6_s3";
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <1800000>;
++                              };
++                      };
++
++                      vdd_0v75_s3: nldo-reg1 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <750000>;
++                              regulator-max-microvolt = <750000>;
++                              regulator-name = "vdd_0v75_s3";
++
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <750000>;
++                              };
++                      };
++
++                      vdd_ddr_pll_s0: nldo-reg2 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <850000>;
++                              regulator-max-microvolt = <850000>;
++                              regulator-name = "vdd_ddr_pll_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                                      regulator-suspend-microvolt = <850000>;
++                              };
++                      };
++
++                      avdd_0v75_s0: nldo-reg3 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <750000>;
++                              regulator-max-microvolt = <750000>;
++                              regulator-name = "avdd_0v75_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_0v85_s0: nldo-reg4 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <850000>;
++                              regulator-max-microvolt = <850000>;
++                              regulator-name = "vdd_0v85_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_0v75_s0: nldo-reg5 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <750000>;
++                              regulator-max-microvolt = <750000>;
++                              regulator-name = "vdd_0v75_s0";
++
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++              };
++      };
++};
++
++&u2phy0 {
++      status = "okay";
++};
++
++&u2phy0_otg {
++      status = "okay";
++};
++
++&u2phy1 {
++      status = "okay";
++};
++
++&u2phy1_otg {
++      status = "okay";
++};
++
++&u2phy3 {
++      status = "okay";
++};
++
++&u2phy3_host {
++      phy-supply = <&vcc5v0_host>;
++      status = "okay";
++};
++
++&uart2 {
++      pinctrl-0 = <&uart2m0_xfer>;
++      status = "okay";
++};
++
++&usbdp_phy1 {
++      status = "okay";
++};
++
++&usb_host1_ehci {
++      status = "okay";
++};
++
++&usb_host1_ohci {
++      status = "okay";
++};
++
++&usb_host1_xhci {
++      dr_mode = "host";
++      status = "okay";
++};

diff --git a/target/linux/rockchip/patches-6.6/056-02-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch b/target/linux/rockchip/patches-6.6/056-02-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch
new file mode 100644 (file)
index 0000000..d0b8336
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/056-02-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch
@@ -0,0 +1,79 @@
+From 2f8064b9c4a012b4d4e8383818f13b682b6c156a Mon Sep 17 00:00:00 2001
+From: Alexey Charkov <alchark@gmail.com>
+Date: Mon, 17 Jun 2024 22:28:52 +0400
+Subject: [PATCH] arm64: dts: rockchip: enable thermal management on all RK3588
+ boards
+
+This enables the on-chip thermal monitoring sensor (TSADC) on all
+RK3588(s) boards that don't have it enabled yet. It provides temperature
+monitoring for the SoC and emergency thermal shutdowns, and is thus
+important to have in place before CPU DVFS is enabled, as high CPU
+operating performance points can overheat the chip quickly in the
+absence of thermal management.
+
+Signed-off-by: Alexey Charkov <alchark@gmail.com>
+Link: https://lore.kernel.org/r/20240617-rk-dts-additions-v5-2-c1f5f3267f1e@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts          | 4 ++++
+ arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-common.dtsi | 4 ++++
+ arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts              | 4 ++++
+ arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts              | 4 ++++
+ arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts               | 4 ++++
+ arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts           | 4 ++++
+ arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi           | 4 ++++
+ arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts              | 4 ++++
+ 8 files changed, 32 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
+@@ -673,6 +673,10 @@
+       };
+ };
+ 
++&tsadc {
++      status = "okay";
++};
++
+ &u2phy0 {
+       status = "okay";
+ };
+--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+@@ -807,6 +807,10 @@
+       status = "okay";
+ };
+ 
++&tsadc {
++      status = "okay";
++};
++
+ &u2phy2 {
+       status = "okay";
+ };
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -787,6 +787,10 @@
+       };
+ };
+ 
++&tsadc {
++      status = "okay";
++};
++
+ &uart2 {
+       pinctrl-0 = <&uart2m0_xfer>;
+       status = "okay";
+--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+@@ -741,6 +741,10 @@
+       };
+ };
+ 
++&tsadc {
++      status = "okay";
++};
++
+ &u2phy0 {
+       status = "okay";
+ };

diff --git a/target/linux/rockchip/patches-6.6/125-arm64-dts-rockchip-Update-LED-properties-for-ArmSom-Sige7.patch b/target/linux/rockchip/patches-6.6/125-arm64-dts-rockchip-Update-LED-properties-for-ArmSom-Sige7.patch
new file mode 100644 (file)
index 0000000..051efa7
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/125-arm64-dts-rockchip-Update-LED-properties-for-ArmSom-Sige7.patch
@@ -0,0 +1,25 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Mon Sep 23 13:22:56 2024 +0800
+Subject: [PATCH] arm64: dts: rockchip: Update LED properties for ArmSom
+ Sige7
+
+Add OpenWrt's LED aliases for showing system status.
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
+@@ -13,6 +13,11 @@
+       aliases {
+               mmc0 = &sdhci;
+               mmc1 = &sdmmc;
++
++              led-boot = &led_red;
++              led-failsafe = &led_red;
++              led-running = &led_red;
++              led-upgrade = &led_red;
+       };
+ 
+       chosen {

diff --git a/target/linux/rockchip/patches-6.6/126-arm64-dts-rockchip-lower-mmc-speed-for-ArmSom-Sige7.patch b/target/linux/rockchip/patches-6.6/126-arm64-dts-rockchip-lower-mmc-speed-for-ArmSom-Sige7.patch
new file mode 100644 (file)
index 0000000..01f1c74
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/126-arm64-dts-rockchip-lower-mmc-speed-for-ArmSom-Sige7.patch
@@ -0,0 +1,26 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@gmail.com>
+Date: Mon Sep 23 13:22:56 2024 +0800
+Subject: [PATCH] arm64: dts: rockchip: lower mmc speed for ArmSom Sige7
+
+The previously stated speed of sdr-104 in is too high for the hardware
+to reliably communicate with some fast SD cards.
+Rockchip boards have a common bug when operating uhs speed, which will
+hang the system during a soft reboot.
+
+To be on the safe side, lower the speed to workaround.
+
+Signed-off-by: Tianling Shen <cnsztl@gmail.com>
+---
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
+@@ -346,7 +346,7 @@
+       max-frequency = <200000000>;
+       no-sdio;
+       no-mmc;
+-      sd-uhs-sdr104;
++      sd-uhs-sdr50;
+       vmmc-supply = <&vcc_3v3_s3>;
+       vqmmc-supply = <&vccio_sd_s0>;
+       status = "okay";