clk: rockchip: Add div50 clock-ids for sdmmc on px30 and nandc
authorFinley Xiao <finley.xiao@rock-chips.com>
Tue, 17 Sep 2019 08:18:59 +0000 (10:18 +0200)
committerHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tue, 5 Nov 2019 19:53:26 +0000 (20:53 +0100)
EMMC and SDIO already have these clock-ids (still unused) only sdmmc is
missing them, so fix that.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20190917081903.25139-1-heiko@sntech.de
include/dt-bindings/clock/px30-cru.h

index 00101479f7c401851e64d55a327898a7c13c859d..5b1416fcde6fcc0262acb3016222c7fc1568d3cb 100644 (file)
@@ -85,6 +85,8 @@
 #define SCLK_EMMC_DIV50                83
 #define SCLK_DDRCLK            84
 #define SCLK_UART1_SRC         85
+#define SCLK_SDMMC_DIV         86
+#define SCLK_SDMMC_DIV50       87
 
 /* dclk gates */
 #define DCLK_VOPB              150