struct list_head contexts;
spinlock_t lock;
-
- void (*tile_prog)(struct nvkm_engine *, int region);
};
struct nvkm_engine_func {
#ifndef __NVKM_MPEG_H__
#define __NVKM_MPEG_H__
#include <core/engine.h>
-
-struct nvkm_mpeg {
- struct nvkm_engine engine;
-};
-
-#define nvkm_mpeg_create(p,e,c,d) \
- nvkm_engine_create((p), (e), (c), true, "PMPEG", "mpeg", (d))
-#define nvkm_mpeg_destroy(d) \
- nvkm_engine_destroy(&(d)->engine)
-#define nvkm_mpeg_init(d) \
- nvkm_engine_init_old(&(d)->engine)
-#define nvkm_mpeg_fini(d,s) \
- nvkm_engine_fini_old(&(d)->engine, (s))
-
-#define _nvkm_mpeg_dtor _nvkm_engine_dtor
-#define _nvkm_mpeg_init _nvkm_engine_init
-#define _nvkm_mpeg_fini _nvkm_engine_fini
-
-extern struct nvkm_oclass nv31_mpeg_oclass;
-extern struct nvkm_oclass nv40_mpeg_oclass;
-extern struct nvkm_oclass nv44_mpeg_oclass;
-extern struct nvkm_oclass nv50_mpeg_oclass;
-extern struct nvkm_oclass g84_mpeg_oclass;
-extern struct nvkm_oclass nv40_mpeg_sclass[];
-void nv31_mpeg_intr(struct nvkm_subdev *);
-void nv31_mpeg_tile_prog(struct nvkm_engine *, int);
-int nv31_mpeg_init(struct nvkm_object *);
-
-extern struct nvkm_ofuncs nv50_mpeg_ofuncs;
-int nv50_mpeg_context_ctor(struct nvkm_object *, struct nvkm_object *,
- struct nvkm_oclass *, void *, u32,
- struct nvkm_object **);
-void nv50_mpeg_intr(struct nvkm_subdev *);
-int nv50_mpeg_init(struct nvkm_object *);
+int nv31_mpeg_new(struct nvkm_device *, int index, struct nvkm_engine **);
+int nv40_mpeg_new(struct nvkm_device *, int index, struct nvkm_engine **);
+int nv44_mpeg_new(struct nvkm_device *, int index, struct nvkm_engine **);
+int nv50_mpeg_new(struct nvkm_device *, int index, struct nvkm_engine **);
+int g84_mpeg_new(struct nvkm_device *, int index, struct nvkm_engine **);
#endif
.dma = nv04_dma_new,
.fifo = nv17_fifo_new,
.gr = nv30_gr_new,
-// .mpeg = nv31_mpeg_new,
+ .mpeg = nv31_mpeg_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv17_fifo_new,
.gr = nv34_gr_new,
-// .mpeg = nv31_mpeg_new,
+ .mpeg = nv31_mpeg_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv17_fifo_new,
.gr = nv35_gr_new,
-// .mpeg = nv31_mpeg_new,
+ .mpeg = nv31_mpeg_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv40_gr_new,
-// .mpeg = nv40_mpeg_new,
+ .mpeg = nv40_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv40_gr_new,
-// .mpeg = nv40_mpeg_new,
+ .mpeg = nv40_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv40_gr_new,
-// .mpeg = nv40_mpeg_new,
+ .mpeg = nv40_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv40_gr_new,
-// .mpeg = nv40_mpeg_new,
+ .mpeg = nv40_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv44_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv40_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv44_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv40_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv40_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv44_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv40_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv44_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv44_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv50_dma_new,
.fifo = nv50_fifo_new,
.gr = nv50_gr_new,
-// .mpeg = nv50_mpeg_new,
+ .mpeg = nv50_mpeg_new,
.pm = nv50_pm_new,
.sw = nv50_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv44_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv44_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv04_dma_new,
.fifo = nv40_fifo_new,
.gr = nv44_gr_new,
-// .mpeg = nv44_mpeg_new,
+ .mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
};
.dma = nv50_dma_new,
.fifo = g84_fifo_new,
.gr = g84_gr_new,
-// .mpeg = g84_mpeg_new,
+ .mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.vp = g84_vp_new,
.dma = nv50_dma_new,
.fifo = g84_fifo_new,
.gr = g84_gr_new,
-// .mpeg = g84_mpeg_new,
+ .mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.vp = g84_vp_new,
.dma = nv50_dma_new,
.fifo = g84_fifo_new,
.gr = g84_gr_new,
-// .mpeg = g84_mpeg_new,
+ .mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.vp = g84_vp_new,
.dma = nv50_dma_new,
.fifo = g84_fifo_new,
.gr = g84_gr_new,
-// .mpeg = g84_mpeg_new,
+ .mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.vp = g84_vp_new,
.fifo = g84_fifo_new,
.gr = g84_gr_new,
.gr = nv50_gr_new,
-// .mpeg = g84_mpeg_new,
+ .mpeg = g84_mpeg_new,
.vp = g84_vp_new,
.cipher = g84_cipher_new,
.bsp = g84_bsp_new,
.dma = nv50_dma_new,
.fifo = g84_fifo_new,
.gr = gt200_gr_new,
-// .mpeg = g84_mpeg_new,
+ .mpeg = g84_mpeg_new,
.pm = gt200_pm_new,
.sw = nv50_sw_new,
.vp = g84_vp_new,
.dma = nv50_dma_new,
.fifo = g84_fifo_new,
.gr = gt215_gr_new,
-// .mpeg = g84_mpeg_new,
+ .mpeg = g84_mpeg_new,
.mspdec = gt215_mspdec_new,
.msppp = gt215_msppp_new,
.msvld = gt215_msvld_new,
case 0x35:
break;
case 0x31:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass;
break;
case 0x36:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass;
break;
case 0x34:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass;
break;
default:
return -EINVAL;
{
switch (device->chipset) {
case 0x40:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
break;
case 0x41:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
break;
case 0x42:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
break;
case 0x43:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv40_mpeg_oclass;
break;
case 0x45:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x47:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x49:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x4b:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x44:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x46:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x4a:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x4c:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x4e:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x63:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x67:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
case 0x68:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv44_mpeg_oclass;
break;
default:
return -EINVAL;
{
switch (device->chipset) {
case 0x50:
- device->oclass[NVDEV_ENGINE_MPEG ] = &nv50_mpeg_oclass;
break;
case 0x84:
- device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
break;
case 0x86:
- device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
break;
case 0x92:
- device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
break;
case 0x94:
- device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
break;
case 0x96:
- device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
break;
case 0x98:
break;
case 0xa0:
- device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
break;
case 0xaa:
break;
case 0xac:
break;
case 0xa3:
- device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
break;
case 0xa5:
break;
static const struct nvkm_engine_func
g84_mpeg = {
+ .init = nv50_mpeg_init,
+ .intr = nv50_mpeg_intr,
.cclass = &nv50_mpeg_cclass,
.sclass = {
{ -1, -1, G82_MPEG, &nv31_mpeg_object },
}
};
-static int
-g84_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
- struct nvkm_oclass *oclass, void *data, u32 size,
- struct nvkm_object **pobject)
+int
+g84_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg)
{
- struct nvkm_mpeg *mpeg;
- int ret;
-
- ret = nvkm_mpeg_create(parent, engine, oclass, &mpeg);
- *pobject = nv_object(mpeg);
- if (ret)
- return ret;
-
- mpeg->engine.func = &g84_mpeg;
-
- nv_subdev(mpeg)->unit = 0x00000002;
- nv_subdev(mpeg)->intr = nv50_mpeg_intr;
- return 0;
+ return nvkm_engine_new_(&g84_mpeg, device, index, 0x00000002,
+ true, pmpeg);
}
-
-struct nvkm_oclass
-g84_mpeg_oclass = {
- .handle = NV_ENGINE(MPEG, 0x84),
- .ofuncs = &(struct nvkm_ofuncs) {
- .ctor = g84_mpeg_ctor,
- .dtor = _nvkm_mpeg_dtor,
- .init = nv50_mpeg_init,
- .fini = _nvkm_mpeg_fini,
- },
-};
struct nv31_mpeg *mpeg = chan->mpeg;
unsigned long flags;
- spin_lock_irqsave(&mpeg->base.engine.lock, flags);
+ spin_lock_irqsave(&mpeg->engine.lock, flags);
if (mpeg->chan == chan)
mpeg->chan = NULL;
- spin_unlock_irqrestore(&mpeg->base.engine.lock, flags);
+ spin_unlock_irqrestore(&mpeg->engine.lock, flags);
return chan;
}
chan->fifo = fifoch;
*pobject = &chan->object;
- spin_lock_irqsave(&mpeg->base.engine.lock, flags);
+ spin_lock_irqsave(&mpeg->engine.lock, flags);
if (!mpeg->chan) {
mpeg->chan = chan;
ret = 0;
}
- spin_unlock_irqrestore(&mpeg->base.engine.lock, flags);
+ spin_unlock_irqrestore(&mpeg->engine.lock, flags);
return ret;
}
******************************************************************************/
void
-nv31_mpeg_tile_prog(struct nvkm_engine *engine, int i)
+nv31_mpeg_tile(struct nvkm_engine *engine, int i, struct nvkm_fb_tile *tile)
{
- struct nv31_mpeg *mpeg = (void *)engine;
- struct nvkm_device *device = mpeg->base.engine.subdev.device;
- struct nvkm_fb_tile *tile = &device->fb->tile.region[i];
+ struct nv31_mpeg *mpeg = nv31_mpeg(engine);
+ struct nvkm_device *device = mpeg->engine.subdev.device;
nvkm_wr32(device, 0x00b008 + (i * 0x10), tile->pitch);
nvkm_wr32(device, 0x00b004 + (i * 0x10), tile->limit);
static bool
nv31_mpeg_mthd(struct nv31_mpeg *mpeg, u32 mthd, u32 data)
{
- struct nvkm_device *device = mpeg->base.engine.subdev.device;
+ struct nvkm_device *device = mpeg->engine.subdev.device;
switch (mthd) {
case 0x190:
case 0x1a0:
case 0x1b0:
- return mpeg->mthd_dma(device, mthd, data);
+ return mpeg->func->mthd_dma(device, mthd, data);
default:
break;
}
return false;
}
-void
-nv31_mpeg_intr(struct nvkm_subdev *subdev)
+static void
+nv31_mpeg_intr(struct nvkm_engine *engine)
{
- struct nv31_mpeg *mpeg = (void *)subdev;
- struct nvkm_device *device = mpeg->base.engine.subdev.device;
+ struct nv31_mpeg *mpeg = nv31_mpeg(engine);
+ struct nvkm_subdev *subdev = &mpeg->engine.subdev;
+ struct nvkm_device *device = subdev->device;
u32 stat = nvkm_rd32(device, 0x00b100);
u32 type = nvkm_rd32(device, 0x00b230);
u32 mthd = nvkm_rd32(device, 0x00b234);
u32 show = stat;
unsigned long flags;
- spin_lock_irqsave(&mpeg->base.engine.lock, flags);
+ spin_lock_irqsave(&mpeg->engine.lock, flags);
if (stat & 0x01000000) {
/* happens on initial binding of the object */
"unknown", stat, type, mthd, data);
}
- spin_unlock_irqrestore(&mpeg->base.engine.lock, flags);
-}
-
-static const struct nvkm_engine_func
-nv31_mpeg = {
- .fifo.cclass = nv31_mpeg_chan_new,
- .sclass = {
- { -1, -1, NV31_MPEG, &nv31_mpeg_object },
- {}
- }
-};
-
-static int
-nv31_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
- struct nvkm_oclass *oclass, void *data, u32 size,
- struct nvkm_object **pobject)
-{
- struct nv31_mpeg *mpeg;
- int ret;
-
- ret = nvkm_mpeg_create(parent, engine, oclass, &mpeg);
- *pobject = nv_object(mpeg);
- if (ret)
- return ret;
-
- mpeg->base.engine.func = &nv31_mpeg;
-
- mpeg->mthd_dma = nv31_mpeg_mthd_dma;
- nv_subdev(mpeg)->unit = 0x00000002;
- nv_subdev(mpeg)->intr = nv31_mpeg_intr;
- nv_engine(mpeg)->tile_prog = nv31_mpeg_tile_prog;
- return 0;
+ spin_unlock_irqrestore(&mpeg->engine.lock, flags);
}
int
-nv31_mpeg_init(struct nvkm_object *object)
+nv31_mpeg_init(struct nvkm_engine *mpeg)
{
- struct nvkm_engine *engine = nv_engine(object);
- struct nv31_mpeg *mpeg = (void *)object;
- struct nvkm_subdev *subdev = &mpeg->base.engine.subdev;
+ struct nvkm_subdev *subdev = &mpeg->subdev;
struct nvkm_device *device = subdev->device;
- struct nvkm_fb *fb = device->fb;
- int ret, i;
-
- ret = nvkm_mpeg_init(&mpeg->base);
- if (ret)
- return ret;
/* VPE init */
nvkm_wr32(device, 0x00b0e0, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */
nvkm_wr32(device, 0x00b0e8, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */
- for (i = 0; i < fb->tile.regions; i++)
- engine->tile_prog(engine, i);
-
/* PMPEG init */
nvkm_wr32(device, 0x00b32c, 0x00000000);
nvkm_wr32(device, 0x00b314, 0x00000100);
return 0;
}
-struct nvkm_oclass
-nv31_mpeg_oclass = {
- .handle = NV_ENGINE(MPEG, 0x31),
- .ofuncs = &(struct nvkm_ofuncs) {
- .ctor = nv31_mpeg_ctor,
- .dtor = _nvkm_mpeg_dtor,
- .init = nv31_mpeg_init,
- .fini = _nvkm_mpeg_fini,
- },
+static void *
+nv31_mpeg_dtor(struct nvkm_engine *engine)
+{
+ return nv31_mpeg(engine);
+}
+
+static const struct nvkm_engine_func
+nv31_mpeg_ = {
+ .dtor = nv31_mpeg_dtor,
+ .init = nv31_mpeg_init,
+ .intr = nv31_mpeg_intr,
+ .tile = nv31_mpeg_tile,
+ .fifo.cclass = nv31_mpeg_chan_new,
+ .sclass = {
+ { -1, -1, NV31_MPEG, &nv31_mpeg_object },
+ {}
+ }
};
+
+int
+nv31_mpeg_new_(const struct nv31_mpeg_func *func, struct nvkm_device *device,
+ int index, struct nvkm_engine **pmpeg)
+{
+ struct nv31_mpeg *mpeg;
+
+ if (!(mpeg = kzalloc(sizeof(*mpeg), GFP_KERNEL)))
+ return -ENOMEM;
+ mpeg->func = func;
+ *pmpeg = &mpeg->engine;
+
+ return nvkm_engine_ctor(&nv31_mpeg_, device, index, 0x00000002,
+ true, &mpeg->engine);
+}
+
+static const struct nv31_mpeg_func
+nv31_mpeg = {
+ .mthd_dma = nv31_mpeg_mthd_dma,
+};
+
+int
+nv31_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg)
+{
+ return nv31_mpeg_new_(&nv31_mpeg, device, index, pmpeg);
+}
#ifndef __NV31_MPEG_H__
#define __NV31_MPEG_H__
-#define nv31_mpeg(p) container_of((p), struct nv31_mpeg, base.engine)
+#define nv31_mpeg(p) container_of((p), struct nv31_mpeg, engine)
#include "priv.h"
#include <engine/mpeg.h>
struct nv31_mpeg {
- struct nvkm_mpeg base;
+ const struct nv31_mpeg_func *func;
+ struct nvkm_engine engine;
struct nv31_mpeg_chan *chan;
+};
+
+int nv31_mpeg_new_(const struct nv31_mpeg_func *, struct nvkm_device *,
+ int index, struct nvkm_engine **);
+
+struct nv31_mpeg_func {
bool (*mthd_dma)(struct nvkm_device *, u32 mthd, u32 data);
};
return true;
}
-static void
-nv40_mpeg_intr(struct nvkm_subdev *subdev)
-{
- struct nv31_mpeg *mpeg = (void *)subdev;
- struct nvkm_device *device = mpeg->base.engine.subdev.device;
- u32 stat;
-
- if ((stat = nvkm_rd32(device, 0x00b100)))
- nv31_mpeg_intr(subdev);
-
- if ((stat = nvkm_rd32(device, 0x00b800))) {
- nvkm_error(subdev, "PMSRCH %08x\n", stat);
- nvkm_wr32(device, 0x00b800, stat);
- }
-}
-
-static const struct nvkm_engine_func
+static const struct nv31_mpeg_func
nv40_mpeg = {
- .fifo.cclass = nv31_mpeg_chan_new,
- .sclass = {
- { -1, -1, NV31_MPEG, &nv31_mpeg_object },
- {}
- }
+ .mthd_dma = nv40_mpeg_mthd_dma,
};
-static int
-nv40_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
- struct nvkm_oclass *oclass, void *data, u32 size,
- struct nvkm_object **pobject)
+int
+nv40_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg)
{
- struct nv31_mpeg *mpeg;
- int ret;
-
- ret = nvkm_mpeg_create(parent, engine, oclass, &mpeg);
- *pobject = nv_object(mpeg);
- if (ret)
- return ret;
-
- mpeg->base.engine.func = &nv40_mpeg;
-
- mpeg->mthd_dma = nv40_mpeg_mthd_dma;
- nv_subdev(mpeg)->unit = 0x00000002;
- nv_subdev(mpeg)->intr = nv40_mpeg_intr;
- nv_engine(mpeg)->tile_prog = nv31_mpeg_tile_prog;
- return 0;
+ return nv31_mpeg_new_(&nv40_mpeg, device, index, pmpeg);
}
-
-struct nvkm_oclass
-nv40_mpeg_oclass = {
- .handle = NV_ENGINE(MPEG, 0x40),
- .ofuncs = &(struct nvkm_ofuncs) {
- .ctor = nv40_mpeg_ctor,
- .dtor = _nvkm_mpeg_dtor,
- .init = nv31_mpeg_init,
- .fini = _nvkm_mpeg_fini,
- },
-};
*
* Authors: Ben Skeggs
*/
-#define nv44_mpeg(p) container_of((p), struct nv44_mpeg, base.engine)
+#define nv44_mpeg(p) container_of((p), struct nv44_mpeg, engine)
#include "priv.h"
#include <core/client.h>
#include <nvif/class.h>
struct nv44_mpeg {
- struct nvkm_mpeg base;
+ struct nvkm_engine engine;
struct list_head chan;
};
-bool nv40_mpeg_mthd_dma(struct nvkm_device *, u32, u32);
-
/*******************************************************************************
* PMPEG context
******************************************************************************/
struct nv44_mpeg_chan *chan = nv44_mpeg_chan(object);
struct nv44_mpeg *mpeg = chan->mpeg;
- struct nvkm_device *device = mpeg->base.engine.subdev.device;
+ struct nvkm_device *device = mpeg->engine.subdev.device;
u32 inst = 0x80000000 | (chan->inst >> 4);
nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000000);
struct nv44_mpeg_chan *chan = nv44_mpeg_chan(object);
struct nv44_mpeg *mpeg = chan->mpeg;
unsigned long flags;
- spin_lock_irqsave(&mpeg->base.engine.lock, flags);
+ spin_lock_irqsave(&mpeg->engine.lock, flags);
list_del(&chan->head);
- spin_unlock_irqrestore(&mpeg->base.engine.lock, flags);
+ spin_unlock_irqrestore(&mpeg->engine.lock, flags);
return chan;
}
chan->fifo = fifoch;
*pobject = &chan->object;
- spin_lock_irqsave(&mpeg->base.engine.lock, flags);
+ spin_lock_irqsave(&mpeg->engine.lock, flags);
list_add(&chan->head, &mpeg->chan);
- spin_unlock_irqrestore(&mpeg->base.engine.lock, flags);
+ spin_unlock_irqrestore(&mpeg->engine.lock, flags);
return 0;
}
}
static void
-nv44_mpeg_intr(struct nvkm_subdev *subdev)
+nv44_mpeg_intr(struct nvkm_engine *engine)
{
- struct nv44_mpeg *mpeg = (void *)subdev;
+ struct nv44_mpeg *mpeg = nv44_mpeg(engine);
+ struct nvkm_subdev *subdev = &mpeg->engine.subdev;
+ struct nvkm_device *device = subdev->device;
struct nv44_mpeg_chan *temp, *chan = NULL;
- struct nvkm_device *device = mpeg->base.engine.subdev.device;
unsigned long flags;
u32 inst = nvkm_rd32(device, 0x00b318) & 0x000fffff;
u32 stat = nvkm_rd32(device, 0x00b100);
u32 data = nvkm_rd32(device, 0x00b238);
u32 show = stat;
- spin_lock_irqsave(&mpeg->base.engine.lock, flags);
+ spin_lock_irqsave(&mpeg->engine.lock, flags);
list_for_each_entry(temp, &mpeg->chan, head) {
if (temp->inst >> 4 == inst) {
chan = temp;
stat, type, mthd, data);
}
- spin_unlock_irqrestore(&mpeg->base.engine.lock, flags);
-}
-
-static void
-nv44_mpeg_me_intr(struct nvkm_subdev *subdev)
-{
- struct nvkm_mpeg *mpeg = (void *)subdev;
- struct nvkm_device *device = mpeg->engine.subdev.device;
- u32 stat;
-
- if ((stat = nvkm_rd32(device, 0x00b100)))
- nv44_mpeg_intr(subdev);
-
- if ((stat = nvkm_rd32(device, 0x00b800))) {
- nvkm_error(subdev, "PMSRCH %08x\n", stat);
- nvkm_wr32(device, 0x00b800, stat);
- }
+ spin_unlock_irqrestore(&mpeg->engine.lock, flags);
}
static const struct nvkm_engine_func
nv44_mpeg = {
+ .init = nv31_mpeg_init,
+ .intr = nv44_mpeg_intr,
+ .tile = nv31_mpeg_tile,
.fifo.cclass = nv44_mpeg_chan_new,
.sclass = {
{ -1, -1, NV31_MPEG, &nv31_mpeg_object },
}
};
-static int
-nv44_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
- struct nvkm_oclass *oclass, void *data, u32 size,
- struct nvkm_object **pobject)
+int
+nv44_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg)
{
struct nv44_mpeg *mpeg;
- int ret;
-
- ret = nvkm_mpeg_create(parent, engine, oclass, &mpeg);
- *pobject = nv_object(mpeg);
- if (ret)
- return ret;
+ if (!(mpeg = kzalloc(sizeof(*mpeg), GFP_KERNEL)))
+ return -ENOMEM;
INIT_LIST_HEAD(&mpeg->chan);
- mpeg->base.engine.func = &nv44_mpeg;
+ *pmpeg = &mpeg->engine;
- nv_subdev(mpeg)->unit = 0x00000002;
- nv_subdev(mpeg)->intr = nv44_mpeg_me_intr;
- nv_engine(mpeg)->tile_prog = nv31_mpeg_tile_prog;
- return 0;
+ return nvkm_engine_ctor(&nv44_mpeg, device, index, 0x00000002,
+ true, &mpeg->engine);
}
-
-struct nvkm_oclass
-nv44_mpeg_oclass = {
- .handle = NV_ENGINE(MPEG, 0x44),
- .ofuncs = &(struct nvkm_ofuncs) {
- .ctor = nv44_mpeg_ctor,
- .dtor = _nvkm_mpeg_dtor,
- .init = nv31_mpeg_init,
- .fini = _nvkm_mpeg_fini,
- },
-};
******************************************************************************/
void
-nv50_mpeg_intr(struct nvkm_subdev *subdev)
+nv50_mpeg_intr(struct nvkm_engine *mpeg)
{
- struct nvkm_mpeg *mpeg = (void *)subdev;
- struct nvkm_device *device = mpeg->engine.subdev.device;
+ struct nvkm_subdev *subdev = &mpeg->subdev;
+ struct nvkm_device *device = subdev->device;
u32 stat = nvkm_rd32(device, 0x00b100);
u32 type = nvkm_rd32(device, 0x00b230);
u32 mthd = nvkm_rd32(device, 0x00b234);
nvkm_wr32(device, 0x00b230, 0x00000001);
}
-static void
-nv50_vpe_intr(struct nvkm_subdev *subdev)
-{
- struct nvkm_device *device = subdev->device;
-
- if (nvkm_rd32(device, 0x00b100))
- nv50_mpeg_intr(subdev);
-
- if (nvkm_rd32(device, 0x00b800)) {
- u32 stat = nvkm_rd32(device, 0x00b800);
- nvkm_info(subdev, "PMSRCH: %08x\n", stat);
- nvkm_wr32(device, 0xb800, stat);
- }
-}
-
-static const struct nvkm_engine_func
-nv50_mpeg = {
- .cclass = &nv50_mpeg_cclass,
- .sclass = {
- { -1, -1, NV31_MPEG, &nv31_mpeg_object },
- {}
- }
-};
-
-static int
-nv50_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
- struct nvkm_oclass *oclass, void *data, u32 size,
- struct nvkm_object **pobject)
-{
- struct nvkm_mpeg *mpeg;
- int ret;
-
- ret = nvkm_mpeg_create(parent, engine, oclass, &mpeg);
- *pobject = nv_object(mpeg);
- if (ret)
- return ret;
-
- mpeg->engine.func = &nv50_mpeg;
-
- nv_subdev(mpeg)->unit = 0x00400002;
- nv_subdev(mpeg)->intr = nv50_vpe_intr;
- return 0;
-}
-
int
-nv50_mpeg_init(struct nvkm_object *object)
+nv50_mpeg_init(struct nvkm_engine *mpeg)
{
- struct nvkm_mpeg *mpeg = (void *)object;
- struct nvkm_subdev *subdev = &mpeg->engine.subdev;
+ struct nvkm_subdev *subdev = &mpeg->subdev;
struct nvkm_device *device = subdev->device;
- int ret;
-
- ret = nvkm_mpeg_init(mpeg);
- if (ret)
- return ret;
nvkm_wr32(device, 0x00b32c, 0x00000000);
nvkm_wr32(device, 0x00b314, 0x00000100);
return 0;
}
-struct nvkm_oclass
-nv50_mpeg_oclass = {
- .handle = NV_ENGINE(MPEG, 0x50),
- .ofuncs = &(struct nvkm_ofuncs) {
- .ctor = nv50_mpeg_ctor,
- .dtor = _nvkm_mpeg_dtor,
- .init = nv50_mpeg_init,
- .fini = _nvkm_mpeg_fini,
- },
+static const struct nvkm_engine_func
+nv50_mpeg = {
+ .init = nv50_mpeg_init,
+ .intr = nv50_mpeg_intr,
+ .cclass = &nv50_mpeg_cclass,
+ .sclass = {
+ { -1, -1, NV31_MPEG, &nv31_mpeg_object },
+ {}
+ }
};
+
+int
+nv50_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg)
+{
+ return nvkm_engine_new_(&nv50_mpeg, device, index, 0x00400002,
+ true, pmpeg);
+}
#include <engine/mpeg.h>
struct nvkm_fifo_chan;
+int nv31_mpeg_init(struct nvkm_engine *);
+void nv31_mpeg_tile(struct nvkm_engine *, int, struct nvkm_fb_tile *);
extern const struct nvkm_object_func nv31_mpeg_object;
+bool nv40_mpeg_mthd_dma(struct nvkm_device *, u32, u32);
+
+int nv50_mpeg_init(struct nvkm_engine *);
+void nv50_mpeg_intr(struct nvkm_engine *);
+
extern const struct nvkm_object_func nv50_mpeg_cclass;
#endif
fb->func->tile.prog(fb, region, tile);
if (device->gr)
nvkm_engine_tile(&device->gr->engine, region);
- if (likely(device->mpeg))
- device->mpeg->tile_prog(device->mpeg, region);
+ if (device->mpeg)
+ nvkm_engine_tile(device->mpeg, region);
}
}
projects / openwrt / staging / blogic.git / commitdiff