drm/amdgpu: fix the VM fault while write at the top of the invisible vram
authorHuang Rui <ray.huang@amd.com>
Tue, 16 Jan 2018 02:42:58 +0000 (10:42 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Sep 2018 14:36:42 +0000 (09:36 -0500)
Raven2 has a HW issue that it is unable to use the vram which is out of
MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the workaround that increase system
aperture high address to get rid of the VM fault and hardware hang.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

index ffd0ec9586d1d090daf96aefa6b5e0fcafbb6510..65f58ebcf83504c799463b171bfbfe0c284b2f50 100644 (file)
@@ -73,8 +73,19 @@ static void gfxhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
        /* Program the system aperture low logical page number. */
        WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
                     min(adev->gmc.vram_start, adev->gmc.agp_start) >> 18);
-       WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
-                    max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18);
+
+       if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
+               /*
+                * Raven2 has a HW issue that it is unable to use the vram which
+                * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
+                * workaround that increase system aperture high address (add 1)
+                * to get rid of the VM fault and hardware hang.
+                */
+               WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
+                            (max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18) + 0x1);
+       else
+               WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
+                            max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18);
 
        /* Set default page address. */
        value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start
index b121eb6a0ad4eec6abc7b1c3afd14ceda77e2151..2a126c6950c771bff08dfbe2a7ff46da8723f2dd 100644 (file)
@@ -91,8 +91,19 @@ static void mmhub_v1_0_init_system_aperture_regs(struct amdgpu_device *adev)
        /* Program the system aperture low logical page number. */
        WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
                     min(adev->gmc.vram_start, adev->gmc.agp_start) >> 18);
-       WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
-                    max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18);
+
+       if (adev->asic_type == CHIP_RAVEN && adev->rev_id >= 0x8)
+               /*
+                * Raven2 has a HW issue that it is unable to use the vram which
+                * is out of MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the
+                * workaround that increase system aperture high address (add 1)
+                * to get rid of the VM fault and hardware hang.
+                */
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
+                            (max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18) + 0x1);
+       else
+               WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
+                            max(adev->gmc.vram_end, adev->gmc.agp_end) >> 18);
 
        /* Set default page address. */
        value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start +