drm/i915/cnl: Don't trust VBT's alternate pin for port D for now.

Cannon Lake's VBT that is currently available for B0 stepping
states that port D uses alternate pin 3 messing up with the
default pin-port mapping table. Using that information we cannot
get HDMI working properly. So for now we don't relly on VBT for
this information.

Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499375295-6454-1-git-send-email-rodrigo.vivi@intel.com

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 639d45c1dd2e6ac24013431aa6da84abb9f0b089..82b144cdfa1d2d605d4ca2dba4a83ea9c523616a 100644 (file)
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1187,6 +1187,15 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
        if (is_dvi) {
                info->alternate_ddc_pin = ddc_pin;
 
+               /*
+                * All VBTs that we got so far for B Stepping has this
+                * information wrong for Port D. So, let's just ignore for now.
+                */
+               if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
+                   port == PORT_D) {
+                       info->alternate_ddc_pin = 0;
+               }
+
                sanitize_ddc_pin(dev_priv, port);
        }