#include "i2caux_interface.h"
+/* basic init/fini API */
+static int amdgpu_dm_init(struct amdgpu_device *adev);
+static void amdgpu_dm_fini(struct amdgpu_device *adev);
+
+/* initializes drm_device display related structures, based on the information
+ * provided by DAL. The drm strcutures are: drm_crtc, drm_connector,
+ * drm_encoder, drm_mode_config
+ *
+ * Returns 0 on success
+ */
+static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev);
+/* removes and deallocates the drm structures, created by the above function */
+static void amdgpu_dm_destroy_drm_device(struct amdgpu_display_manager *dm);
+
+static void
+amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector);
+
+static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
+ struct amdgpu_plane *aplane,
+ unsigned long possible_crtcs);
+static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
+ struct drm_plane *plane,
+ uint32_t link_index);
+static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,
+ struct amdgpu_dm_connector *amdgpu_dm_connector,
+ uint32_t link_index,
+ struct amdgpu_encoder *amdgpu_encoder);
+static int amdgpu_dm_encoder_init(struct drm_device *dev,
+ struct amdgpu_encoder *aencoder,
+ uint32_t link_index);
+
+static int amdgpu_dm_connector_get_modes(struct drm_connector *connector);
+
+static int amdgpu_dm_atomic_commit(struct drm_device *dev,
+ struct drm_atomic_state *state,
+ bool nonblock);
+
+static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state);
+
+static int amdgpu_dm_atomic_check(struct drm_device *dev,
+ struct drm_atomic_state *state);
+
+
+
static const enum drm_plane_type dm_plane_type_default[AMDGPU_MAX_PLANES] = {
DRM_PLANE_TYPE_PRIMARY,
/* TODO: Dynamic allocation */
#define AMDGPU_FBC_SIZE (3840 * 2160 * 4)
-void amdgpu_dm_initialize_fbc(struct amdgpu_device *adev)
+static void amdgpu_dm_initialize_fbc(struct amdgpu_device *adev)
{
int r;
struct dm_comressor_info *compressor = &adev->dm.compressor;
*
* Returns 0 on success
*/
-int amdgpu_dm_init(struct amdgpu_device *adev)
+static int amdgpu_dm_init(struct amdgpu_device *adev)
{
struct dc_init_data init_data;
adev->dm.ddev = adev->ddev;
return -1;
}
-void amdgpu_dm_fini(struct amdgpu_device *adev)
+static void amdgpu_dm_fini(struct amdgpu_device *adev)
{
amdgpu_dm_destroy_drm_device(&adev->dm);
/*
}
/* moved from amdgpu_dm_kms.c */
-void amdgpu_dm_destroy()
+static void amdgpu_dm_destroy(void)
{
}
};
-struct drm_atomic_state *
+static struct drm_atomic_state *
dm_atomic_state_alloc(struct drm_device *dev)
{
struct dm_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
.atomic_commit_tail = amdgpu_dm_atomic_commit_tail
};
-void
+static void
amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector)
{
struct drm_connector *connector = &aconnector->base;
.update_status = amdgpu_dm_backlight_update_status,
};
-void amdgpu_dm_register_backlight_device(struct amdgpu_display_manager *dm)
+static void
+amdgpu_dm_register_backlight_device(struct amdgpu_display_manager *dm)
{
char bl_name[16];
struct backlight_properties props = { 0 };
*
* Returns 0 on success
*/
-int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
+static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
{
struct amdgpu_display_manager *dm = &adev->dm;
uint32_t i;
return -1;
}
-void amdgpu_dm_destroy_drm_device(struct amdgpu_display_manager *dm)
+static void amdgpu_dm_destroy_drm_device(struct amdgpu_display_manager *dm)
{
drm_mode_config_cleanup(dm->ddev);
return;
return 0;
}
-bool amdgpu_dm_acquire_dal_lock(struct amdgpu_display_manager *dm)
+static bool amdgpu_dm_acquire_dal_lock(struct amdgpu_display_manager *dm)
{
/* TODO */
return true;
}
-bool amdgpu_dm_release_dal_lock(struct amdgpu_display_manager *dm)
+static bool amdgpu_dm_release_dal_lock(struct amdgpu_display_manager *dm)
{
/* TODO */
return true;
return !crtc_state->enable || !crtc_state->active;
}
-void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
+static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
{
drm_encoder_cleanup(encoder);
kfree(encoder);
/*****************************************************************************/
-struct amdgpu_dm_connector *
+static struct amdgpu_dm_connector *
aconnector_from_drm_crtc_id(const struct drm_crtc *crtc)
{
struct drm_device *dev = crtc->dev;
return stream;
}
-void amdgpu_dm_crtc_destroy(struct drm_crtc *crtc)
+static void amdgpu_dm_crtc_destroy(struct drm_crtc *crtc)
{
drm_crtc_cleanup(crtc);
kfree(crtc);
return ret;
}
-void amdgpu_dm_connector_destroy(struct drm_connector *connector)
+static void amdgpu_dm_connector_destroy(struct drm_connector *connector)
{
struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
const struct dc_link *link = aconnector->dc_link;
amdgpu_bo_unref(&rbo);
}
-int dm_create_validation_set_for_connector(struct drm_connector *connector,
- struct drm_display_mode *mode,
- struct dc_validation_set *val_set)
+static int
+dm_create_validation_set_for_connector(struct drm_connector *connector,
+ struct drm_display_mode *mode,
+ struct dc_validation_set *val_set)
{
int result = MODE_ERROR;
struct dc_sink *dc_sink =
return MODE_OK;
}
-int dm_plane_atomic_check(struct drm_plane *plane,
- struct drm_plane_state *state)
+static int dm_plane_atomic_check(struct drm_plane *plane,
+ struct drm_plane_state *state)
{
struct amdgpu_device *adev = plane->dev->dev_private;
struct dc *dc = adev->dm.dc;
DRM_FORMAT_ARGB8888
};
-int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
- struct amdgpu_plane *aplane,
- unsigned long possible_crtcs)
+static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
+ struct amdgpu_plane *aplane,
+ unsigned long possible_crtcs)
{
int res = -EPERM;
return res;
}
-int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
- struct drm_plane *plane,
- uint32_t crtc_index)
+static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
+ struct drm_plane *plane,
+ uint32_t crtc_index)
{
struct amdgpu_crtc *acrtc = NULL;
struct amdgpu_plane *cursor_plane;
amdgpu_dm_connector->num_modes = 0;
}
-int amdgpu_dm_connector_get_modes(struct drm_connector *connector)
+static int amdgpu_dm_connector_get_modes(struct drm_connector *connector)
{
const struct drm_connector_helper_funcs *helper =
connector->helper_private;
}
-int amdgpu_dm_i2c_xfer(struct i2c_adapter *i2c_adap,
- struct i2c_msg *msgs, int num)
+static int amdgpu_dm_i2c_xfer(struct i2c_adapter *i2c_adap,
+ struct i2c_msg *msgs, int num)
{
struct amdgpu_i2c_adapter *i2c = i2c_get_adapdata(i2c_adap);
struct ddc_service *ddc_service = i2c->ddc_service;
return result;
}
-u32 amdgpu_dm_i2c_func(struct i2c_adapter *adap)
+static u32 amdgpu_dm_i2c_func(struct i2c_adapter *adap)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}
/* Note: this function assumes that dc_link_detect() was called for the
* dc_link which will be represented by this aconnector.
*/
-int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,
- struct amdgpu_dm_connector *aconnector,
- uint32_t link_index,
- struct amdgpu_encoder *aencoder)
+static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,
+ struct amdgpu_dm_connector *aconnector,
+ uint32_t link_index,
+ struct amdgpu_encoder *aencoder)
{
int res = 0;
int connector_type;
}
}
-int amdgpu_dm_encoder_init(struct drm_device *dev,
- struct amdgpu_encoder *aencoder,
- uint32_t link_index)
+static int amdgpu_dm_encoder_init(struct drm_device *dev,
+ struct amdgpu_encoder *aencoder,
+ uint32_t link_index)
{
struct amdgpu_device *adev = dev->dev_private;
acrtc->enabled = false;
}
-int get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,
- struct dc_cursor_position *position)
+static int get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,
+ struct dc_cursor_position *position)
{
struct amdgpu_crtc *amdgpu_crtc = amdgpu_crtc = to_amdgpu_crtc(crtc);
int x, y;
}
-int amdgpu_dm_atomic_commit(struct drm_device *dev,
- struct drm_atomic_state *state,
- bool nonblock)
+static int amdgpu_dm_atomic_commit(struct drm_device *dev,
+ struct drm_atomic_state *state,
+ bool nonblock)
{
struct drm_crtc *crtc;
struct drm_crtc_state *old_crtc_state, *new_crtc_state;
/*TODO Handle EINTR, reenable IRQ*/
}
-void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
+static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
struct amdgpu_device *adev = dev->dev_private;
return ret;
}
-int amdgpu_dm_atomic_check(struct drm_device *dev,
- struct drm_atomic_state *state)
+static int amdgpu_dm_atomic_check(struct drm_device *dev,
+ struct drm_atomic_state *state)
{
int i;
int ret;
#define to_amdgpu_dm_connector(x) container_of(x, struct amdgpu_dm_connector, base)
-/* basic init/fini API */
-int amdgpu_dm_init(struct amdgpu_device *adev);
-
-void amdgpu_dm_fini(struct amdgpu_device *adev);
-
-void amdgpu_dm_destroy(void);
-
-/* initializes drm_device display related structures, based on the information
- * provided by DAL. The drm strcutures are: drm_crtc, drm_connector,
- * drm_encoder, drm_mode_config
- *
- * Returns 0 on success
- */
-int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev);
-
-/* removes and deallocates the drm structures, created by the above function */
-void amdgpu_dm_destroy_drm_device(struct amdgpu_display_manager *dm);
-
-/* Locking/Mutex */
-bool amdgpu_dm_acquire_dal_lock(struct amdgpu_display_manager *dm);
-
-bool amdgpu_dm_release_dal_lock(struct amdgpu_display_manager *dm);
-
-/* Register "Backlight device" accessible by user-mode. */
-void amdgpu_dm_register_backlight_device(struct amdgpu_display_manager *dm);
-
extern const struct amdgpu_ip_block_version dm_ip_block;
-void
-amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector);
-
struct amdgpu_framebuffer;
struct amdgpu_display_manager;
struct dc_validation_set;
#define to_dm_atomic_state(x) container_of(x, struct dm_atomic_state, base)
-/*TODO Jodan Hersen use the one in amdgpu_dm*/
-int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
- struct amdgpu_plane *aplane,
- unsigned long possible_crtcs);
-int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
- struct drm_plane *plane,
- uint32_t link_index);
-int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,
- struct amdgpu_dm_connector *amdgpu_dm_connector,
- uint32_t link_index,
- struct amdgpu_encoder *amdgpu_encoder);
-int amdgpu_dm_encoder_init(struct drm_device *dev,
- struct amdgpu_encoder *aencoder,
- uint32_t link_index);
-
-void amdgpu_dm_crtc_destroy(struct drm_crtc *crtc);
-void amdgpu_dm_connector_destroy(struct drm_connector *connector);
-void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder);
-
-int amdgpu_dm_connector_get_modes(struct drm_connector *connector);
-
-int amdgpu_dm_atomic_commit(struct drm_device *dev,
- struct drm_atomic_state *state,
- bool nonblock);
-
-void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state);
-
-int amdgpu_dm_atomic_check(struct drm_device *dev,
- struct drm_atomic_state *state);
-
void amdgpu_dm_connector_funcs_reset(struct drm_connector *connector);
struct drm_connector_state *
amdgpu_dm_connector_atomic_duplicate_state(struct drm_connector *connector);