Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that
we can capture the LAW target for a given PCI or PCIE controller. Also update
the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the
LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure.
This will allow future PCI[E] code to configure the LAW target automatically,
rather than requiring each board to it for each PCI controller separately.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
} ccsr_fsl_pci_t;
struct fsl_pci_info {
- unsigned long regs;
- pci_addr_t mem_bus;
- phys_size_t mem_phys;
- pci_size_t mem_size;
- pci_addr_t io_bus;
- phys_size_t io_phys;
- pci_size_t io_size;
- int pci_num;
+ unsigned long regs;
+ pci_addr_t mem_bus;
+ phys_size_t mem_phys;
+ pci_size_t mem_size;
+ pci_addr_t io_bus;
+ phys_size_t io_phys;
+ pci_size_t io_size;
+ enum law_trgt_if law;
+ int pci_num;
};
int fsl_pci_init_port(struct fsl_pci_info *pci_info,
x.io_bus = CONFIG_SYS_PCI##num##_IO_BUS; \
x.io_phys = CONFIG_SYS_PCI##num##_IO_PHYS; \
x.io_size = CONFIG_SYS_PCI##num##_IO_SIZE; \
+ x.law = LAW_TRGT_IF_PCI_##num; \
x.pci_num = num; \
}
x.io_bus = CONFIG_SYS_PCIE##num##_IO_BUS; \
x.io_phys = CONFIG_SYS_PCIE##num##_IO_PHYS; \
x.io_size = CONFIG_SYS_PCIE##num##_IO_SIZE; \
+ x.law = LAW_TRGT_IF_PCIE_##num; \
x.pci_num = num; \
}