projects
/
openwrt
/
staging
/
blogic.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
b1b24dd
)
arm64: dts: qcom: sdm845: Add OSM L3 interconnect provider
author
Sibi Sankar
<sibis@codeaurora.org>
Thu, 27 Feb 2020 10:56:30 +0000
(16:26 +0530)
committer
Bjorn Andersson
<bjorn.andersson@linaro.org>
Fri, 6 Mar 2020 05:45:27 +0000
(21:45 -0800)
Add Operation State Manager (OSM) L3 interconnect provider on SDM845 SoCs.
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link:
https://lore.kernel.org/r/20200227105632.15041-7-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sdm845.dtsi
patch
|
blob
|
history
diff --git
a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 3da382b502e95abeaed92f89b5bd9fa53129857b..c7ddf215c57e5a451861d5d8a03f2b6fc30e6292 100644
(file)
--- a/
arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/
arch/arm64/boot/dts/qcom/sdm845.dtsi
@@
-3560,6
+3560,16
@@
};
};
+ osm_l3: interconnect@17d41000 {
+ compatible = "qcom,sdm845-osm-l3";
+ reg = <0 0x17d41000 0 0x1400>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+ clock-names = "xo", "alternate";
+
+ #interconnect-cells = <1>;
+ };
+
cpufreq_hw: cpufreq@17d43000 {
compatible = "qcom,cpufreq-hw";
reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>;