drm/i915: protect macro parameters in SWING_SEL_{UPP,LO}WER

Protect the macro parameters with parens in order to avoid priority
issues on macro evaluation when the macro argument is not a single
operand.

This is not a problem today, but it could be in the future. I found
this while reviewing a patch that introduces new callers for the
macros.

v2: Rebase.

Reference: commit 04416108ccea ("drm/i915/cnl: Add registers related to voltage swing sequences.")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180323195853.4599-1-paulo.r.zanoni@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aa001dd98cc54e5167499cac4b00c9b98f2a3142..b0c55f9d401b5091529083c0c70b0c96c585c981 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1749,9 +1749,9 @@ enum i915_power_well_id {
 #define ICL_PORT_TX_DW2_LN0(port)      _MMIO_PORT(port, \
                                                   _ICL_PORT_TX_DW2_LN0_A, \
                                                   _ICL_PORT_TX_DW2_LN0_B)
-#define   SWING_SEL_UPPER(x)           ((x >> 3) << 15)
+#define   SWING_SEL_UPPER(x)           (((x) >> 3) << 15)
 #define   SWING_SEL_UPPER_MASK         (1 << 15)
-#define   SWING_SEL_LOWER(x)           ((x & 0x7) << 11)
+#define   SWING_SEL_LOWER(x)           (((x) & 0x7) << 11)
 #define   SWING_SEL_LOWER_MASK         (0x7 << 11)
 #define   RCOMP_SCALAR(x)              ((x) << 0)
 #define   RCOMP_SCALAR_MASK            (0xFF << 0)