drm/i915: cleanup the CHICKEN_MISC_2 (re)definitions

* Don't define it twice.
* Define MSBs first, like the rest of i915_reg.h.
* Add CNL_ prefix to the bit that arrived in CNL.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170714175228.27019-1-paulo.r.zanoni@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 67be8eb57065fd7ea39fffc86ad859afdcd9bdd0..1dc7e7a2a23b620754e6254d779b371d55286f68 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6731,12 +6731,10 @@ enum {
 #define  KVM_CONFIG_CHANGE_NOTIFICATION_SELECT (1 << 14)
 
 #define CHICKEN_MISC_2         _MMIO(0x42084)
-#define  GLK_CL0_PWR_DOWN      (1 << 10)
-#define  GLK_CL1_PWR_DOWN      (1 << 11)
+#define  CNL_COMP_PWR_DOWN     (1 << 23)
 #define  GLK_CL2_PWR_DOWN      (1 << 12)
-
-#define CHICKEN_MISC_2         _MMIO(0x42084)
-#define  COMP_PWR_DOWN         (1 << 23)
+#define  GLK_CL1_PWR_DOWN      (1 << 11)
+#define  GLK_CL0_PWR_DOWN      (1 << 10)
 
 #define _CHICKEN_PIPESL_1_A    0x420b0
 #define _CHICKEN_PIPESL_1_B    0x420b4

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index a709a686b978e83abf6e2bba6b940153edbb7502..347484ed6d2c880840440922574f461cacab3798 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2712,7 +2712,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume
 
        /* 2. Enable Comp */
        val = I915_READ(CHICKEN_MISC_2);
-       val &= ~COMP_PWR_DOWN;
+       val &= ~CNL_COMP_PWR_DOWN;
        I915_WRITE(CHICKEN_MISC_2, val);
 
        val = I915_READ(CNL_PORT_COMP_DW3);
@@ -2786,7 +2786,7 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv)
 
        /* 5. Disable Comp */
        val = I915_READ(CHICKEN_MISC_2);
-       val |= COMP_PWR_DOWN;
+       val |= CNL_COMP_PWR_DOWN;
        I915_WRITE(CHICKEN_MISC_2, val);
 }