Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
bool force_abm_enable;
bool disable_hbup_pg;
bool disable_dpp_pg;
- bool stereo_support;
+ bool disable_stereo_support;
bool vsr_support;
};
struct dc_state;
.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
.disable_dcc = DCC_ENABLE,
.voltage_align_fclk = true,
+ .disable_stereo_support = true,
.vsr_support = true,
};
timing->timing_3d_format != TIMING_3D_FORMAT_INBAND_FA)
return false;
+ if (timing->timing_3d_format != TIMING_3D_FORMAT_NONE &&
+ tg->ctx->dc->debug.disable_stereo_support)
+ return false;
/* Temporarily blocking interlacing mode until it's supported */
if (timing->flags.INTERLACE == 1)
return false;