iommu/io-pgtable-arm-v7s: Rename the quirk from MTK_4GB to MTK_EXT
authorYong Wu <yong.wu@mediatek.com>
Sat, 24 Aug 2019 03:01:53 +0000 (11:01 +0800)
committerJoerg Roedel <jroedel@suse.de>
Fri, 30 Aug 2019 13:57:26 +0000 (15:57 +0200)
In previous mt2712/mt8173, MediaTek extend the v7s to support 4GB dram.
But in the latest mt8183, We extend it to support the PA up to 34bit.
Then the "MTK_4GB" name is not so fit, This patch only change the quirk
name to "MTK_EXT".

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
drivers/iommu/io-pgtable-arm-v7s.c
drivers/iommu/mtk_iommu.c
include/linux/io-pgtable.h

index fa1b38f4c27170e957eedb669002ea289107ab11..77cc1eb1243baf71b217219af8b3111413bfcc12 100644 (file)
@@ -315,7 +315,7 @@ static arm_v7s_iopte arm_v7s_prot_to_pte(int prot, int lvl,
        if (lvl == 1 && (cfg->quirks & IO_PGTABLE_QUIRK_ARM_NS))
                pte |= ARM_V7S_ATTR_NS_SECTION;
 
-       if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_4GB)
+       if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_EXT)
                pte |= ARM_V7S_ATTR_MTK_4GB;
 
        return pte;
@@ -737,12 +737,12 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
        if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS |
                            IO_PGTABLE_QUIRK_NO_PERMS |
                            IO_PGTABLE_QUIRK_TLBI_ON_MAP |
-                           IO_PGTABLE_QUIRK_ARM_MTK_4GB |
+                           IO_PGTABLE_QUIRK_ARM_MTK_EXT |
                            IO_PGTABLE_QUIRK_NON_STRICT))
                return NULL;
 
        /* If ARM_MTK_4GB is enabled, the NO_PERMS is also expected. */
-       if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_4GB &&
+       if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_EXT &&
            !(cfg->quirks & IO_PGTABLE_QUIRK_NO_PERMS))
                        return NULL;
 
index 9ba27062076739e26ebb43a5be667758b7d954ec..62edce75c3661330bb5120e26c7136eab514b17e 100644 (file)
@@ -296,7 +296,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom)
        };
 
        if (data->enable_4GB)
-               dom->cfg.quirks |= IO_PGTABLE_QUIRK_ARM_MTK_4GB;
+               dom->cfg.quirks |= IO_PGTABLE_QUIRK_ARM_MTK_EXT;
 
        dom->iop = alloc_io_pgtable_ops(ARM_V7S, &dom->cfg, data);
        if (!dom->iop) {
index b5a450a3bb47a6f25beafa9510902af070f14dbd..915fb7303aa38bb37d92da45f170e279f718c6c3 100644 (file)
@@ -65,7 +65,7 @@ struct io_pgtable_cfg {
         *      (unmapped) entries but the hardware might do so anyway, perform
         *      TLB maintenance when mapping as well as when unmapping.
         *
-        * IO_PGTABLE_QUIRK_ARM_MTK_4GB: (ARM v7s format) Set bit 9 in all
+        * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) Set bit 9 in all
         *      PTEs, for Mediatek IOMMUs which treat it as a 33rd address bit
         *      when the SoC is in "4GB mode" and they can only access the high
         *      remap of DRAM (0x1_00000000 to 0x1_ffffffff).
@@ -77,7 +77,7 @@ struct io_pgtable_cfg {
        #define IO_PGTABLE_QUIRK_ARM_NS         BIT(0)
        #define IO_PGTABLE_QUIRK_NO_PERMS       BIT(1)
        #define IO_PGTABLE_QUIRK_TLBI_ON_MAP    BIT(2)
-       #define IO_PGTABLE_QUIRK_ARM_MTK_4GB    BIT(3)
+       #define IO_PGTABLE_QUIRK_ARM_MTK_EXT    BIT(3)
        #define IO_PGTABLE_QUIRK_NON_STRICT     BIT(4)
        unsigned long                   quirks;
        unsigned long                   pgsize_bitmap;