drm/amd/powerplay: enable set_cpu_power_state task. (v2)
authorRex Zhu <Rex.Zhu@amd.com>
Thu, 19 Nov 2015 05:47:02 +0000 (13:47 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 21 Dec 2015 21:42:41 +0000 (16:42 -0500)
v2: integrate Jammy's crash fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
drivers/gpu/drm/amd/powerplay/eventmgr/eventsubchains.c
drivers/gpu/drm/amd/powerplay/eventmgr/eventsubchains.h
drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c
drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h

index bbbb76ca900245181e9fd7291d1e17e7fd37b298..9458394aec05c63fbe7d0b22fe5fdab2aa044451 100644 (file)
@@ -260,7 +260,7 @@ const struct action_chain disable_user_2d_performance_action_chain = {
 static const pem_event_action *display_config_change_event[] = {
        /* countDisplayConfigurationChangeEventTasks, */
        unblock_adjust_power_state_tasks,
-       /* setCPUPowerState,*/
+       set_cpu_power_state,
        notify_hw_power_source_tasks,
        /* updateDALConfigurationTasks,
        variBrightDisplayConfigurationChangeTasks, */
index 3dd671eb65eb20a170dd0cc0e43e09707cd59041..9ef2d90e28869f7a6058eb7a1f9771241bb7fc9d 100644 (file)
@@ -403,3 +403,8 @@ const pem_event_action uninitialize_thermal_controller_tasks[] = {
        pem_task_uninitialize_thermal_controller,
        NULL
 };
+
+const pem_event_action set_cpu_power_state[] = {
+       pem_task_set_cpu_power_state,
+       NULL
+};
\ No newline at end of file
index 741ebfcf18b62061e15511725802e9862deb1522..7714cb927428eb15e36cbb06bc4a957b98b780eb 100644 (file)
@@ -96,4 +96,5 @@ extern const pem_event_action reset_boot_state_tasks[];
 extern const pem_event_action create_new_user_performance_state_tasks[];
 extern const pem_event_action initialize_thermal_controller_tasks[];
 extern const pem_event_action uninitialize_thermal_controller_tasks[];
+extern const pem_event_action set_cpu_power_state[];
 #endif /* _EVENT_SUB_CHAINS_H_ */
index 618aadf14cff77c6b4b08e4f63e3d3f25ef464cf..0a03f798773ece73756bd67597d08e45fb562d65 100644 (file)
@@ -248,8 +248,7 @@ int pem_task_reset_display_phys_access(struct pp_eventmgr *eventmgr, struct pem_
 
 int pem_task_set_cpu_power_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
 {
-       /* TODO */
-       return 0;
+       return phm_set_cpu_power_state(eventmgr->hwmgr);
 }
 
 /*powersaving*/
index d6d28497d7d9d0ac2eee577191d44cb47249ffee..31b0dc3b10a22131df36319098878d7d0d6e0343 100644 (file)
@@ -180,7 +180,7 @@ int phm_display_configuration_changed(struct pp_hwmgr *hwmgr)
                        hwmgr->hwmgr_func->display_config_changed(hwmgr);
        } else
                return phm_dispatch_table(hwmgr, &hwmgr->display_configuration_changed, NULL, NULL);
-    return 0;
+       return 0;
 }
 
 int phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
@@ -193,7 +193,7 @@ int phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
                if (NULL != hwmgr->hwmgr_func->display_config_changed)
                        hwmgr->hwmgr_func->notify_smc_display_config_after_ps_adjustment(hwmgr);
 
-    return 0;
+       return 0;
 }
 
 int phm_stop_thermal_controller(struct pp_hwmgr *hwmgr)
@@ -260,3 +260,12 @@ int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr,
                                        display_config->nb_pstate_switch_disable);
 
 }
+
+int phm_set_cpu_power_state(struct pp_hwmgr *hwmgr)
+{
+       if (hwmgr != NULL && hwmgr->hwmgr_func->set_cpu_power_state != NULL)
+               return hwmgr->hwmgr_func->set_cpu_power_state(hwmgr);
+
+       return 0;
+}
+
index 7b721e8ea5314028b3e221d856fdf5812f8fe3aa..820622dfe7531cb49fb42a374583774d65ecfe9f 100644 (file)
@@ -356,5 +356,7 @@ extern int phm_check_states_equal(struct pp_hwmgr *hwmgr,
 extern int phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr,
                    const struct amd_pp_display_configuration *display_config);
 
+extern int phm_set_cpu_power_state(struct pp_hwmgr *hwmgr);
+
 #endif /* _HARDWARE_MANAGER_H_ */