lantiq: dts: assign the NAND pins to the nand-controller node
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Mon, 8 Jul 2019 10:10:12 +0000 (12:10 +0200)
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>
Sun, 22 Dec 2019 00:24:23 +0000 (01:24 +0100)
Assign the NAND pins to the NAND controller node instead of using pin
hogging (where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.

While here, define all NAND pins (CLE, ALE, read/RD, ready busy/RDY and
CE/CS1). This means that the pinctrl subsystem knows that these pins are
in use and cannot be re-assigned as GPIOs for example.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
16 files changed:
target/linux/lantiq/files/arch/mips/boot/dts/BTHOMEHUBV2B.dts
target/linux/lantiq/files/arch/mips/boot/dts/BTHOMEHUBV3A.dts
target/linux/lantiq/files/arch/mips/boot/dts/BTHOMEHUBV5A.dts
target/linux/lantiq/files/arch/mips/boot/dts/EASY80920.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/EASY80920NAND.dts
target/linux/lantiq/files/arch/mips/boot/dts/FRITZ3370-REV2-HYNIX.dts
target/linux/lantiq/files/arch/mips/boot/dts/FRITZ3370-REV2-MICRON.dts
target/linux/lantiq/files/arch/mips/boot/dts/FRITZ3370-REV2.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/FRITZ7362SL.dts
target/linux/lantiq/files/arch/mips/boot/dts/FRITZ7412.dts
target/linux/lantiq/files/arch/mips/boot/dts/P2812HNUF1.dts
target/linux/lantiq/files/arch/mips/boot/dts/P2812HNUF3.dts
target/linux/lantiq/files/arch/mips/boot/dts/P2812HNUFX.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/vr9.dtsi

index 2b3afb2295b428bb804a6d7baaebf4fa246cdc5f..5d69ed8d72d0697398940554299a82d4e26d713f 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               nand_out {
-                       lantiq,groups = "nand cle", "nand ale";
-                       lantiq,function = "ebu";
-                       lantiq,output = <1>;
-                       lantiq,open-drain = <0>;
-                       lantiq,pull = <0>;
-               };
-               nand_cs1 {
-                       lantiq,groups = "nand cs1";
-                       lantiq,function = "ebu";
-                       lantiq,open-drain = <0>;
-                       lantiq,pull = <0>;
-               };
                exin {
                        lantiq,groups = "exin1";
                        lantiq,function = "exin";
                reg = <1 0x0 0x2000000 >;
                req-mask = <0x1>;  /* PCI request lines to mask during NAND access */
 
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                partitions {
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
index 823a158fbf9fab70b30f38cdc3bc3249e3c756d4..b4d9fbea91a2b814571be5441e1445e172864483 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               nand_out {
-                       lantiq,groups = "nand cle", "nand ale";
-                       lantiq,function = "ebu";
-                       lantiq,output = <1>;
-                       lantiq,open-drain = <0>;
-                       lantiq,pull = <0>;
-               };
-               nand_cs1 {
-                       lantiq,groups = "nand cs1";
-                       lantiq,function = "ebu";
-                       lantiq,open-drain = <0>;
-                       lantiq,pull = <0>;
-               };
-
                pci_in {
                        lantiq,groups = "req1";
                        lantiq,function = "pci";
                reg = <1 0x0 0x2000000 >;
                req-mask = <0x1>;  /* PCI request lines to mask during NAND access */
 
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                partitions {
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
index 186ed37a9cc93f8b70527d22f08d07de7b8c6def..f6a2d9f6a786f9867666df15dc2c798bb5aeec59 100644 (file)
                        lantiq,open-drain = <0>;
                        lantiq,output = <1>;
                };
-               nand_out {
-                       lantiq,groups = "nand cle", "nand ale";
-                       lantiq,function = "ebu";
-                       lantiq,output = <1>;
-                       lantiq,open-drain = <0>;
-                       lantiq,pull = <0>;
-               };
-               nand_cs1 {
-                       lantiq,groups = "nand cs1";
-                       lantiq,function = "ebu";
-                       lantiq,open-drain = <0>;
-                       lantiq,pull = <0>;
-               };
        };
 };
 
                lantiq,cs = <1>;
                bank-width = <2>;
                reg = <0x1 0x0 0x2000000>;
+
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                nand-on-flash-bbt;
                nand-ecc-strength = <3>;
                nand-ecc-step-size = <256>;
index 687a2f409892742c5bb7e1db7a334d7d822d33fa..33c8dd19f7eda32aae2a501ae1467c3df4d3d3ab 100644 (file)
                        lantiq,groups = "stp";
                        lantiq,function = "stp";
                };
-               nand {
-                       lantiq,groups = "nand cle", "nand ale",
-                                       "nand rd", "nand rdy";
-                       lantiq,function = "ebu";
-               };
                pci {
                        lantiq,groups = "gnt1", "req1";
                        lantiq,function = "pci";
                };
                conf_out {
-                       lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
-                                       "io4", "io5", "io6", /* stp */
+                       lantiq,pins = "io4", "io5", "io6", /* stp */
                                        "io21",
                                        "io33";
                        lantiq,open-drain;
                        lantiq,output = <1>;
                };
                conf_in {
-                       lantiq,pins = "io39", /* exin3 */
-                                       "io48"; /* nand rdy */
+                       lantiq,pins = "io39"; /* exin3 */
                        lantiq,pull = <2>;
                };
        };
index f687edf54d8687e2748d3b25b9b1243b931cda43..0bf8e1b7efa1d6b3f707bda1e1187d83c4664d6f 100644 (file)
@@ -19,6 +19,9 @@
                bank-width = <2>;
                reg = <0 0x0 0x2000000>;
 
+               pinctrl-0 = <&nand_pins>;
+               pinctrl-names = "default";
+
                partitions {
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
index c70f124db547b54a7f9c2502625d91987d864736..15bd0d271351254b2839dfcef9db06cab4c4a75e 100644 (file)
@@ -13,6 +13,9 @@
                bank-width = <2>;
                reg = <1 0x0 0x2000000>;
 
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                nand-ecc-mode = "soft";
                nand-ecc-strength = <3>;
                nand-ecc-step-size = <256>;
index 3aaea4cb6d232d58591ffdfa4fd463b9c0bb12ba..7e4a3e11143c05dc26c2802feae9e914b1c98543 100644 (file)
@@ -13,6 +13,9 @@
                bank-width = <2>;
                reg = <1 0x0 0x2000000>;
 
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                nand-ecc-mode = "on-die";
 
                partitions {
index b83f0f058a31e5c4eff35d474df73884a549fb07..bac27c364960f4b4b58d7c513fee0d6d7fb608db 100644 (file)
        pinctrl-0 = <&state_default>;
 
        state_default: pinmux {
-               nand {
-                       lantiq,groups = "nand cle", "nand ale",
-                                       "nand rd", "nand cs1", "nand rdy";
-                       lantiq,function = "ebu";
-                       lantiq,pull = <1>;
-               };
-
                phy-rst {
                        lantiq,pins = "io37", "io44";
                        lantiq,pull = <0>;
index 8f1fc261fbea6d4cdcedf0330159fc29f02723b4..feb92425744369ac50af86ea00e9518d174292bf 100644 (file)
 };
 
 &state_default {
-       nand {
-               lantiq,groups = "nand ale", "nand cle",
-                               "nand cs1", "nand rd", "nand rdy";
-               lantiq,function = "ebu";
-       };
-
        pcie-rst {
                lantiq,pins = "io21";
                lantiq,open-drain = <1>;
                lantiq,cs1 = <1>;
                bank-width = <1>;
                reg = <1 0x0 0x2000000>;
+
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                nand-ecc-mode = "on-die";
 
                partitions {
index 04aa99d185732e74e9aa1014c1203d7a7fb73a4b..43216d66bef37c068af633e01fbbf89f0e611858 100644 (file)
@@ -89,6 +89,9 @@
                reg = <0 0x0 0x2000000>;
                lantiq,cs = <1>;
 
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                partitions {
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
                        lantiq,open-drain = <1>;
                        lantiq,output = <1>;
                };
-               nand-mux {
-                       lantiq,groups = "nand cle", "nand ale",
-                       "nand rd", "nand cs1",
-                       "nand rdy";
-                       lantiq,function = "ebu";
-               };
-               nand-pins {
-                       lantiq,pins = "io13", "io24", "io49";
-                       lantiq,pull = <1>;
-               };
        };
 };
 
index 3159a5a2444ac453bc09a1e3cf99d9a4ad4ffa3f..d1a04a4a78f8ccd3f25c3455889b0c6cc2947023 100644 (file)
@@ -30,6 +30,9 @@
                bank-width = <2>;
                reg = <0 0x0 0x2000000>;
 
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                partitions {
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
index f6e8fd8c83bbf98222b1296c1e5af1d70dff10aa..a6073114600cc69fcdb6a0ca18187d4383d03042 100644 (file)
@@ -21,6 +21,9 @@
                bank-width = <2>;
                reg = <0 0x0 0x800000>;
 
+               pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+               pinctrl-names = "default";
+
                partitions {
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
index 274abcc50313d81b5c0c521372300ca7c0dc3518..d02c8837f4d507c9bc2a94c5c83390d0b141bd89 100644 (file)
                        lantiq,open-drain = <0>;
                        lantiq,output = <1>;
                };
-               nand_out {
-                       lantiq,groups = "nand cle", "nand ale";
-                       lantiq,function = "ebu";
-                       lantiq,output = <1>;
-                       lantiq,open-drain = <0>;
-                       lantiq,pull = <0>;
-               };
-               nand_cs1 {
-                       lantiq,groups = "nand cs1";
-                       lantiq,function = "ebu";
-                       lantiq,open-drain = <0>;
-                       lantiq,pull = <0>;
-               };
        };
 };
 
index ab518e75c6e0824f31eea36268a80c1a02224583..da56485214f76e19c45a187c50bd3edac295ef43 100644 (file)
                                };
                        };
 
+                       nand_pins: nand {
+                               mux-0 {
+                                       lantiq,groups = "nand cle", "nand ale",
+                                                       "nand rd";
+                                       lantiq,function = "ebu";
+                                       lantiq,output = <1>;
+                                       lantiq,open-drain = <0>;
+                                       lantiq,pull = <0>;
+                               };
+                               mux-1 {
+                                       lantiq,groups = "nand rdy";
+                                       lantiq,function = "ebu";
+                                       lantiq,output = <0>;
+                                       lantiq,pull = <2>;
+                               };
+                       };
+
+                       nand_cs1_pins: nand-cs1 {
+                               mux {
+                                       lantiq,groups = "nand cs1";
+                                       lantiq,function = "ebu";
+                                       lantiq,open-drain = <0>;
+                                       lantiq,pull = <0>;
+                               };
+                       };
+
                        spi_pins: spi {
                                mux-0 {
                                        lantiq,groups = "spi_di";
index cadfb807502f90b76710ede8e39e9134e25310a1..eec7a5d05432e957d97652ffb6546b0a2e993a15 100644 (file)
                        #gpio-cells = <2>;
                        gpio-controller;
                        reg = <0xe100b10 0xa0>;
+
+                       nand_pins: nand {
+                               mux-0 {
+                                       lantiq,groups = "nand cle", "nand ale",
+                                                       "nand rd";
+                                       lantiq,function = "ebu";
+                                       lantiq,output = <1>;
+                                       lantiq,open-drain = <0>;
+                                       lantiq,pull = <0>;
+                               };
+                               mux-1 {
+                                       lantiq,groups = "nand rdy";
+                                       lantiq,function = "ebu";
+                                       lantiq,output = <0>;
+                                       lantiq,pull = <2>;
+                               };
+                       };
+
+                       nand_cs1_pins: nand-cs1 {
+                               mux {
+                                       lantiq,groups = "nand cs1";
+                                       lantiq,function = "ebu";
+                                       lantiq,open-drain = <0>;
+                                       lantiq,pull = <0>;
+                               };
+                       };
                };
 
                asc1: serial@e100c00 {
index 4639aaf490304071542d7c0820a7eb2efe1d1340..caedad8bce773d6530e9cdb02e23d6083410c8d5 100644 (file)
                                };
                        };
 
+                       nand_pins: nand {
+                               mux-0 {
+                                       lantiq,groups = "nand cle", "nand ale",
+                                                       "nand rd";
+                                       lantiq,function = "ebu";
+                                       lantiq,output = <1>;
+                                       lantiq,open-drain = <0>;
+                                       lantiq,pull = <0>;
+                               };
+                               mux-1 {
+                                       lantiq,groups = "nand rdy";
+                                       lantiq,function = "ebu";
+                                       lantiq,output = <0>;
+                                       lantiq,pull = <2>;
+                               };
+                       };
+
+                       nand_cs1_pins: nand-cs1 {
+                               mux {
+                                       lantiq,groups = "nand cs1";
+                                       lantiq,function = "ebu";
+                                       lantiq,open-drain = <0>;
+                                       lantiq,pull = <0>;
+                               };
+                       };
+
                        spi_pins: spi {
                                mux-0 {
                                        lantiq,groups = "spi_di";