[ARM] 4672/1: pxa: fix DRCMR(n) to support PXA27x and later processors
authoreric miao <eric.y.miao@gmail.com>
Tue, 27 Nov 2007 02:12:19 +0000 (03:12 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 29 Nov 2007 20:52:28 +0000 (20:52 +0000)
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
include/asm-arm/arch-pxa/pxa-regs.h

index bb68b598c4360ab4d7d81463534238cfa42651cf..6b33df6f1995055e9e0b38de9e67b0da13961a65 100644 (file)
 #define DALGN          __REG(0x400000a0)  /* DMA Alignment Register */
 #define DINT           __REG(0x400000f0)  /* DMA Interrupt Register */
 
-#define DRCMR(n)       __REG2(0x40000100, (n)<<2)
+#define DRCMR(n)       (*(((n) < 64) ? \
+                       &__REG2(0x40000100, ((n) & 0x3f) << 2) : \
+                       &__REG2(0x40001100, ((n) & 0x3f) << 2)))
+
 #define DRCMR0         __REG(0x40000100)  /* Request to Channel Map Register for DREQ 0 */
 #define DRCMR1         __REG(0x40000104)  /* Request to Channel Map Register for DREQ 1 */
 #define DRCMR2         __REG(0x40000108)  /* Request to Channel Map Register for I2S receive Request */