Fix GigaDevice GD25Q32/GD25Q64 SPI Flash bad commit

Fix GigaDevice GD25Q32/GD25Q64 SPI Flash bad commit.

The patch was added to "linux/generic/patches-3.6" instead of
"target/linux/generic/patches-3.6".
I also fixed a missing patch space and refreshed generic patches.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 35367

diff --git a/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch b/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch
deleted file mode 100644 (file)
index ddc27b1..0000000
--- a/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch
+++ /dev/null
@@ -1,13 +0,0 @@
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -651,6 +651,10 @@
-       /* Everspin */
-       { "mr25h256", CAT25_INFO(  32 * 1024, 1, 256, 2) },
- 
-+      /* GigaDevice */
-+      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
-+      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
-+
-       /* Intel/Numonyx -- xxxs33b */
-       { "160s33b",  INFO(0x898911, 0, 64 * 1024,  32, 0) },
-       { "320s33b",  INFO(0x898912, 0, 64 * 1024,  64, 0) },

diff --git a/target/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch b/target/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch
new file mode 100644 (file)
index 0000000..ddc27b1
--- /dev/null
+++ b/target/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch
@@ -0,0 +1,13 @@
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -651,6 +651,10 @@
+       /* Everspin */
+       { "mr25h256", CAT25_INFO(  32 * 1024, 1, 256, 2) },
+ 
++      /* GigaDevice */
++      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
++      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
++
+       /* Intel/Numonyx -- xxxs33b */
+       { "160s33b",  INFO(0x898911, 0, 64 * 1024,  32, 0) },
+       { "320s33b",  INFO(0x898912, 0, 64 * 1024,  64, 0) },