bcm4908: backport upstream DTS patches
authorRafał Miłecki <rafal@milecki.pl>
Tue, 12 Jan 2021 22:03:41 +0000 (23:03 +0100)
committerRafał Miłecki <rafal@milecki.pl>
Tue, 12 Jan 2021 22:07:10 +0000 (23:07 +0100)
1. Netgear R8000P DTS file
2. NAND fix
3. PCIe reset block
4. Integrated switch
5. PMB block

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
target/linux/bcm4908/patches-5.4/030-v5.11-0001-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch [deleted file]
target/linux/bcm4908/patches-5.4/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch [new file with mode: 0644]
target/linux/bcm4908/patches-5.4/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch [new file with mode: 0644]
target/linux/bcm4908/patches-5.4/030-v5.11-0002-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch [deleted file]
target/linux/bcm4908/patches-5.4/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch [new file with mode: 0644]
target/linux/bcm4908/patches-5.4/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch [new file with mode: 0644]
target/linux/bcm4908/patches-5.4/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch [new file with mode: 0644]
target/linux/bcm4908/patches-5.4/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch [new file with mode: 0644]
target/linux/bcm4908/patches-5.4/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch [new file with mode: 0644]
target/linux/bcm4908/patches-5.4/130-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch [new file with mode: 0644]
target/linux/bcm4908/patches-5.4/131-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch [new file with mode: 0644]

diff --git a/target/linux/bcm4908/patches-5.4/030-v5.11-0001-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch b/target/linux/bcm4908/patches-5.4/030-v5.11-0001-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch
deleted file mode 100644 (file)
index 3598b5b..0000000
+++ /dev/null
@@ -1,307 +0,0 @@
-From 2961f69f151c0a6771f55cef46398fe49ca20902 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Thu, 12 Nov 2020 16:08:32 +0100
-Subject: [PATCH] arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early
- DTS files
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-They don't descibe hardware fully yet but it's enough to boot a system.
-
-Some missing blocks:
-1. PMC (Power Management Controller?)
-2. Ethernet
-3. Crypto
-4. Thermal
-
-Asus DTS is missing defining full NAND partitions layout and buttons.
-
-Further changes will fill those gaps as soon as required bindings will
-be found / tested / added.
-
-Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm64/boot/dts/broadcom/Makefile         |   1 +
- arch/arm64/boot/dts/broadcom/bcm4908/Makefile |   2 +
- .../bcm4908/bcm4908-asus-gt-ac5300.dts        |  66 +++++++
- .../boot/dts/broadcom/bcm4908/bcm4908.dtsi    | 187 ++++++++++++++++++
- 4 files changed, 256 insertions(+)
- create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/Makefile
- create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
- create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
-
---- a/arch/arm64/boot/dts/broadcom/Makefile
-+++ b/arch/arm64/boot/dts/broadcom/Makefile
-@@ -4,5 +4,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rp
-                             bcm2837-rpi-3-b-plus.dtb \
-                             bcm2837-rpi-cm3-io3.dtb
-+subdir-y      += bcm4908
- subdir-y      += northstar2
- subdir-y      += stingray
---- /dev/null
-+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
-@@ -0,0 +1,2 @@
-+# SPDX-License-Identifier: GPL-2.0
-+dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
---- /dev/null
-+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
-@@ -0,0 +1,66 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+#include "bcm4908.dtsi"
-+
-+/ {
-+      compatible = "asus,gt-ac5300", "brcm,bcm4908";
-+      model = "Asus GT-AC5300";
-+
-+      memory@0 {
-+              device_type = "memory";
-+              reg = <0x00 0x00 0x00 0x40000000>;
-+      };
-+
-+      gpio-keys-polled {
-+              compatible = "gpio-keys-polled";
-+              poll-interval = <100>;
-+
-+              wifi {
-+                      label = "WiFi";
-+                      linux,code = <KEY_RFKILL>;
-+                      gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              wps {
-+                      label = "WPS";
-+                      linux,code = <KEY_WPS_BUTTON>;
-+                      gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              restart {
-+                      label = "Reset";
-+                      linux,code = <KEY_RESTART>;
-+                      gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              brightness {
-+                      label = "LEDs";
-+                      linux,code = <KEY_BRIGHTNESS_ZERO>;
-+                      gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
-+              };
-+      };
-+};
-+
-+&nandcs {
-+      nand-ecc-strength = <4>;
-+      nand-ecc-step-size = <512>;
-+      nand-on-flash-bbt;
-+      brcm,nand-has-wp;
-+
-+      #address-cells = <1>;
-+      #size-cells = <0>;
-+
-+      partitions {
-+              compatible = "fixed-partitions";
-+              #address-cells = <1>;
-+              #size-cells = <1>;
-+
-+              partition@0 {
-+                      label = "cferom";
-+                      reg = <0x0 0x100000>;
-+              };
-+      };
-+};
---- /dev/null
-+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
-@@ -0,0 +1,187 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include <dt-bindings/interrupt-controller/irq.h>
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+
-+/dts-v1/;
-+
-+/ {
-+      interrupt-parent = <&gic>;
-+
-+      #address-cells = <2>;
-+      #size-cells = <2>;
-+
-+      aliases {
-+              serial0 = &uart0;
-+      };
-+
-+      chosen {
-+              stdout-path = "serial0:115200n8";
-+      };
-+
-+      cpus {
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              cpu0: cpu@0 {
-+                      device_type = "cpu";
-+                      compatible = "brcm,brahma-b53";
-+                      reg = <0x0>;
-+                      next-level-cache = <&l2>;
-+              };
-+
-+              cpu1: cpu@1 {
-+                      device_type = "cpu";
-+                      compatible = "brcm,brahma-b53";
-+                      reg = <0x1>;
-+                      enable-method = "spin-table";
-+                      cpu-release-addr = <0x0 0xfff8>;
-+                      next-level-cache = <&l2>;
-+              };
-+
-+              cpu2: cpu@2 {
-+                      device_type = "cpu";
-+                      compatible = "brcm,brahma-b53";
-+                      reg = <0x2>;
-+                      enable-method = "spin-table";
-+                      cpu-release-addr = <0x0 0xfff8>;
-+                      next-level-cache = <&l2>;
-+              };
-+
-+              cpu3: cpu@3 {
-+                      device_type = "cpu";
-+                      compatible = "brcm,brahma-b53";
-+                      reg = <0x3>;
-+                      enable-method = "spin-table";
-+                      cpu-release-addr = <0x0 0xfff8>;
-+                      next-level-cache = <&l2>;
-+              };
-+
-+              l2: l2-cache0 {
-+                      compatible = "cache";
-+              };
-+      };
-+
-+      axi@81000000 {
-+              compatible = "simple-bus";
-+              #address-cells = <1>;
-+              #size-cells = <1>;
-+              ranges = <0x00 0x00 0x81000000 0x4000>;
-+
-+              gic: interrupt-controller@1000 {
-+                      compatible = "arm,gic-400";
-+                      #interrupt-cells = <3>;
-+                      #address-cells = <0>;
-+                      interrupt-controller;
-+                      reg = <0x1000 0x1000>,
-+                            <0x2000 0x2000>;
-+              };
-+      };
-+
-+      timer {
-+              compatible = "arm,armv8-timer";
-+              interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+                           <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+                           <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+                           <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
-+      };
-+
-+      pmu {
-+              compatible = "arm,cortex-a53-pmu";
-+              interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-+                           <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
-+                           <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-+                           <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-+              interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
-+      };
-+
-+      clocks {
-+              periph_clk: periph_clk {
-+                      compatible = "fixed-clock";
-+                      #clock-cells = <0>;
-+                      clock-frequency = <50000000>;
-+                      clock-output-names = "periph";
-+              };
-+      };
-+
-+      soc {
-+              compatible = "simple-bus";
-+              #address-cells = <1>;
-+              #size-cells = <1>;
-+              ranges = <0x00 0x00 0x80000000 0x10000>;
-+
-+              usb@c300 {
-+                      compatible = "generic-ehci";
-+                      reg = <0xc300 0x100>;
-+                      interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
-+                      status = "disabled";
-+              };
-+
-+              usb@c400 {
-+                      compatible = "generic-ohci";
-+                      reg = <0xc400 0x100>;
-+                      interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
-+                      status = "disabled";
-+              };
-+
-+              usb@d000 {
-+                      compatible = "generic-xhci";
-+                      reg = <0xd000 0x8c8>;
-+                      interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-+                      status = "disabled";
-+              };
-+      };
-+
-+      bus@ff800000 {
-+              compatible = "simple-bus";
-+              #address-cells = <1>;
-+              #size-cells = <1>;
-+              ranges = <0x00 0x00 0xff800000 0x3000>;
-+
-+              timer: timer@400 {
-+                      compatible = "brcm,bcm6328-timer", "syscon";
-+                      reg = <0x400 0x3c>;
-+              };
-+
-+              gpio0: gpio-controller@500 {
-+                      compatible = "brcm,bcm6345-gpio";
-+                      reg-names = "dirout", "dat";
-+                      reg = <0x500 0x28>, <0x528 0x28>;
-+
-+                      #gpio-cells = <2>;
-+                      gpio-controller;
-+              };
-+
-+              uart0: serial@640 {
-+                      compatible = "brcm,bcm6345-uart";
-+                      reg = <0x640 0x18>;
-+                      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-+                      clocks = <&periph_clk>;
-+                      clock-names = "periph";
-+                      status = "okay";
-+              };
-+
-+              nand@1800 {
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+                      compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";
-+                      reg = <0x1800 0x600>, <0x2000 0x10>;
-+                      reg-names = "nand", "nand-int-base";
-+                      interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-+                      interrupt-names = "nand";
-+                      status = "okay";
-+
-+                      nandcs: nandcs@0 {
-+                              compatible = "brcm,nandcs";
-+                              reg = <0>;
-+                      };
-+              };
-+
-+              reboot {
-+                      compatible = "syscon-reboot";
-+                      regmap = <&timer>;
-+                      offset = <0x34>;
-+                      mask = <1>;
-+              };
-+      };
-+};
diff --git a/target/linux/bcm4908/patches-5.4/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch b/target/linux/bcm4908/patches-5.4/030-v5.11-0001-dt-bindings-arm-bcm-document-BCM4908-bindings.patch
new file mode 100644 (file)
index 0000000..66726cb
--- /dev/null
@@ -0,0 +1,60 @@
+From 2f8913a7b17efd3a116825160a2d3a6610444587 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 12 Nov 2020 16:08:31 +0100
+Subject: [PATCH] dt-bindings: arm: bcm: document BCM4908 bindings
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM4908 is a new family that includes BCM4906, BCM4908 and BCM49408.
+It's mostly used in home routers and often replaces Northstar in vendors
+portfolio.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../bindings/arm/bcm/brcm,bcm4908.yaml        | 38 +++++++++++++++++++
+ 1 file changed, 38 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
+@@ -0,0 +1,38 @@
++# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Broadcom BCM4908 device tree bindings
++
++description:
++  Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs.
++
++maintainers:
++  - Rafał Miłecki <rafal@milecki.pl>
++
++properties:
++  $nodename:
++    const: '/'
++  compatible:
++    oneOf:
++      - description: BCM4906 based boards
++        items:
++          - const: brcm,bcm4906
++          - const: brcm,bcm4908
++
++      - description: BCM4908 based boards
++        items:
++          - enum:
++              - asus,gt-ac5300
++          - const: brcm,bcm4908
++
++      - description: BCM49408 based boards
++        items:
++          - const: brcm,bcm49408
++          - const: brcm,bcm4908
++
++additionalProperties: true
++
++...
diff --git a/target/linux/bcm4908/patches-5.4/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch b/target/linux/bcm4908/patches-5.4/030-v5.11-0002-arm64-dts-broadcom-add-BCM4908-and-Asus-GT-AC5300-ea.patch
new file mode 100644 (file)
index 0000000..3598b5b
--- /dev/null
@@ -0,0 +1,307 @@
+From 2961f69f151c0a6771f55cef46398fe49ca20902 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 12 Nov 2020 16:08:32 +0100
+Subject: [PATCH] arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early
+ DTS files
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+They don't descibe hardware fully yet but it's enough to boot a system.
+
+Some missing blocks:
+1. PMC (Power Management Controller?)
+2. Ethernet
+3. Crypto
+4. Thermal
+
+Asus DTS is missing defining full NAND partitions layout and buttons.
+
+Further changes will fill those gaps as soon as required bindings will
+be found / tested / added.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm64/boot/dts/broadcom/Makefile         |   1 +
+ arch/arm64/boot/dts/broadcom/bcm4908/Makefile |   2 +
+ .../bcm4908/bcm4908-asus-gt-ac5300.dts        |  66 +++++++
+ .../boot/dts/broadcom/bcm4908/bcm4908.dtsi    | 187 ++++++++++++++++++
+ 4 files changed, 256 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/Makefile
+ create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+ create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+
+--- a/arch/arm64/boot/dts/broadcom/Makefile
++++ b/arch/arm64/boot/dts/broadcom/Makefile
+@@ -4,5 +4,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rp
+                             bcm2837-rpi-3-b-plus.dtb \
+                             bcm2837-rpi-cm3-io3.dtb
++subdir-y      += bcm4908
+ subdir-y      += northstar2
+ subdir-y      += stingray
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
+@@ -0,0 +1,2 @@
++# SPDX-License-Identifier: GPL-2.0
++dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+@@ -0,0 +1,66 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++
++#include "bcm4908.dtsi"
++
++/ {
++      compatible = "asus,gt-ac5300", "brcm,bcm4908";
++      model = "Asus GT-AC5300";
++
++      memory@0 {
++              device_type = "memory";
++              reg = <0x00 0x00 0x00 0x40000000>;
++      };
++
++      gpio-keys-polled {
++              compatible = "gpio-keys-polled";
++              poll-interval = <100>;
++
++              wifi {
++                      label = "WiFi";
++                      linux,code = <KEY_RFKILL>;
++                      gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
++              };
++
++              wps {
++                      label = "WPS";
++                      linux,code = <KEY_WPS_BUTTON>;
++                      gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
++              };
++
++              restart {
++                      label = "Reset";
++                      linux,code = <KEY_RESTART>;
++                      gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
++              };
++
++              brightness {
++                      label = "LEDs";
++                      linux,code = <KEY_BRIGHTNESS_ZERO>;
++                      gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
++              };
++      };
++};
++
++&nandcs {
++      nand-ecc-strength = <4>;
++      nand-ecc-step-size = <512>;
++      nand-on-flash-bbt;
++      brcm,nand-has-wp;
++
++      #address-cells = <1>;
++      #size-cells = <0>;
++
++      partitions {
++              compatible = "fixed-partitions";
++              #address-cells = <1>;
++              #size-cells = <1>;
++
++              partition@0 {
++                      label = "cferom";
++                      reg = <0x0 0x100000>;
++              };
++      };
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+@@ -0,0 +1,187 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++
++/dts-v1/;
++
++/ {
++      interrupt-parent = <&gic>;
++
++      #address-cells = <2>;
++      #size-cells = <2>;
++
++      aliases {
++              serial0 = &uart0;
++      };
++
++      chosen {
++              stdout-path = "serial0:115200n8";
++      };
++
++      cpus {
++              #address-cells = <1>;
++              #size-cells = <0>;
++
++              cpu0: cpu@0 {
++                      device_type = "cpu";
++                      compatible = "brcm,brahma-b53";
++                      reg = <0x0>;
++                      next-level-cache = <&l2>;
++              };
++
++              cpu1: cpu@1 {
++                      device_type = "cpu";
++                      compatible = "brcm,brahma-b53";
++                      reg = <0x1>;
++                      enable-method = "spin-table";
++                      cpu-release-addr = <0x0 0xfff8>;
++                      next-level-cache = <&l2>;
++              };
++
++              cpu2: cpu@2 {
++                      device_type = "cpu";
++                      compatible = "brcm,brahma-b53";
++                      reg = <0x2>;
++                      enable-method = "spin-table";
++                      cpu-release-addr = <0x0 0xfff8>;
++                      next-level-cache = <&l2>;
++              };
++
++              cpu3: cpu@3 {
++                      device_type = "cpu";
++                      compatible = "brcm,brahma-b53";
++                      reg = <0x3>;
++                      enable-method = "spin-table";
++                      cpu-release-addr = <0x0 0xfff8>;
++                      next-level-cache = <&l2>;
++              };
++
++              l2: l2-cache0 {
++                      compatible = "cache";
++              };
++      };
++
++      axi@81000000 {
++              compatible = "simple-bus";
++              #address-cells = <1>;
++              #size-cells = <1>;
++              ranges = <0x00 0x00 0x81000000 0x4000>;
++
++              gic: interrupt-controller@1000 {
++                      compatible = "arm,gic-400";
++                      #interrupt-cells = <3>;
++                      #address-cells = <0>;
++                      interrupt-controller;
++                      reg = <0x1000 0x1000>,
++                            <0x2000 0x2000>;
++              };
++      };
++
++      timer {
++              compatible = "arm,armv8-timer";
++              interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++                           <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++                           <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
++                           <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
++      };
++
++      pmu {
++              compatible = "arm,cortex-a53-pmu";
++              interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
++                           <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
++                           <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
++                           <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
++              interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
++      };
++
++      clocks {
++              periph_clk: periph_clk {
++                      compatible = "fixed-clock";
++                      #clock-cells = <0>;
++                      clock-frequency = <50000000>;
++                      clock-output-names = "periph";
++              };
++      };
++
++      soc {
++              compatible = "simple-bus";
++              #address-cells = <1>;
++              #size-cells = <1>;
++              ranges = <0x00 0x00 0x80000000 0x10000>;
++
++              usb@c300 {
++                      compatible = "generic-ehci";
++                      reg = <0xc300 0x100>;
++                      interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
++                      status = "disabled";
++              };
++
++              usb@c400 {
++                      compatible = "generic-ohci";
++                      reg = <0xc400 0x100>;
++                      interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
++                      status = "disabled";
++              };
++
++              usb@d000 {
++                      compatible = "generic-xhci";
++                      reg = <0xd000 0x8c8>;
++                      interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
++                      status = "disabled";
++              };
++      };
++
++      bus@ff800000 {
++              compatible = "simple-bus";
++              #address-cells = <1>;
++              #size-cells = <1>;
++              ranges = <0x00 0x00 0xff800000 0x3000>;
++
++              timer: timer@400 {
++                      compatible = "brcm,bcm6328-timer", "syscon";
++                      reg = <0x400 0x3c>;
++              };
++
++              gpio0: gpio-controller@500 {
++                      compatible = "brcm,bcm6345-gpio";
++                      reg-names = "dirout", "dat";
++                      reg = <0x500 0x28>, <0x528 0x28>;
++
++                      #gpio-cells = <2>;
++                      gpio-controller;
++              };
++
++              uart0: serial@640 {
++                      compatible = "brcm,bcm6345-uart";
++                      reg = <0x640 0x18>;
++                      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
++                      clocks = <&periph_clk>;
++                      clock-names = "periph";
++                      status = "okay";
++              };
++
++              nand@1800 {
++                      #address-cells = <1>;
++                      #size-cells = <0>;
++                      compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";
++                      reg = <0x1800 0x600>, <0x2000 0x10>;
++                      reg-names = "nand", "nand-int-base";
++                      interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
++                      interrupt-names = "nand";
++                      status = "okay";
++
++                      nandcs: nandcs@0 {
++                              compatible = "brcm,nandcs";
++                              reg = <0>;
++                      };
++              };
++
++              reboot {
++                      compatible = "syscon-reboot";
++                      regmap = <&timer>;
++                      offset = <0x34>;
++                      mask = <1>;
++              };
++      };
++};
diff --git a/target/linux/bcm4908/patches-5.4/030-v5.11-0002-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch b/target/linux/bcm4908/patches-5.4/030-v5.11-0002-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch
deleted file mode 100644 (file)
index 42bdbf5..0000000
+++ /dev/null
@@ -1,44 +0,0 @@
-From dccb22d078ebd098115e4f66bde1ee2249c8640b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Thu, 12 Nov 2020 16:08:30 +0100
-Subject: [PATCH] arm64: add config for Broadcom BCM4908 SoCs
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add ARCH_BCM4908 config that can be used for compiling DTS files.
-
-Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm64/Kconfig.platforms | 8 ++++++++
- arch/arm64/configs/defconfig | 1 +
- 2 files changed, 9 insertions(+)
-
---- a/arch/arm64/Kconfig.platforms
-+++ b/arch/arm64/Kconfig.platforms
-@@ -43,6 +43,14 @@ config ARCH_BCM2835
-         This enables support for the Broadcom BCM2837 SoC.
-         This SoC is used in the Raspberry Pi 3 device.
-+config ARCH_BCM4908
-+      bool "Broadcom BCM4908 family"
-+      select GPIOLIB
-+      help
-+        This enables support for the Broadcom BCM4906, BCM4908 and
-+        BCM49408 SoCs. These SoCs use Brahma-B53 cores and can be
-+        found in home routers.
-+
- config ARCH_BCM_IPROC
-       bool "Broadcom iProc SoC Family"
-       select COMMON_CLK_IPROC
---- a/arch/arm64/configs/defconfig
-+++ b/arch/arm64/configs/defconfig
-@@ -33,6 +33,7 @@ CONFIG_ARCH_AGILEX=y
- CONFIG_ARCH_SUNXI=y
- CONFIG_ARCH_ALPINE=y
- CONFIG_ARCH_BCM2835=y
-+CONFIG_ARCH_BCM4908=y
- CONFIG_ARCH_BCM_IPROC=y
- CONFIG_ARCH_BERLIN=y
- CONFIG_ARCH_BRCMSTB=y
diff --git a/target/linux/bcm4908/patches-5.4/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch b/target/linux/bcm4908/patches-5.4/030-v5.11-0003-v5.11-arm64-add-config-for-Broadcom-BCM4908-SoCs.patch
new file mode 100644 (file)
index 0000000..42bdbf5
--- /dev/null
@@ -0,0 +1,44 @@
+From dccb22d078ebd098115e4f66bde1ee2249c8640b Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 12 Nov 2020 16:08:30 +0100
+Subject: [PATCH] arm64: add config for Broadcom BCM4908 SoCs
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add ARCH_BCM4908 config that can be used for compiling DTS files.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm64/Kconfig.platforms | 8 ++++++++
+ arch/arm64/configs/defconfig | 1 +
+ 2 files changed, 9 insertions(+)
+
+--- a/arch/arm64/Kconfig.platforms
++++ b/arch/arm64/Kconfig.platforms
+@@ -43,6 +43,14 @@ config ARCH_BCM2835
+         This enables support for the Broadcom BCM2837 SoC.
+         This SoC is used in the Raspberry Pi 3 device.
++config ARCH_BCM4908
++      bool "Broadcom BCM4908 family"
++      select GPIOLIB
++      help
++        This enables support for the Broadcom BCM4906, BCM4908 and
++        BCM49408 SoCs. These SoCs use Brahma-B53 cores and can be
++        found in home routers.
++
+ config ARCH_BCM_IPROC
+       bool "Broadcom iProc SoC Family"
+       select COMMON_CLK_IPROC
+--- a/arch/arm64/configs/defconfig
++++ b/arch/arm64/configs/defconfig
+@@ -33,6 +33,7 @@ CONFIG_ARCH_AGILEX=y
+ CONFIG_ARCH_SUNXI=y
+ CONFIG_ARCH_ALPINE=y
+ CONFIG_ARCH_BCM2835=y
++CONFIG_ARCH_BCM4908=y
+ CONFIG_ARCH_BCM_IPROC=y
+ CONFIG_ARCH_BERLIN=y
+ CONFIG_ARCH_BRCMSTB=y
diff --git a/target/linux/bcm4908/patches-5.4/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch b/target/linux/bcm4908/patches-5.4/031-v5.12-0001-dt-bindings-arm-bcm-document-Netgear-R8000P-binding.patch
new file mode 100644 (file)
index 0000000..24a0749
--- /dev/null
@@ -0,0 +1,28 @@
+From 3a5da4f54801ac42837a0b3151fa8285e01e8b0e Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 8 Dec 2020 08:03:03 +0100
+Subject: [PATCH] dt-bindings: arm: bcm: document Netgear R8000P binding
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It's a BCM4906 based device.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml
+@@ -19,6 +19,8 @@ properties:
+     oneOf:
+       - description: BCM4906 based boards
+         items:
++          - enum:
++              - netgear,r8000p
+           - const: brcm,bcm4906
+           - const: brcm,bcm4908
diff --git a/target/linux/bcm4908/patches-5.4/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch b/target/linux/bcm4908/patches-5.4/031-v5.12-0002-arm64-dts-broadcom-bcm4908-add-BCM4906-Netgear-R8000.patch
new file mode 100644 (file)
index 0000000..93fa215
--- /dev/null
@@ -0,0 +1,104 @@
+From c8b404fb05dcfadff477e49b7ea6b500e015f101 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 8 Dec 2020 08:03:04 +0100
+Subject: [PATCH 2/4] arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P
+ DTS files
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Netgear R8000P is home router based on BCM4906 that is a cheaper variant
+of BCM4908 (e.g. 2 cores instead of 4).
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm4908/Makefile |  1 +
+ .../bcm4908/bcm4906-netgear-r8000p.dts        | 52 +++++++++++++++++++
+ .../boot/dts/broadcom/bcm4908/bcm4906.dtsi    | 18 +++++++
+ 3 files changed, 71 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+ create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
+
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
+@@ -1,2 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0
++dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb
+ dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+@@ -0,0 +1,52 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/leds/common.h>
++
++#include "bcm4906.dtsi"
++
++/ {
++      compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908";
++      model = "Netgear R8000P";
++
++      memory@0 {
++              device_type = "memory";
++              reg = <0x00 0x00 0x00 0x20000000>;
++      };
++
++      leds {
++              compatible = "gpio-leds";
++
++              wps {
++                      function = LED_FUNCTION_WPS;
++                      color = <LED_COLOR_ID_WHITE>;
++                      gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
++              };
++      };
++};
++
++&nandcs {
++      nand-ecc-strength = <4>;
++      nand-ecc-step-size = <512>;
++      nand-on-flash-bbt;
++
++      #address-cells = <1>;
++      #size-cells = <0>;
++
++      partitions {
++              compatible = "fixed-partitions";
++              #address-cells = <1>;
++              #size-cells = <1>;
++
++              partition@0 {
++                      label = "cferom";
++                      reg = <0x0 0x100000>;
++              };
++
++              partition@100000 {
++                      label = "firmware";
++                      reg = <0x100000 0x4400000>;
++              };
++      };
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
+@@ -0,0 +1,18 @@
++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
++
++#include "bcm4908.dtsi"
++
++/ {
++      cpus {
++              /delete-node/ cpu@2;
++
++              /delete-node/ cpu@3;
++      };
++
++      pmu {
++              compatible = "arm,cortex-a53-pmu";
++              interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
++                           <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
++              interrupt-affinity = <&cpu0>, <&cpu1>;
++      };
++};
diff --git a/target/linux/bcm4908/patches-5.4/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch b/target/linux/bcm4908/patches-5.4/031-v5.12-0003-arm64-dts-broadcom-bcm4908-use-proper-NAND-binding.patch
new file mode 100644 (file)
index 0000000..ccd260f
--- /dev/null
@@ -0,0 +1,32 @@
+From 56098be85d19cd56b59d7b3854ea035cc8cb9e95 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 8 Dec 2020 11:49:50 +0100
+Subject: [PATCH 3/4] arm64: dts: broadcom: bcm4908: use proper NAND binding
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM4908 has controller that needs different IRQ handling just like the
+BCM63138. Describe it properly.
+
+On Linux this change fixes:
+brcmstb_nand ff801800.nand: timeout waiting for command 0x9
+brcmstb_nand ff801800.nand: intfc status d0000000
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+@@ -164,7 +164,7 @@
+               nand@1800 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+-                      compatible = "brcm,brcmnand-v7.1", "brcm,brcmnand";
++                      compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
+                       reg = <0x1800 0x600>, <0x2000 0x10>;
+                       reg-names = "nand", "nand-int-base";
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/target/linux/bcm4908/patches-5.4/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch b/target/linux/bcm4908/patches-5.4/031-v5.12-0004-arm64-dts-broadcom-bcm4908-describe-PCIe-reset-contr.patch
new file mode 100644 (file)
index 0000000..8ce4d69
--- /dev/null
@@ -0,0 +1,41 @@
+From 1b88c6ed26a1aa1d68d1661404e6e939709ff530 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 10 Dec 2020 08:21:54 +0100
+Subject: [PATCH 4/4] arm64: dts: broadcom: bcm4908: describe PCIe reset
+ controller
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This reset controller is a single register in the Broadcom's MISC block.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+@@ -177,6 +177,21 @@
+                       };
+               };
++              misc@2600 {
++                      compatible = "brcm,misc", "simple-mfd";
++                      reg = <0x2600 0xe4>;
++
++                      #address-cells = <1>;
++                      #size-cells = <1>;
++                      ranges = <0x00 0x2600 0xe4>;
++
++                      reset-controller@2644 {
++                              compatible = "brcm,bcm4908-misc-pcie-reset";
++                              reg = <0x44 0x04>;
++                              #reset-cells = <1>;
++                      };
++              };
++
+               reboot {
+                       compatible = "syscon-reboot";
+                       regmap = <&timer>;
diff --git a/target/linux/bcm4908/patches-5.4/130-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch b/target/linux/bcm4908/patches-5.4/130-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch
new file mode 100644 (file)
index 0000000..d039e04
--- /dev/null
@@ -0,0 +1,183 @@
+From 12cda92893ea57cdd84a8ccfcc05946d7f3a1cd7 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 12 Jan 2021 12:56:58 +0100
+Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe internal switch
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM4908 has internal switch with 5 GPHYs. Ports 0 - 3 are always
+connected to the internal PHYs. Remaining ports depend on device setup.
+
+Asus GT-AC5300 has an extra switch with its PHYs accessible using the
+internal MDIO.
+
+CPU port and Ethernet interface remain to be documented.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ .../bcm4908/bcm4908-asus-gt-ac5300.dts        | 51 +++++++++++
+ .../boot/dts/broadcom/bcm4908/bcm4908.dtsi    | 85 ++++++++++++++++++-
+ 2 files changed, 135 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+@@ -44,6 +44,57 @@
+       };
+ };
++&ports {
++      port@0 {
++              label = "lan2";
++      };
++
++      port@1 {
++              label = "lan1";
++      };
++
++      port@2 {
++              label = "lan6";
++      };
++
++      port@3 {
++              label = "lan5";
++      };
++
++      /* External BCM53134S switch */
++      port@7 {
++              label = "sw";
++              reg = <7>;
++
++              fixed-link {
++                      speed = <1000>;
++                      full-duplex;
++              };
++      };
++};
++
++&mdio {
++      /* lan8 */
++      phy@0 {
++              reg = <0>;
++      };
++
++      /* lan7 */
++      phy@1 {
++              reg = <1>;
++      };
++
++      /* lan4 */
++      phy@2 {
++              reg = <2>;
++      };
++
++      /* lan3 */
++      phy@3 {
++              reg = <3>;
++      };
++};
++
+ &nandcs {
+       nand-ecc-strength = <4>;
+       nand-ecc-step-size = <512>;
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+@@ -108,7 +108,7 @@
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+-              ranges = <0x00 0x00 0x80000000 0x10000>;
++              ranges = <0x00 0x00 0x80000000 0xd0000>;
+               usb@c300 {
+                       compatible = "generic-ehci";
+@@ -130,6 +130,89 @@
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+               };
++
++              switch@80000 {
++                      compatible = "simple-mfd";
++                      #size-cells = <1>;
++                      #address-cells = <1>;
++                      ranges = <0 0x80000 0x50000>;
++
++                      switch@0 {
++                              compatible = "brcm,bcm4908-switch";
++                              reg = <0x0 0x40000>,
++                                    <0x40000 0x110>,
++                                    <0x40340 0x30>,
++                                    <0x40380 0x30>,
++                                    <0x40600 0x34>,
++                                    <0x40800 0x208>;
++                              reg-names = "core", "reg", "intrl2_0",
++                                          "intrl2_1", "fcb", "acb";
++                              interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
++                                           <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
++                              brcm,num-gphy = <5>;
++                              brcm,num-rgmii-ports = <2>;
++
++                              #address-cells = <1>;
++                              #size-cells = <0>;
++
++                              ports: ports {
++                                      #address-cells = <1>;
++                                      #size-cells = <0>;
++
++                                      port@0 {
++                                              reg = <0>;
++                                              phy-mode = "internal";
++                                              phy-handle = <&phy8>;
++                                      };
++
++                                      port@1 {
++                                              reg = <1>;
++                                              phy-mode = "internal";
++                                              phy-handle = <&phy9>;
++                                      };
++
++                                      port@2 {
++                                              reg = <2>;
++                                              phy-mode = "internal";
++                                              phy-handle = <&phy10>;
++                                      };
++
++                                      port@3 {
++                                              reg = <3>;
++                                              phy-mode = "internal";
++                                              phy-handle = <&phy11>;
++                                      };
++                              };
++                      };
++
++                      mdio: mdio@405c0 {
++                              compatible = "brcm,unimac-mdio";
++                              reg = <0x405c0 0x8>;
++                              reg-names = "mdio";
++                              #size-cells = <1>;
++                              #address-cells = <0>;
++
++                              phy8: phy@8 {
++                                      reg = <8>;
++                              };
++
++                              phy9: phy@9 {
++                                      reg = <9>;
++                              };
++
++                              phy10: phy@a {
++                                      reg = <10>;
++                              };
++
++                              phy11: phy@b {
++                                      reg = <11>;
++                              };
++
++                              phy12: phy@c {
++                                      reg = <12>;
++                              };
++                      };
++              };
+       };
+       bus@ff800000 {
diff --git a/target/linux/bcm4908/patches-5.4/131-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch b/target/linux/bcm4908/patches-5.4/131-arm64-dts-broadcom-bcm4908-describe-PMB-block.patch
new file mode 100644 (file)
index 0000000..5b0ae7a
--- /dev/null
@@ -0,0 +1,53 @@
+From 11a7fb140af5cfa706a8d9c0a309247f020a8d0c Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Mon, 11 Jan 2021 08:15:35 +0100
+Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe PMB block
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+PMB (Power Management Bus) controls powering connected devices (e.g.
+PCIe, USB, SATA). In BCM4908 it's a part of the PROCMON block.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+Florian: this patch is based on top of the
+[PATCH] arm64: dts: broadcom: bcm4908: describe internal switch
+one. Both modify "ranges".
+---
+ .../boot/dts/broadcom/bcm4908/bcm4908.dtsi      | 17 ++++++++++++++++-
+ 1 file changed, 16 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+@@ -108,7 +108,7 @@
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+-              ranges = <0x00 0x00 0x80000000 0xd0000>;
++              ranges = <0x00 0x00 0x80000000 0x281000>;
+               usb@c300 {
+                       compatible = "generic-ehci";
+@@ -213,6 +213,21 @@
+                               };
+                       };
+               };
++
++              procmon: syscon@280000 {
++                      compatible = "simple-mfd";
++                      reg = <0x280000 0x1000>;
++                      ranges;
++
++                      #address-cells = <1>;
++                      #size-cells = <1>;
++
++                      power-controller@2800c0 {
++                              compatible = "brcm,bcm4908-pmb";
++                              reg = <0x2800c0 0x40>;
++                              #power-domain-cells = <1>;
++                      };
++              };
+       };
+       bus@ff800000 {