drm/i915/icl: Program T_INIT_MASTER registers
authorMadhav Chauhan <madhav.chauhan@intel.com>
Sun, 16 Sep 2018 10:53:27 +0000 (16:23 +0530)
committerJani Nikula <jani.nikula@intel.com>
Mon, 24 Sep 2018 14:20:24 +0000 (17:20 +0300)
This patch programs the time (in escape clocks) to drive
the link in the initialization (i.e. LP-11) state.

v2: Rebase
v3: Remove step hard coding comments (Jani N)

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1537095223-5184-5-git-send-email-madhav.chauhan@intel.com
drivers/gpu/drm/i915/icl_dsi.c

index 190316c4c4c212bddce5ae30e04e0686ac06e981..ff5b285ca495957ed445483e398bca4385eba6d7 100644 (file)
@@ -277,6 +277,22 @@ static void gen11_dsi_enable_ddi_buffer(struct intel_encoder *encoder)
        }
 }
 
+static void gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder)
+{
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+       u32 tmp;
+       enum port port;
+
+       /* Program T-INIT master registers */
+       for_each_dsi_port(port, intel_dsi->ports) {
+               tmp = I915_READ(ICL_DSI_T_INIT_MASTER(port));
+               tmp &= ~MASTER_INIT_TIMER_MASK;
+               tmp |= intel_dsi->init_count;
+               I915_WRITE(ICL_DSI_T_INIT_MASTER(port), tmp);
+       }
+}
+
 static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder)
 {
        /* step 4a: power up all lanes of the DDI used by DSI */
@@ -290,6 +306,9 @@ static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder)
 
        /* enable DDI buffer */
        gen11_dsi_enable_ddi_buffer(encoder);
+
+       /* setup D-PHY timings */
+       gen11_dsi_setup_dphy_timings(encoder);
 }
 
 static void __attribute__((unused))