--- /dev/null
+--- a/ath/if_ath.c
++++ b/ath/if_ath.c
+@@ -5476,6 +5476,9 @@
+ ath_beacon_dturbo_config(vap, intval &
+ ~(HAL_BEACON_RESET_TSF | HAL_BEACON_ENA));
+ #endif
++ if ((nexttbtt & HAL_BEACON_PERIOD) - (ath_hal_gettsf32(ah) >> 10)
++ <= ath_hal_sw_beacon_response_time)
++ nexttbtt += intval;
+ sc->sc_nexttbtt = nexttbtt;
+ ath_hal_beaconinit(ah, nexttbtt, intval);
+ if (intval & HAL_BEACON_RESET_TSF) {
+--- a/ath_hal/ah_os.c
++++ b/ath_hal/ah_os.c
+@@ -71,6 +71,7 @@
+ int ath_hal_dma_beacon_response_time = 2; /* in TUs */
+ int ath_hal_sw_beacon_response_time = 10; /* in TUs */
+ int ath_hal_additional_swba_backoff = 0; /* in TUs */
++EXPORT_SYMBOL(ath_hal_sw_beacon_response_time);
+
+ struct ath_hal *
+ _ath_hal_attach(u_int16_t devid, HAL_SOFTC sc,
--- /dev/null
+--- a/ath/if_ath.c
++++ b/ath/if_ath.c
+@@ -2785,6 +2785,44 @@
+ return 1;
+ }
+
++/* Fix up the ATIM window after TSF resync */
++static int
++ath_hw_check_atim(struct ath_softc *sc, int window)
++{
++#define AR5K_TIMER0_5210 0x802c /* Next beacon time register */
++#define AR5K_TIMER0_5211 0x8028
++#define AR5K_TIMER3_5210 0x8038 /* End of ATIM window time register */
++#define AR5K_TIMER3_5211 0x8034
++ struct ath_hal *ah = sc->sc_ah;
++ unsigned int nbtt, atim;
++ int dev = ar_device(sc->devid);
++
++ switch(dev) {
++ case 5210:
++ nbtt = OS_REG_READ(ah, AR5K_TIMER0_5210);
++ atim = OS_REG_READ(ah, AR5K_TIMER3_5210);
++ if (atim - nbtt != window) {
++ OS_REG_WRITE(ah, AR5K_TIMER3_5210, nbtt + window );
++ return atim - nbtt;
++ }
++ break;
++ case 5211:
++ case 5212:
++ nbtt = OS_REG_READ(ah, AR5K_TIMER0_5211);
++ atim = OS_REG_READ(ah, AR5K_TIMER3_5211);
++ if (atim - nbtt != window) {
++ OS_REG_WRITE(ah, AR5K_TIMER3_5211, nbtt + window );
++ return atim - nbtt;
++ }
++ break;
++ /* NB: 5416+ doesn't do ATIM in hw */
++ default:
++ break;
++ }
++ return 0;
++}
++
++
+ /*
+ * Reset the hardware w/o losing operational state. This is
+ * basically a more efficient way of doing ath_stop, ath_init,
+@@ -6391,6 +6429,11 @@
+ DPRINTF(sc, ATH_DEBUG_BEACON,
+ "Updated beacon timers\n");
+ }
++ if ((sc->sc_opmode == IEEE80211_M_IBSS) &&
++ IEEE80211_ADDR_EQ(ni->ni_bssid, vap->iv_bss->ni_bssid) &&
++ ath_hw_check_atim(sc, 1)) {
++ DPRINTF(sc, ATH_DEBUG_ANY, "Fixed ATIM window after beacon recv\n");
++ }
+ /* NB: Fall Through */
+ case IEEE80211_FC0_SUBTYPE_PROBE_RESP:
+ if (vap->iv_opmode == IEEE80211_M_IBSS &&
--- /dev/null
+--- a/ath/if_ath.c
++++ b/ath/if_ath.c
+@@ -5495,6 +5495,8 @@
+ ath_hal_intrset(ah, sc->sc_imask);
+ ath_set_beacon_cal(sc, 0);
+ } else {
++ unsigned long flags;
++
+ ath_hal_intrset(ah, 0);
+ if (reset_tsf)
+ intval |= HAL_BEACON_RESET_TSF;
+@@ -5514,11 +5516,14 @@
+ ath_beacon_dturbo_config(vap, intval &
+ ~(HAL_BEACON_RESET_TSF | HAL_BEACON_ENA));
+ #endif
++ local_irq_save(flags);
+ if ((nexttbtt & HAL_BEACON_PERIOD) - (ath_hal_gettsf32(ah) >> 10)
+ <= ath_hal_sw_beacon_response_time)
+ nexttbtt += intval;
+ sc->sc_nexttbtt = nexttbtt;
+ ath_hal_beaconinit(ah, nexttbtt, intval);
++ local_irq_restore(flags);
++
+ if (intval & HAL_BEACON_RESET_TSF) {
+ sc->sc_last_tsf = 0;
+ }
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
-@@ -6325,7 +6325,7 @@
+@@ -6371,7 +6371,7 @@
/* Never copy the SKB, as it is ours on the RX side, and this is the
* last process on the TX side and we only modify our own headers. */
if (tskb == NULL) {
DPRINTF(sc, ATH_DEBUG_ANY,
"Dropping; ath_skb_removepad failed!\n");
-@@ -6333,6 +6333,8 @@
+@@ -6379,6 +6379,8 @@
}
ieee80211_input_monitor(ic, tskb, bf, tx, tsf, sc);
Please let us know if you think your name should be mentioned here!
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
-@@ -2964,7 +2964,7 @@
+@@ -3002,7 +3002,7 @@
struct ath_softc *sc = dev->priv;
struct ath_hal *ah = sc->sc_ah;
struct ieee80211_phy_params *ph = (struct ieee80211_phy_params *)