KVM: MIPS/Emulate: Drop redundant TLB flushes on exceptions

When exceptions are injected into the MIPS KVM guest, the whole host TLB
is flushed (except any entries in the guest KSeg0 range). This is
certainly not mandated by the architecture when exceptions are taken
(userland can't directly change TLB mappings anyway), and is a pretty
heavyweight operation:

 - There may be hundreds of TLB entries especially when a 512 entry FTLB
   is present. These are walked and read and conditionally invalidated,
   so the TLBINV feature can't be used either.

 - It'll indiscriminately wipe out entries belonging to other memory
   spaces. A simple ASID regeneration would be much faster to perform,
   although it'd wipe out the guest KSeg0 mappings too.

My suspicion is that this was simply to plaster over the fact that
kvm_mips_host_tlb_inv() incorrectly only invalidated TLB entries in the
ASID for guest usermode, and not the ASID for guest kernelmode.

Now that the recent commit "KVM: MIPS/TLB: Flush host TLB entry in
kernel ASID" fixes kvm_mips_host_tlb_inv() to flush TLB entries in the
kernelmode ASID when the guest TLB changes, lets drop these calls and
the otherwise unused kvm_mips_flush_host_tlb().

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org

diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index 1a83b6f85de2823111eeb4b43c173c6442e7c75a..174857f146b16b61d8af5fbe9c903e72c3770f87 100644 (file)
--- a/arch/mips/include/asm/kvm_host.h
+++ b/arch/mips/include/asm/kvm_host.h
@@ -608,7 +608,6 @@ extern enum emulation_result kvm_mips_handle_tlbmod(u32 cause,
 
 extern void kvm_mips_dump_host_tlbs(void);
 extern void kvm_mips_dump_guest_tlbs(struct kvm_vcpu *vcpu);
-extern void kvm_mips_flush_host_tlb(int skip_kseg0);
 extern int kvm_mips_host_tlb_inv(struct kvm_vcpu *vcpu, unsigned long entryhi,
                                 bool user, bool kernel);
 

diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c
index 9ac8e45017ced90410acd384bcc94f0ee353f60d..cd11d787d9dc512df00993415df125ab9874f493 100644 (file)
--- a/arch/mips/kvm/emulate.c
+++ b/arch/mips/kvm/emulate.c
@@ -1968,8 +1968,6 @@ enum emulation_result kvm_mips_emulate_tlbmiss_ld(u32 cause,
        kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr);
        /* XXXKYMA: is the context register used by linux??? */
        kvm_write_c0_guest_entryhi(cop0, entryhi);
-       /* Blow away the shadow host TLBs */
-       kvm_mips_flush_host_tlb(1);
 
        return EMULATE_DONE;
 }
@@ -2014,8 +2012,6 @@ enum emulation_result kvm_mips_emulate_tlbinv_ld(u32 cause,
        kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr);
        /* XXXKYMA: is the context register used by linux??? */
        kvm_write_c0_guest_entryhi(cop0, entryhi);
-       /* Blow away the shadow host TLBs */
-       kvm_mips_flush_host_tlb(1);
 
        return EMULATE_DONE;
 }
@@ -2058,8 +2054,6 @@ enum emulation_result kvm_mips_emulate_tlbmiss_st(u32 cause,
        kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr);
        /* XXXKYMA: is the context register used by linux??? */
        kvm_write_c0_guest_entryhi(cop0, entryhi);
-       /* Blow away the shadow host TLBs */
-       kvm_mips_flush_host_tlb(1);
 
        return EMULATE_DONE;
 }
@@ -2102,8 +2096,6 @@ enum emulation_result kvm_mips_emulate_tlbinv_st(u32 cause,
        kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr);
        /* XXXKYMA: is the context register used by linux??? */
        kvm_write_c0_guest_entryhi(cop0, entryhi);
-       /* Blow away the shadow host TLBs */
-       kvm_mips_flush_host_tlb(1);
 
        return EMULATE_DONE;
 }
@@ -2176,8 +2168,6 @@ enum emulation_result kvm_mips_emulate_tlbmod(u32 cause,
        kvm_write_c0_guest_badvaddr(cop0, vcpu->arch.host_cp0_badvaddr);
        /* XXXKYMA: is the context register used by linux??? */
        kvm_write_c0_guest_entryhi(cop0, entryhi);
-       /* Blow away the shadow host TLBs */
-       kvm_mips_flush_host_tlb(1);
 
        return EMULATE_DONE;
 }

diff --git a/arch/mips/kvm/tlb.c b/arch/mips/kvm/tlb.c
index 51f4aee717e7a606f690d42f7cbb3be88ec6a5ba..cee2e9feb942eb405437fa35cfd14fb9de94d296 100644 (file)
--- a/arch/mips/kvm/tlb.c
+++ b/arch/mips/kvm/tlb.c
@@ -214,55 +214,6 @@ int kvm_mips_host_tlb_inv(struct kvm_vcpu *vcpu, unsigned long va,
 }
 EXPORT_SYMBOL_GPL(kvm_mips_host_tlb_inv);
 
-void kvm_mips_flush_host_tlb(int skip_kseg0)
-{
-       unsigned long flags;
-       unsigned long old_entryhi, entryhi;
-       unsigned long old_pagemask;
-       int entry = 0;
-       int maxentry = current_cpu_data.tlbsize;
-
-       local_irq_save(flags);
-
-       old_entryhi = read_c0_entryhi();
-       old_pagemask = read_c0_pagemask();
-
-       /* Blast 'em all away. */
-       for (entry = 0; entry < maxentry; entry++) {
-               write_c0_index(entry);
-
-               if (skip_kseg0) {
-                       mtc0_tlbr_hazard();
-                       tlb_read();
-                       tlb_read_hazard();
-
-                       entryhi = read_c0_entryhi();
-
-                       /* Don't blow away guest kernel entries */
-                       if (KVM_GUEST_KSEGX(entryhi) == KVM_GUEST_KSEG0)
-                               continue;
-
-                       write_c0_pagemask(old_pagemask);
-               }
-
-               /* Make sure all entries differ. */
-               write_c0_entryhi(UNIQUE_ENTRYHI(entry));
-               write_c0_entrylo0(0);
-               write_c0_entrylo1(0);
-               mtc0_tlbw_hazard();
-
-               tlb_write_indexed();
-               tlbw_use_hazard();
-       }
-
-       write_c0_entryhi(old_entryhi);
-       write_c0_pagemask(old_pagemask);
-       mtc0_tlbw_hazard();
-
-       local_irq_restore(flags);
-}
-EXPORT_SYMBOL_GPL(kvm_mips_flush_host_tlb);
-
 /**
  * kvm_mips_suspend_mm() - Suspend the active mm.
  * @cpu                The CPU we're running on.