--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+/*
+ * Device Tree file for ipTIME NAS1dual
+ *
+ * Copyright (C) 2020 Sungbo Eo <mans0n@gorani.run>
+ *
+ * Based on armada-385-linksys.dtsi
+ * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "armada-385.dtsi"
+
+/ {
+ model = "ipTIME NAS1dual";
+ compatible = "iptime,nas1dual", "marvell,armada385", "marvell,armada380";
+
+ aliases {
+ led-boot = &led_ready;
+ led-failsafe = &led_ready;
+ led-running = &led_ready;
+ led-upgrade = &led_ready;
+ label-mac-device = ð0;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000>; /* 2GB */
+ };
+
+ soc {
+ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
+ MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
+ MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
+ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_keys_pins>;
+
+ power {
+ label = "Power Button";
+ linux,input-type = <EV_SW>;
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+ };
+
+ reset {
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+ };
+
+ copy {
+ label = "USB Copy Button";
+ linux,code = <KEY_COPY>;
+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_leds_pins>;
+
+ led_ready: ready {
+ label = "blue:ready";
+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+ };
+
+ hdd {
+ label = "blue:hdd";
+ gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "disk-activity";
+ };
+
+ usb {
+ label = "blue:usb";
+ gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
+ trigger-sources = <&usb3_0_port1 &usb3_0_port2>;
+ linux,default-trigger = "usbport";
+ };
+ };
+
+ gpio-fan {
+ compatible = "gpio-fan";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_fan_pins>;
+ gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>,
+ <&gpio1 18 GPIO_ACTIVE_HIGH>;
+ /* We don't know the exact rpm, just use dummy values here. */
+ gpio-fan,speed-map = <0 0>, <1 1>, <2 2>;
+ #cooling-cells = <2>;
+ };
+
+ gpio-poweroff {
+ compatible = "gpio-poweroff";
+ gpios = <&pca9536 1 GPIO_ACTIVE_LOW>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sata_power_pins>;
+
+ reg_sata_power: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "sata-power";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ gpio = <&gpio1 20 GPIO_ACTIVE_LOW>;
+ regulator-always-on;
+ };
+ };
+};
+
+&ahci0 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata-port@0 {
+ reg = <0>;
+ target-supply = <®_sata_power>;
+ #thermal-sensor-cells = <0>;
+ };
+};
+
+&bm {
+ status = "okay";
+};
+
+&bm_bppi {
+ status = "okay";
+};
+
+ð0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ge0_rgmii_pins>;
+ status = "okay";
+ phy-handle = <ðphy1>;
+ phy-connection-type = "rgmii-id";
+ buffer-manager = <&bm>;
+ bm,pool-long = <0>;
+ bm,pool-short = <1>;
+ nvmem-cells = <&macaddr_uboot_fffa8>;
+ nvmem-cell-names = "mac-address";
+};
+
+ð1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ge1_rgmii_pins>;
+ status = "okay";
+ phy-handle = <ðphy0>;
+ phy-connection-type = "rgmii-id";
+ buffer-manager = <&bm>;
+ bm,pool-long = <2>;
+ bm,pool-short = <3>;
+ nvmem-cells = <&macaddr_uboot_fffa8>;
+ nvmem-cell-names = "mac-address";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+
+ pca9536: gpio@41 {
+ compatible = "nxp,pca9536";
+ reg = <0x41>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "power-led", "power-board";
+ };
+};
+
+&mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ /* LED1: On - Link, Blink - Activity, Off - No Link */
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ marvell,reg-init = <3 16 0 0x1017>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ marvell,reg-init = <3 16 0 0x1017>;
+ };
+};
+
+&pinctrl {
+ gpio_keys_pins: gpio-keys-pins {
+ marvell,pins = "mpp24", "mpp26", "mpp48";
+ marvell,function = "gpio";
+ };
+
+ gpio_leds_pins: gpio-leds-pins {
+ marvell,pins = "mpp18", "mpp20", "mpp51";
+ marvell,function = "gpio";
+ };
+
+ gpio_fan_pins: gpio-fan-pins {
+ marvell,pins = "mpp25", "mpp50";
+ marvell,function = "gpio";
+ };
+
+ sata_power_pins: sata-power-pins {
+ marvell,pins = "mpp52";
+ marvell,function = "gpio";
+ };
+
+ uart1_pins_alt: uart-pins-1-alt {
+ marvell,pins = "mpp45", "mpp46";
+ marvell,function = "ua1";
+ };
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ reg = <0x00000000 0x00100000>;
+ label = "u-boot";
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_uboot_fffa8: macaddr@fffa8 {
+ reg = <0xfffa8 0x6>;
+ };
+ };
+
+ partition@100000 {
+ reg = <0x00100000 0x03ec0000>;
+ label = "firmware";
+
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ reg = <0x00000000 0x00600000>;
+ label = "kernel";
+ };
+
+ partition@600000 {
+ reg = <0x00600000 0x038c0000>;
+ label = "rootfs";
+ };
+ };
+
+ partition@3fc0000 {
+ reg = <0x03fc0000 0x00040000>;
+ label = "config";
+ read-only;
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins_alt>;
+ status = "okay";
+};
+
+&usb3_0 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb3_0_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ usb3_0_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
+};