ASoC: SOF: Intel: initial support to JasperLake.
authorPan Xiuli <xiuli.pan@linux.intel.com>
Tue, 22 Oct 2019 19:47:05 +0000 (14:47 -0500)
committerMark Brown <broonie@kernel.org>
Wed, 23 Oct 2019 16:46:31 +0000 (17:46 +0100)
Add Kconfig, PCI ID and chip info for JSL platform.
The DSP only has 2 cores for this platform.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191022194705.23347-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/Kconfig
sound/soc/sof/intel/cnl.c
sound/soc/sof/intel/hda.h
sound/soc/sof/sof-pci-dev.c

index d62f51d33be148531916c887e6aa046328f5c2dc..342f22a7c64f93422f4bd20ac1cb3fe766b6bfc3 100644 (file)
@@ -29,6 +29,7 @@ config SND_SOC_SOF_INTEL_PCI
        select SND_SOC_SOF_COMETLAKE_H if SND_SOC_SOF_COMETLAKE_H_SUPPORT
        select SND_SOC_SOF_TIGERLAKE   if SND_SOC_SOF_TIGERLAKE_SUPPORT
        select SND_SOC_SOF_ELKHARTLAKE if SND_SOC_SOF_ELKHARTLAKE_SUPPORT
+       select SND_SOC_SOF_JASPERLAKE  if SND_SOC_SOF_JASPERLAKE_SUPPORT
        help
          This option is not user-selectable but automagically handled by
          'select' statements at a higher level
@@ -244,6 +245,21 @@ config SND_SOC_SOF_ELKHARTLAKE
           This option is not user-selectable but automagically handled by
          'select' statements at a higher level
 
+config SND_SOC_SOF_JASPERLAKE_SUPPORT
+       bool "SOF support for JasperLake"
+       help
+          This adds support for Sound Open Firmware for Intel(R) platforms
+          using the JasperLake processors.
+          Say Y if you have such a device.
+          If unsure select "N".
+
+config SND_SOC_SOF_JASPERLAKE
+       tristate
+       select SND_SOC_SOF_HDA_COMMON
+       help
+          This option is not user-selectable but automagically handled by
+         'select' statements at a higher level
+
 config SND_SOC_SOF_HDA_COMMON
        tristate
        select SND_SOC_SOF_INTEL_COMMON
index 4ddd73762d813af134ee67ab5e553d6209043cd5..5b97bdfba8231ca7dfbf7ab4a22fa4460c0759bf 100644 (file)
@@ -327,3 +327,20 @@ const struct sof_intel_dsp_desc ehl_chip_info = {
        .ssp_base_offset = CNL_SSP_BASE_OFFSET,
 };
 EXPORT_SYMBOL(ehl_chip_info);
+
+const struct sof_intel_dsp_desc jsl_chip_info = {
+       /* Jasperlake */
+       .cores_num = 2,
+       .init_core_mask = 1,
+       .cores_mask = HDA_DSP_CORE_MASK(0) |
+                               HDA_DSP_CORE_MASK(1),
+       .ipc_req = CNL_DSP_REG_HIPCIDR,
+       .ipc_req_mask = CNL_DSP_REG_HIPCIDR_BUSY,
+       .ipc_ack = CNL_DSP_REG_HIPCIDA,
+       .ipc_ack_mask = CNL_DSP_REG_HIPCIDA_DONE,
+       .ipc_ctl = CNL_DSP_REG_HIPCCTL,
+       .rom_init_timeout       = 300,
+       .ssp_count = ICL_SSP_COUNT,
+       .ssp_base_offset = CNL_SSP_BASE_OFFSET,
+};
+EXPORT_SYMBOL(jsl_chip_info);
index 23e430d3e056881853cc193e549ede0334b624da..ea02bf40cb253fd2646bae13e33eed8e97adb026 100644 (file)
@@ -604,5 +604,6 @@ extern const struct sof_intel_dsp_desc skl_chip_info;
 extern const struct sof_intel_dsp_desc icl_chip_info;
 extern const struct sof_intel_dsp_desc tgl_chip_info;
 extern const struct sof_intel_dsp_desc ehl_chip_info;
+extern const struct sof_intel_dsp_desc jsl_chip_info;
 
 #endif
index 030f2cb0692144e8185a1059e61613724808d5a7..4adbb27c76c5d1820f3cc7743191f13ede2997b6 100644 (file)
@@ -245,6 +245,24 @@ static const struct sof_dev_desc ehl_desc = {
 };
 #endif
 
+#if IS_ENABLED(CONFIG_SND_SOC_SOF_JASPERLAKE)
+static const struct sof_dev_desc jsl_desc = {
+       .machines               = snd_soc_acpi_intel_jsl_machines,
+       .resindex_lpe_base      = 0,
+       .resindex_pcicfg_base   = -1,
+       .resindex_imr_base      = -1,
+       .irqindex_host_ipc      = -1,
+       .resindex_dma_base      = -1,
+       .chip_info = &jsl_chip_info,
+       .default_fw_path = "intel/sof",
+       .default_tplg_path = "intel/sof-tplg",
+       .nocodec_fw_filename = "sof-jsl.ri",
+       .nocodec_tplg_filename = "sof-jsl-nocodec.tplg",
+       .ops = &sof_cnl_ops,
+       .arch_ops = &sof_xtensa_arch_ops
+};
+#endif
+
 static const struct dev_pm_ops sof_pci_pm = {
        SET_SYSTEM_SLEEP_PM_OPS(snd_sof_suspend, snd_sof_resume)
        SET_RUNTIME_PM_OPS(snd_sof_runtime_suspend, snd_sof_runtime_resume,
@@ -423,6 +441,10 @@ static const struct pci_device_id sof_pci_ids[] = {
        { PCI_DEVICE(0x8086, 0x34C8),
                .driver_data = (unsigned long)&icl_desc},
 #endif
+#if IS_ENABLED(CONFIG_SND_SOC_SOF_JASPERLAKE)
+       { PCI_DEVICE(0x8086, 0x38c8),
+               .driver_data = (unsigned long)&jsl_desc},
+#endif
 #if IS_ENABLED(CONFIG_SND_SOC_SOF_COMETLAKE_LP)
        { PCI_DEVICE(0x8086, 0x02c8),
                .driver_data = (unsigned long)&cml_desc},