--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -220,6 +220,9 @@
+@@ -220,6 +220,9 @@ config ARCH_EP93XX
help
This enables support for the Cirrus EP93xx series of CPUs.
config ARCH_FOOTBRIDGE
bool "FootBridge"
select FOOTBRIDGE
-@@ -414,6 +417,8 @@
+@@ -414,6 +417,8 @@ source "arch/arm/mach-ep93xx/Kconfig"
source "arch/arm/mach-footbridge/Kconfig"
source "arch/arm/mach-integrator/Kconfig"
source "arch/arm/mach-iop32x/Kconfig"
-@@ -549,6 +554,16 @@
+@@ -549,6 +554,16 @@ config PCI
config PCI_SYSCALL
def_bool PCI
# Select the host bridge type
config PCI_HOST_VIA82C505
bool
-@@ -988,6 +1003,10 @@
+@@ -988,6 +1003,10 @@ if ALIGNMENT_TRAP || !CPU_CP15_MMU
source "drivers/mtd/Kconfig"
endif
source "drivers/parport/Kconfig"
source "drivers/pnp/Kconfig"
-@@ -997,7 +1016,7 @@
+@@ -997,7 +1016,7 @@ source "drivers/block/Kconfig"
if PCMCIA || ARCH_CLPS7500 || ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX \
|| ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \
|| ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
-@@ -72,6 +72,7 @@
+@@ -72,6 +72,7 @@ tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9
tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM925T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM926T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110
tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100
tune-$(CONFIG_CPU_XSCALE) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
-@@ -111,6 +112,7 @@
+@@ -111,6 +112,7 @@ endif
machine-$(CONFIG_ARCH_PXA) := pxa
machine-$(CONFIG_ARCH_L7200) := l7200
machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
machine-$(CONFIG_ARCH_IOP32X) := iop32x
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
-@@ -19,6 +19,10 @@
+@@ -19,6 +19,10 @@ ifeq ($(CONFIG_ARCH_SHARK),y)
OBJS += head-shark.o ofw-shark.o
endif
#else
.macro loadsp, rb
addruart \rb
-@@ -116,7 +127,28 @@
+@@ -116,7 +127,28 @@ start:
.rept 8
mov r0, r0
.endr
b 1f
.word 0x016f2818 @ Magic numbers to help the loader
.word start @ absolute load/run zImage address
-@@ -458,6 +490,39 @@
+@@ -458,6 +490,39 @@ __armv7_mmu_cache_on:
mcr p15, 0, r0, c7, c5, 4 @ ISB
mov pc, r12
__arm6_mmu_cache_on:
mov r12, lr
bl __setup_mmu
-@@ -625,6 +690,16 @@
+@@ -625,6 +690,16 @@ proc_types:
@ These match on the architecture ID
.word 0x00020000 @ ARMv4T
.word 0x000f0000
b __armv4_mmu_cache_on
-@@ -712,6 +787,23 @@
+@@ -712,6 +787,23 @@ __armv7_mmu_cache_off:
mcr p15, 0, r0, c8, c7, 0 @ invalidate whole TLB
mov pc, r12
__arm6_mmu_cache_off:
mov r0, #0x00000030 @ ARM6 control reg.
b __armv3_mmu_cache_off
-@@ -759,6 +851,17 @@
+@@ -759,6 +851,17 @@ __armv4_mpu_cache_flush:
mcr p15, 0, ip, c7, c10, 4 @ drain WB
mov pc, lr
+#endif
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
-@@ -30,7 +30,7 @@
+@@ -30,7 +30,7 @@ static void putstr(const char *ptr);
#include <asm/arch/uncompress.h>
#ifdef CONFIG_DEBUG_ICEDCC
#ifdef CONFIG_CPU_V6
static void icedcc_putc(int ch)
-@@ -69,6 +69,7 @@
+@@ -69,6 +69,7 @@ static void icedcc_putc(int ch)
#define flush() do { } while (0)
#endif
static void putstr(const char *ptr)
{
char c;
-@@ -81,11 +82,36 @@
+@@ -81,11 +82,36 @@ static void putstr(const char *ptr)
flush();
}
/*
* Optimised C version of memzero for the ARM.
*/
-@@ -346,6 +372,9 @@
+@@ -346,6 +372,9 @@ ulg
decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p,
int arch_id)
{
output_data = (uch *)output_start; /* Points to kernel start */
free_mem_ptr = free_mem_ptr_p;
free_mem_ptr_end = free_mem_ptr_end_p;
-@@ -353,6 +382,33 @@
+@@ -353,6 +382,33 @@ decompress_kernel(ulg output_start, ulg
arch_decomp_setup();
makecrc();
putstr("Uncompressing Linux...");
gunzip();
-@@ -374,4 +430,119 @@
+@@ -374,4 +430,119 @@ int main()
return 0;
}
#endif
/*
* No architecture-specific irq_finish function defined in arm/arch/irqs.h.
*/
-@@ -111,8 +113,11 @@
+@@ -111,8 +113,11 @@ static struct irq_desc bad_irq_desc = {
asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
{
struct pt_regs *old_regs = set_irq_regs(regs);
* than crashing, do something sensible.
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
-@@ -117,7 +117,7 @@
+@@ -117,7 +117,7 @@ void arm_machine_restart(char mode)
void (*pm_idle)(void);
EXPORT_SYMBOL(pm_idle);
EXPORT_SYMBOL(pm_power_off);
void (*arm_pm_restart)(char str) = arm_machine_restart;
-@@ -188,13 +188,37 @@
+@@ -188,13 +188,37 @@ __setup("reboot=", reboot_setup);
void machine_halt(void)
{
void machine_restart(char * __unused)
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
-@@ -502,8 +502,13 @@
+@@ -502,8 +502,13 @@ static int __init timer_init_sysfs(void)
device_initcall(timer_init_sysfs);
+
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
-@@ -187,6 +187,26 @@
+@@ -187,6 +187,26 @@ config CPU_ARM926T
Say Y if you want support for the ARM926T processor.
Otherwise, say N.
# ARM940T
config CPU_ARM940T
bool "Support ARM940T processor" if ARCH_INTEGRATOR
-@@ -461,6 +481,9 @@
+@@ -461,6 +481,9 @@ config CPU_CACHE_VIVT
config CPU_CACHE_VIPT
bool
if MMU
# The copy-page model
config CPU_COPY_V3
-@@ -475,6 +498,12 @@
+@@ -475,6 +498,12 @@ config CPU_COPY_V4WB
config CPU_COPY_V6
bool
# This selects the TLB model
config CPU_TLB_V3
bool
-@@ -534,6 +563,14 @@
+@@ -534,6 +563,14 @@ config CPU_CP15_MPU
config IO_36
bool
comment "Processor Features"
config ARM_THUMB
-@@ -600,7 +637,7 @@
+@@ -600,7 +637,7 @@ config CPU_DCACHE_SIZE
config CPU_DCACHE_WRITETHROUGH
bool "Force write through D-cache"
Say Y here to use the data cache in writethrough mode. Unless you
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
-@@ -32,6 +32,7 @@
+@@ -32,6 +32,7 @@ obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4
obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o
obj-$(CONFIG_CPU_CACHE_V6) += cache-v6.o
obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o
obj-$(CONFIG_CPU_COPY_V3) += copypage-v3.o
obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o
-@@ -40,6 +41,7 @@
+@@ -40,6 +41,7 @@ obj-$(CONFIG_CPU_COPY_V6) += copypage-v6
obj-$(CONFIG_CPU_SA1100) += copypage-v4mc.o
obj-$(CONFIG_CPU_XSCALE) += copypage-xscale.o
obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o
obj-$(CONFIG_CPU_TLB_V3) += tlb-v3.o
obj-$(CONFIG_CPU_TLB_V4WT) += tlb-v4.o
-@@ -47,6 +49,7 @@
+@@ -47,6 +49,7 @@ obj-$(CONFIG_CPU_TLB_V4WB) += tlb-v4wb.o
obj-$(CONFIG_CPU_TLB_V4WBI) += tlb-v4wbi.o
obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o
obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o
obj-$(CONFIG_CPU_ARM610) += proc-arm6_7.o
obj-$(CONFIG_CPU_ARM710) += proc-arm6_7.o
-@@ -60,6 +63,7 @@
+@@ -60,6 +63,7 @@ obj-$(CONFIG_CPU_ARM925T) += proc-arm925
obj-$(CONFIG_CPU_ARM926T) += proc-arm926.o
obj-$(CONFIG_CPU_ARM940T) += proc-arm940.o
obj-$(CONFIG_CPU_ARM946E) += proc-arm946.o
#include "mm.h"
-@@ -252,6 +253,11 @@
+@@ -252,6 +253,11 @@ bootmem_init_node(int node, int initrd_n
initrd_end = initrd_start + phys_initrd_size;
}
#endif
+ .size fa_tlb_fns, . - fa_tlb_fns
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
-@@ -208,7 +208,8 @@
+@@ -208,7 +208,8 @@ karo ARCH_KARO KARO 190
fester SA1100_FESTER FESTER 191
gpi ARCH_GPI GPI 192
smdk2410 ARCH_SMDK2410 SMDK2410 193
#define v4wbi_tlb_flags (TLB_WB | TLB_DCLEAN | \
TLB_V4_I_FULL | TLB_V4_D_FULL | \
TLB_V4_I_PAGE | TLB_V4_D_PAGE)
-@@ -246,12 +287,14 @@
+@@ -246,12 +287,14 @@ extern struct cpu_tlb_fns cpu_tlb;
v4_possible_flags | \
v4wbi_possible_flags | \
v4wb_possible_flags | \
v6wbi_always_flags)
#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
-@@ -261,6 +304,9 @@
+@@ -261,6 +304,9 @@ static inline void local_flush_tlb_all(v
const int zero = 0;
const unsigned int __tlb_flag = __cpu_tlb_flags;
if (tlb_flag(TLB_WB))
dsb();
-@@ -281,6 +327,13 @@
+@@ -281,6 +327,13 @@ static inline void local_flush_tlb_all(v
dsb();
isb();
}
}
static inline void local_flush_tlb_mm(struct mm_struct *mm)
-@@ -289,6 +342,9 @@
+@@ -289,6 +342,9 @@ static inline void local_flush_tlb_mm(st
const int asid = ASID(mm);
const unsigned int __tlb_flag = __cpu_tlb_flags;
if (tlb_flag(TLB_WB))
dsb();
-@@ -317,6 +373,14 @@
+@@ -317,6 +373,14 @@ static inline void local_flush_tlb_mm(st
asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
dsb();
}
}
static inline void
-@@ -327,6 +391,9 @@
+@@ -327,6 +391,9 @@ local_flush_tlb_page(struct vm_area_stru
uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);
if (tlb_flag(TLB_WB))
dsb();
-@@ -357,6 +424,13 @@
+@@ -357,6 +424,13 @@ local_flush_tlb_page(struct vm_area_stru
asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
dsb();
}
}
static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
-@@ -366,6 +440,9 @@
+@@ -366,6 +440,9 @@ static inline void local_flush_tlb_kerne
kaddr &= PAGE_MASK;
if (tlb_flag(TLB_WB))
dsb();
-@@ -386,6 +463,12 @@
+@@ -386,6 +463,12 @@ static inline void local_flush_tlb_kerne
asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
if (tlb_flag(TLB_V6_I_PAGE))
asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
TLB_V6_I_PAGE | TLB_V6_D_PAGE |
-@@ -412,6 +495,7 @@
+@@ -412,6 +495,7 @@ static inline void local_flush_tlb_kerne
*/
static inline void flush_pmd_entry(pmd_t *pmd)
{
const unsigned int __tlb_flag = __cpu_tlb_flags;
if (tlb_flag(TLB_DCLEAN))
-@@ -419,15 +503,30 @@
+@@ -419,15 +503,30 @@ static inline void flush_pmd_entry(pmd_t
: : "r" (pmd) : "cc");
if (tlb_flag(TLB_WB))
dsb();
#undef tlb_flag
--- a/include/asm-arm/xor.h
+++ b/include/asm-arm/xor.h
-@@ -139,3 +139,18 @@
+@@ -139,3 +139,18 @@ static struct xor_block_template xor_blo
xor_speed(&xor_block_8regs); \
xor_speed(&xor_block_32regs); \
} while (0)
+#endif
--- a/include/linux/apm_bios.h
+++ b/include/linux/apm_bios.h
-@@ -217,4 +217,24 @@
+@@ -217,4 +217,24 @@ extern struct apm_info apm_info;
#define APM_IOC_STANDBY _IO('A', 1)
#define APM_IOC_SUSPEND _IO('A', 2)
#endif /* LINUX_APM_H */
--- a/kernel/time.c
+++ b/kernel/time.c
-@@ -76,6 +76,7 @@
+@@ -76,6 +76,7 @@ asmlinkage long sys_time(time_t __user *
* why not move it into the appropriate arch directory (for those
* architectures that need it).
*/
asmlinkage long sys_stime(time_t __user *tptr)
{
-@@ -87,6 +88,10 @@
+@@ -87,6 +88,10 @@ asmlinkage long sys_stime(time_t __user
tv.tv_nsec = 0;
+#endif // __SL351x_TOE_H
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
-@@ -2131,6 +2131,42 @@
+@@ -2131,6 +2131,42 @@ config ACENIC_OMIT_TIGON_I
The safe and default value for this is N.
depends on PCI
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
-@@ -236,4 +236,8 @@
+@@ -236,4 +236,8 @@ obj-$(CONFIG_NETCONSOLE) += netconsole.o
obj-$(CONFIG_FS_ENET) += fs_enet/
#endif
#define GMAX_TX_INTR_DISABLED 1
#define DO_HW_CHKSUM 1
-@@ -124,12 +126,17 @@
+@@ -124,12 +126,17 @@ static char _debug_prefetch_buf[_DEBUG_P
*************************************************************/
static int gmac_initialized = 0;
TOE_INFO_T toe_private_data;
#undef CONFIG_SL351x_RXTOE
extern NAT_CFG_T nat_cfg;
-@@ -2443,7 +2450,8 @@
+@@ -2443,7 +2450,8 @@ static irqreturn_t toe_gmac_interrupt (i
toe = (TOE_INFO_T *)&toe_private_data;
// handle NAPI
#ifdef CONFIG_SL_NAPI
{
/* disable GMAC interrupt */
//toe_gmac_disable_interrupt(tp->irq);
-@@ -2530,7 +2538,7 @@
+@@ -2530,7 +2538,7 @@ if (storlink_ctl.pauseoff == 1)
{
if (likely(netif_rx_schedule_prep(dev)))
{
// disable GMAC-0 rx interrupt
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
-@@ -2563,7 +2571,7 @@
+@@ -2563,7 +2571,7 @@ if (storlink_ctl.pauseoff == 1)
{
if (likely(netif_rx_schedule_prep(dev)))
{
// disable GMAC-0 rx interrupt
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
-@@ -4217,7 +4225,7 @@
+@@ -4217,7 +4225,7 @@ static int gmac_rx_poll(struct net_devic
GMAC_INFO_T *tp = (GMAC_INFO_T *)dev->priv;
unsigned int status4;
volatile DMA_RWPTR_T fq_rwptr;
//unsigned long rx_old_bytes;
struct net_device_stats *isPtr = (struct net_device_stats *)&tp->ifStatics;
//unsigned long long rx_time;
-@@ -4479,7 +4487,7 @@
+@@ -4479,7 +4487,7 @@ static int gmac_rx_poll(struct net_devic
if (rwptr.bits.rptr == rwptr.bits.wptr)
{
--- a/drivers/net/sl351x_gmac.c
+++ b/drivers/net/sl351x_gmac.c
-@@ -127,6 +127,7 @@
+@@ -127,6 +127,7 @@ static char _debug_prefetch_buf[_DEBUG_P
static int gmac_initialized = 0;
TOE_INFO_T toe_private_data;
static int do_again = 0;
spinlock_t gmac_fq_lock;
unsigned int FLAG_SWITCH;
-@@ -1065,7 +1066,8 @@
+@@ -1065,7 +1066,8 @@ static void toe_init_gmac(struct net_dev
tp->intr3_enabled = 0xffffffff;
tp->intr4_selected = GMAC0_INT_BITS | CLASS_RX_FULL_INT_BITS |
HWFQ_EMPTY_INT_BIT | SWFQ_EMPTY_INT_BIT;
data = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG) & ~tp->intr0_selected;
writel(data, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG);
-@@ -1115,7 +1117,7 @@
+@@ -1115,7 +1117,7 @@ static void toe_init_gmac(struct net_dev
tp->intr3_enabled |= 0xffffffff;
tp->intr4_selected |= CLASS_RX_FULL_INT_BITS |
HWFQ_EMPTY_INT_BIT | SWFQ_EMPTY_INT_BIT;
}
data = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG) | tp->intr0_selected;
writel(data, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG);
-@@ -2408,7 +2410,7 @@
+@@ -2408,7 +2410,7 @@ static inline void toe_gmac_fill_free_q(
// unsigned short max_cnt=TOE_SW_FREEQ_DESC_NUM>>1;
fq_rwptr.bits32 = readl(TOE_GLOBAL_BASE + GLOBAL_SWFQ_RWPTR_REG);
//while ((max_cnt--) && (unsigned short)RWPTR_ADVANCE_ONE(fq_rwptr.bits.wptr,
// TOE_SW_FREEQ_DESC_NUM) != fq_rwptr.bits.rptr) {
while ((unsigned short)RWPTR_ADVANCE_ONE(fq_rwptr.bits.wptr,
-@@ -2428,10 +2430,47 @@
+@@ -2428,10 +2430,47 @@ static inline void toe_gmac_fill_free_q(
SET_WPTR(TOE_GLOBAL_BASE+GLOBAL_SWFQ_RWPTR_REG, fq_rwptr.bits.wptr);
toe_private_data.fq_rx_rwptr.bits32 = fq_rwptr.bits32;
}
/*----------------------------------------------------------------------
* toe_gmac_interrupt
*----------------------------------------------------------------------*/
-@@ -2492,6 +2531,7 @@
+@@ -2492,6 +2531,7 @@ if (1)
writel(status3 & tp->intr3_enabled, TOE_GLOBAL_BASE+GLOBAL_INTERRUPT_STATUS_3_REG);
if (status4)
writel(status4 & tp->intr4_enabled, TOE_GLOBAL_BASE+GLOBAL_INTERRUPT_STATUS_4_REG);
#if 0
/* handle freeq interrupt first */
if (status4 & tp->intr4_enabled) {
-@@ -2536,10 +2576,31 @@
+@@ -2536,10 +2576,31 @@ if (1)
}
if (netif_running(dev) && (status1 & DEFAULT_Q0_INT_BIT) && (tp->intr1_enabled & DEFAULT_Q0_INT_BIT))
{
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
//data32 &= ~DEFAULT_Q0_INT_BIT;
-@@ -2549,7 +2610,8 @@
+@@ -2549,7 +2610,8 @@ if (1)
//tp->total_q_cnt_napi=0;
//rx_time = jiffies;
//rx_old_bytes = isPtr->rx_bytes;
}
}
}
-@@ -2569,9 +2631,31 @@
+@@ -2569,9 +2631,31 @@ if (1)
if (netif_running(dev) && (status1 & DEFAULT_Q1_INT_BIT) && (tp->intr1_enabled & DEFAULT_Q1_INT_BIT))
{
// disable GMAC-0 rx interrupt
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
-@@ -2583,9 +2667,13 @@
+@@ -2583,9 +2667,13 @@ if (1)
//rx_time = jiffies;
//rx_old_bytes = isPtr->rx_bytes;
__netif_rx_schedule(dev);
}
// Interrupt Status 0
-@@ -3306,8 +3394,10 @@
+@@ -3306,8 +3394,10 @@ next_rx:
SET_RPTR(&tp->default_qhdr->word1, rwptr.bits.rptr);
tp->rx_rwptr.bits32 = rwptr.bits32;
}
/*----------------------------------------------------------------------
-@@ -4217,6 +4307,7 @@
+@@ -4217,6 +4307,7 @@ static int gmac_rx_poll(struct net_devic
GMAC_RXDESC_T *curr_desc;
struct sk_buff *skb;
DMA_RWPTR_T rwptr;
unsigned int pkt_size;
unsigned int desc_count;
unsigned int good_frame, chksum_status, rx_status;
-@@ -4231,7 +4322,7 @@
+@@ -4231,7 +4322,7 @@ static int gmac_rx_poll(struct net_devic
//unsigned long long rx_time;
#if 1
if (do_again)
{
-@@ -4516,6 +4607,30 @@
+@@ -4516,6 +4607,30 @@ static int gmac_rx_poll(struct net_devic
#endif
//toe_gmac_fill_free_q();
netif_rx_complete(dev);
#ifndef CONFIG_SL351x_RXTOE
//#define CONFIG_SL351x_RXTOE 1
-@@ -126,7 +130,6 @@
+@@ -126,7 +130,6 @@ static char _debug_prefetch_buf[_DEBUG_P
*************************************************************/
static int gmac_initialized = 0;
TOE_INFO_T toe_private_data;
static int rx_poll_enabled;
spinlock_t gmac_fq_lock;
unsigned int FLAG_SWITCH;
-@@ -190,7 +193,7 @@
+@@ -190,7 +193,7 @@ void mac_get_sw_tx_weight(struct net_dev
void mac_set_sw_tx_weight(struct net_device *dev, char *weight);
void mac_get_hw_tx_weight(struct net_device *dev, char *weight);
void mac_set_hw_tx_weight(struct net_device *dev, char *weight);
#ifdef VITESSE_G5SWITCH
extern int Get_Set_port_status(void);
-@@ -295,12 +298,14 @@
+@@ -295,12 +298,14 @@ static int __init gmac_init_module(void)
for(j = 0; i<CONFIG_MAC_NUM; j++)
{
i=j;
tp = (GMAC_INFO_T *)&toe_private_data.gmac[i];
tp->dev = NULL;
-@@ -459,7 +464,7 @@
+@@ -459,7 +464,7 @@ void mac_init_drv(void)
toe->gmac[1].dma_base_addr = TOE_GMAC1_DMA_BASE;
toe->gmac[0].auto_nego_cfg = 1;
toe->gmac[1].auto_nego_cfg = 1;
toe->gmac[0].speed_cfg = GMAC_SPEED_1000;
toe->gmac[1].speed_cfg = GMAC_SPEED_1000;
#else
-@@ -508,7 +513,7 @@
+@@ -508,7 +513,7 @@ void mac_init_drv(void)
// Write GLOBAL_QUEUE_THRESHOLD_REG
threshold.bits32 = 0;
threshold.bits.swfq_empty = (TOE_SW_FREEQ_DESC_NUM > 256) ? 255 :
threshold.bits.hwfq_empty = (TOE_HW_FREEQ_DESC_NUM > 256) ? 256/4 :
TOE_HW_FREEQ_DESC_NUM/4;
threshold.bits.toe_class = (TOE_TOE_DESC_NUM > 256) ? 256/4 :
-@@ -613,18 +618,25 @@
+@@ -613,18 +618,25 @@ static void toe_init_free_queue(void)
rwptr_reg.bits.rptr = 0;
toe->fq_rx_rwptr.bits32 = rwptr_reg.bits32;
writel(rwptr_reg.bits32, TOE_GLOBAL_BASE + GLOBAL_SWFQ_RWPTR_REG);
// toe->rx_skb[i] = skb;
sw_desc_ptr->word2.buf_adr = (unsigned int)__pa(skb->data);
// consistent_sync((unsigned int)desc_ptr, sizeof(GMAC_RXDESC_T), PCI_DMA_TODEVICE);
-@@ -851,14 +863,14 @@
+@@ -851,14 +863,14 @@ static void toe_init_hwtx_queue(void)
*----------------------------------------------------------------------*/
static void toe_init_default_queue(void)
{
if (!desc_ptr)
{
printk("%s::DMA_MALLOC fail !\n",__func__);
-@@ -866,14 +878,17 @@
+@@ -866,14 +878,17 @@ static void toe_init_default_queue(void)
}
memset((void *)desc_ptr, 0, TOE_DEFAULT_Q0_DESC_NUM * sizeof(GMAC_RXDESC_T));
toe->gmac[0].default_desc_base = (unsigned int)desc_ptr;
if (!desc_ptr)
{
printk("%s::DMA_MALLOC fail !\n",__func__);
-@@ -1071,12 +1086,16 @@
+@@ -1071,12 +1086,16 @@ static void toe_init_gmac(struct net_dev
data = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG) & ~tp->intr0_selected;
writel(data, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG);
data = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG) & ~tp->intr4_selected;
writel(data, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
}
-@@ -1176,11 +1195,11 @@
+@@ -1176,11 +1195,11 @@ static int toe_gmac_init_chip(struct net
GMAC_CONFIG2_T config2_val;
GMAC_CONFIG0_T config0,config0_mask;
GMAC_CONFIG1_T config1;
// GMAC_HASH_ENABLE_REG0_T hash_ctrl;
//
#if 0 /* mac address will be set in late_initcall */
-@@ -1202,24 +1221,23 @@
+@@ -1202,24 +1221,23 @@ static int toe_gmac_init_chip(struct net
// config1.bits32 = 0x002004; //next version
/* set flow control threshold */
config1.bits32 = 0;
// gmac_write_reg(tp->base_addr,GMAC_MCAST_FIL0,0x0,0xffffffff);
// gmac_write_reg(tp->base_addr,GMAC_MCAST_FIL1,0x0,0xffffffff);
-@@ -1249,7 +1267,7 @@
+@@ -1249,7 +1267,7 @@ static int toe_gmac_init_chip(struct net
config0.bits.dis_rx = 1; /* disable rx */
config0.bits.dis_tx = 1; /* disable tx */
config0.bits.loop_back = 0; /* enable/disable GMAC loopback */
config0.bits.rgmii_en = 0;
config0.bits.rgmm_edge = 1;
config0.bits.rxc_inv = 0;
-@@ -1342,6 +1360,9 @@
+@@ -1342,6 +1360,9 @@ static int toe_gmac_init_chip(struct net
gmac_write_reg(tp->dma_base_addr, GMAC_AHB_WEIGHT_REG, ahb_weight.bits32, ahb_weight_mask.bits32);
#endif
#if defined(CONFIG_SL351x_NAT) || defined(CONFIG_SL351x_RXTOE)
gmac_write_reg(tp->dma_base_addr, GMAC_SPR0, IPPROTO_TCP, 0xffffffff);
#endif
-@@ -1552,7 +1573,7 @@
+@@ -1552,7 +1573,7 @@ static void toe_gmac_tx_complete(GMAC_I
rwptr.bits32 = readl(swtxq->rwptr_reg);
if (rwptr.bits.rptr == swtxq->finished_idx)
break;
// consistent_sync((void *)curr_desc, sizeof(GMAC_TXDESC_T), PCI_DMA_FROMDEVICE);
word0.bits32 = curr_desc->word0.bits32;
word1.bits32 = curr_desc->word1.bits32;
-@@ -1573,6 +1594,7 @@
+@@ -1573,6 +1594,7 @@ static void toe_gmac_tx_complete(GMAC_I
swtxq->finished_idx = RWPTR_ADVANCE_ONE(swtxq->finished_idx, swtxq->total_desc_num);
curr_desc = (GMAC_TXDESC_T *)swtxq->desc_base + swtxq->finished_idx;
word0.bits32 = curr_desc->word0.bits32;
#ifdef _DUMP_TX_TCP_CONTENT
if (curr_desc->word0.bits.buffer_size < 16)
{
-@@ -1592,12 +1614,12 @@
+@@ -1592,12 +1614,12 @@ static void toe_gmac_tx_complete(GMAC_I
word0.bits.status_tx_ok = 0;
if (swtxq->tx_skb[swtxq->finished_idx])
{
curr_desc->word0.bits32 = word0.bits32;
swtxq->curr_finished_desc = (GMAC_TXDESC_T *)curr_desc;
swtxq->total_finished++;
-@@ -1624,31 +1646,29 @@
+@@ -1624,31 +1646,29 @@ static void toe_gmac_tx_complete(GMAC_I
*----------------------------------------------------------------------*/
static int gmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
total_pages = snd_pages;
#endif
-@@ -1664,13 +1684,6 @@
+@@ -1664,13 +1684,6 @@ static int gmac_start_xmit(struct sk_buf
}
#endif
#ifdef GMAC_USE_TXQ0
#define tx_qid 0
#endif
-@@ -1703,9 +1716,9 @@
+@@ -1703,9 +1716,9 @@ static int gmac_start_xmit(struct sk_buf
toe_gmac_tx_complete(tp, tx_qid, dev, 0);
if (wptr >= swtxq->finished_idx)
if (free_desc < snd_pages)
{
// spin_unlock(&tp->tx_mutex);
-@@ -2063,9 +2076,10 @@
+@@ -2063,9 +2076,10 @@ void mac_start_txdma(struct net_device *
struct net_device_stats * gmac_get_stats(struct net_device *dev)
{
GMAC_INFO_T *tp = (GMAC_INFO_T *)dev->priv;
if (netif_running(dev))
{
-@@ -2073,10 +2087,14 @@
+@@ -2073,10 +2087,14 @@ struct net_device_stats * gmac_get_stats
// spin_lock_irqsave(&tp->lock,flags);
pkt_drop = gmac_read_reg(tp->base_addr,GMAC_IN_DISCARDS);
pkt_error = gmac_read_reg(tp->base_addr,GMAC_IN_ERRORS);
return &tp->ifStatics;
}
-@@ -2401,36 +2419,63 @@
+@@ -2401,36 +2419,63 @@ static int gmac_close(struct net_device
* toe_gmac_fill_free_q
* allocate buffers for free queue.
*----------------------------------------------------------------------*/
}
// EXPORT_SYMBOL(toe_gmac_fill_free_q);
-@@ -2442,14 +2487,14 @@
+@@ -2442,14 +2487,14 @@ static void gmac_registers(const char *m
unsigned int status3;
unsigned int status4;
printk("status: s0:%08X, s1:%08X, s2:%08X, s3:%08X, s4:%08X\n",
status0, status1, status2, status3, status4);
-@@ -2468,8 +2513,9 @@
+@@ -2468,8 +2513,9 @@ static void gmac_registers(const char *m
status3 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_3_REG);
status4 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
}
/*----------------------------------------------------------------------
* toe_gmac_interrupt
-@@ -2485,75 +2531,44 @@
+@@ -2485,75 +2531,44 @@ static irqreturn_t toe_gmac_interrupt (i
unsigned int status3;
unsigned int status4;
{
#define G1_INTR0_BITS (GMAC1_HWTQ13_EOF_INT_BIT | GMAC1_HWTQ12_EOF_INT_BIT | GMAC1_HWTQ11_EOF_INT_BIT | GMAC1_HWTQ10_EOF_INT_BIT)
#define G0_INTR0_BITS (GMAC0_HWTQ03_EOF_INT_BIT | GMAC0_HWTQ02_EOF_INT_BIT | GMAC0_HWTQ01_EOF_INT_BIT | GMAC0_HWTQ00_EOF_INT_BIT)
-@@ -2563,7 +2578,7 @@
+@@ -2563,7 +2578,7 @@ if (1)
// because they should pass packets to upper layer
if (tp->port_id == 0)
{
{
if (status1 & GMAC0_HWTQ03_EOF_INT_BIT)
tp->hwtxq[3].eof_cnt++;
-@@ -2574,50 +2589,51 @@
+@@ -2574,50 +2589,51 @@ if (1)
if (status1 & GMAC0_HWTQ00_EOF_INT_BIT)
tp->hwtxq[0].eof_cnt++;
}
{
if (status1 & GMAC1_HWTQ13_EOF_INT_BIT)
tp->hwtxq[3].eof_cnt++;
-@@ -2629,14 +2645,14 @@
+@@ -2629,14 +2645,14 @@ if (1)
tp->hwtxq[0].eof_cnt++;
}
BUG_ON(rx_poll_enabled == 1);
-@@ -2646,7 +2662,7 @@
+@@ -2646,7 +2662,7 @@ if (1)
data32 &= ~(DEFAULT_Q1_INT_BIT);
writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
data32 &= ~DEFAULT_Q1_INT_BIT;
writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
-@@ -2656,24 +2672,21 @@
+@@ -2656,24 +2672,21 @@ if (1)
writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
#endif
}
// Interrupt Status 0
-@@ -2814,676 +2827,93 @@
+@@ -2814,676 +2827,93 @@ if (1)
}
}
{
case GMAC_PHY_GMII:
mii_write(tp->phy_addr,0x04,0x05e1); /* advertisement 100M full duplex, pause capable on */
-@@ -3552,6 +2982,7 @@
+@@ -3552,6 +2982,7 @@ void gmac_set_phy_status(struct net_devi
status.bits.link = LINK_DOWN;
// clear_bit(__LINK_STATE_START, &dev->state);
printk("Link Down (0x%04x) ", reg_val);
if(Giga_switch == 1)
{
wan_port_id = 1;
-@@ -3565,6 +2996,7 @@
+@@ -3565,6 +2996,7 @@ void gmac_set_phy_status(struct net_devi
storlink_ctl.link[ tp->port_id] = 0;
#endif
}
}
else
{
-@@ -3572,6 +3004,7 @@
+@@ -3572,6 +3004,7 @@ void gmac_set_phy_status(struct net_devi
status.bits.link = LINK_UP;
// set_bit(__LINK_STATE_START, &dev->state);
printk("Link Up (0x%04x) ",reg_val);
if(Giga_switch == 1)
{
wan_port_id = 1;
-@@ -3585,6 +3018,7 @@
+@@ -3585,6 +3018,7 @@ void gmac_set_phy_status(struct net_devi
storlink_ctl.link[ tp->port_id] = 1;
#endif
}
}
// value = mii_read(PHY_ADDR,0x05);
-@@ -3863,6 +3297,7 @@
+@@ -3863,6 +3297,7 @@ void gmac_get_phy_status(struct net_devi
}
}
status.bits.link = LINK_UP; /* link up */
if(Giga_switch==1)
{
wan_port_id = 1;
-@@ -3874,6 +3309,7 @@
+@@ -3874,6 +3309,7 @@ void gmac_get_phy_status(struct net_devi
storlink_ctl.link[ tp->port_id] = 1;
#endif
}
if ((ability & 0x20)==0x20)
{
if (tp->flow_control_enable == 0)
-@@ -3914,6 +3350,7 @@
+@@ -3914,6 +3350,7 @@ void gmac_get_phy_status(struct net_devi
else
{
status.bits.link = LINK_DOWN; /* link down */
if(Giga_switch == 1)
{
wan_port_id = 1;
-@@ -3925,6 +3362,7 @@
+@@ -3925,6 +3362,7 @@ void gmac_get_phy_status(struct net_devi
storlink_ctl.link[ tp->port_id] = 0;
#endif
}
if (tp->pre_phy_status == LINK_UP)
{
printk("GMAC-%d LINK_Down......\n",tp->port_id);
-@@ -4298,86 +3736,102 @@
+@@ -4298,86 +3736,102 @@ static void gmac_set_rx_mode(struct net_
}
#ifdef CONFIG_SL_NAPI
{
good_frame = 0;
if (curr_desc->word0.bits32 & GMAC_RXDESC_0_T_derr)
-@@ -4388,7 +3842,6 @@
+@@ -4388,7 +3842,6 @@ static int gmac_rx_poll(struct net_devic
{
if (rx_status == 4 || rx_status == 7)
isPtr->rx_crc_errors++;
}
#ifdef SL351x_GMAC_WORKAROUND
else if (pkt_size < 60)
-@@ -4407,17 +3860,32 @@
+@@ -4407,17 +3860,32 @@ static int gmac_rx_poll(struct net_devic
}
}
#endif
#ifdef SL351x_GMAC_WORKAROUND
if (tp->short_frames_cnt >= GMAC_SHORT_FRAME_THRESHOLD)
-@@ -4432,225 +3900,118 @@
+@@ -4432,225 +3900,118 @@ static int gmac_rx_poll(struct net_devic
}
tp->short_frames_cnt = 0;
#endif
}
#endif
-@@ -5114,6 +4475,7 @@
+@@ -5114,6 +4475,7 @@ void sl351x_poll_gmac_hanged_status(u32
{
sl351x_nat_workaround_cnt++;
sl351x_nat_workaround_handler();
}
#endif
#endif
-@@ -5124,6 +4486,7 @@
+@@ -5124,6 +4486,7 @@ void sl351x_poll_gmac_hanged_status(u32
}
do_workaround:
gmac_initialized = 0;
if (hanged_state)
-@@ -5290,6 +4653,7 @@
+@@ -5290,6 +4653,7 @@ static void sl351x_gmac_release_swtx_q(v
GMAC_SWTXQ_T *swtxq;
DMA_RWPTR_T rwptr;
toe = (TOE_INFO_T *)&toe_private_data;
tp = (GMAC_INFO_T *)&toe->gmac[0];
for (i=0; i<GMAC_NUM; i++, tp++)
-@@ -5341,6 +4705,7 @@
+@@ -5341,6 +4705,7 @@ static void sl351x_gmac_release_rx_q(voi
volatile GMAC_RXDESC_T *curr_desc;
struct sk_buff *skb;
toe = (TOE_INFO_T *)&toe_private_data;
tp = (GMAC_INFO_T *)&toe->gmac[0];
for (i=0; i<GMAC_NUM; i++, tp++)
-@@ -5374,6 +4739,7 @@
+@@ -5374,6 +4739,7 @@ static void sl351x_gmac_release_class_q(
volatile GMAC_RXDESC_T *curr_desc;
struct sk_buff *skb;
toe = (TOE_INFO_T *)&toe_private_data;
classq = (CLASSQ_INFO_T *)&toe->classq[0];
for (i=0; i<TOE_CLASS_QUEUE_NUM; i++, classq++)
-@@ -5410,6 +4776,7 @@
+@@ -5410,6 +4776,7 @@ static void sl351x_gmac_release_toe_q(vo
GMAC_RXDESC_T *toe_curr_desc;
struct sk_buff *skb;
--- a/drivers/mtd/chips/Kconfig
+++ b/drivers/mtd/chips/Kconfig
-@@ -220,6 +220,13 @@
+@@ -220,6 +220,13 @@ config MTD_ROM
This option enables basic support for ROM chips accessed through
a bus mapping driver.
#define MANUFACTURER_AMD 0x0001
#define MANUFACTURER_ATMEL 0x001F
-@@ -322,6 +327,13 @@
+@@ -322,6 +327,13 @@ struct mtd_info *cfi_cmdset_0002(struct
#endif
bootloc = extp->TopBottom;
if ((bootloc != 2) && (bootloc != 3)) {
printk(KERN_WARNING "%s: CFI does not contain boot "
"bank location. Assuming top.\n", map->name);
-@@ -340,6 +352,9 @@
+@@ -340,6 +352,9 @@ struct mtd_info *cfi_cmdset_0002(struct
cfi->cfiq->EraseRegionInfo[j] = swap;
}
}
/* Set the default CFI lock/unlock addresses */
cfi->addr_unlock1 = 0x555;
cfi->addr_unlock2 = 0x2aa;
-@@ -461,6 +476,7 @@
+@@ -461,6 +476,7 @@ static int __xipram chip_ready(struct ma
map_word d, t;
d = map_read(map, addr);
t = map_read(map, addr);
return map_word_equal(map, d, t);
-@@ -626,7 +642,9 @@
+@@ -626,7 +642,9 @@ static void put_chip(struct map_info *ma
default:
printk(KERN_ERR "MTD: put_chip() called with oldstate %d!!\n", chip->oldstate);
}
}
#ifdef CONFIG_MTD_XIP
-@@ -940,7 +958,9 @@
+@@ -940,7 +958,9 @@ static inline int do_read_secsi_onechip(
cfi_send_gen_cmd(0x90, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
cfi_send_gen_cmd(0x00, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
spin_unlock(chip->mutex);
return 0;
-@@ -1005,7 +1025,10 @@
+@@ -1005,7 +1025,10 @@ static int __xipram do_write_oneword(str
*/
unsigned long uWriteTimeout = ( HZ / 1000 ) + 1;
int ret = 0;
int retry_cnt = 0;
adr += chip->start;
-@@ -1037,9 +1060,15 @@
+@@ -1037,9 +1060,15 @@ static int __xipram do_write_oneword(str
ENABLE_VPP(map);
xip_disable(map, chip, adr);
retry:
map_write(map, datum, adr);
chip->state = FL_WRITING;
-@@ -1072,7 +1101,13 @@
+@@ -1072,7 +1101,13 @@ static int __xipram do_write_oneword(str
}
if (chip_ready(map, adr))
/* Latency issues. Drop the lock, wait a while and retry */
UDELAY(map, chip, adr, 1);
-@@ -1084,8 +1119,17 @@
+@@ -1084,8 +1119,17 @@ static int __xipram do_write_oneword(str
/* FIXME - should have reset delay before continuing */
if (++retry_cnt <= MAX_WORD_RETRIES)
ret = -EIO;
}
xip_enable(map, chip, adr);
-@@ -1171,7 +1215,14 @@
+@@ -1171,7 +1215,14 @@ static int cfi_amdstd_write_words(struct
return 0;
}
}
/* We are now aligned, write as much as possible */
while(len >= map_bankwidth(map)) {
map_word datum;
-@@ -1181,7 +1232,15 @@
+@@ -1181,7 +1232,15 @@ static int cfi_amdstd_write_words(struct
ret = do_write_oneword(map, &cfi->chips[chipnum],
ofs, datum);
if (ret)
ofs += map_bankwidth(map);
buf += map_bankwidth(map);
-@@ -1189,19 +1248,38 @@
+@@ -1189,19 +1248,38 @@ static int cfi_amdstd_write_words(struct
len -= map_bankwidth(map);
if (ofs >> cfi->chipshift) {
spin_lock(cfi->chips[chipnum].mutex);
if (cfi->chips[chipnum].state != FL_READY) {
-@@ -1221,7 +1299,11 @@
+@@ -1221,7 +1299,11 @@ static int cfi_amdstd_write_words(struct
#endif
goto retry1;
}
tmp_buf = map_read(map, ofs + chipstart);
spin_unlock(cfi->chips[chipnum].mutex);
-@@ -1231,11 +1313,23 @@
+@@ -1231,11 +1313,23 @@ static int cfi_amdstd_write_words(struct
ret = do_write_oneword(map, &cfi->chips[chipnum],
ofs, tmp_buf);
if (ret)
return 0;
}
-@@ -1275,6 +1369,7 @@
+@@ -1275,6 +1369,7 @@ static int __xipram do_write_buffer(stru
ENABLE_VPP(map);
xip_disable(map, chip, cmd_adr);
cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
//cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
-@@ -1535,6 +1630,9 @@
+@@ -1535,6 +1630,9 @@ static int __xipram do_erase_oneblock(st
DECLARE_WAITQUEUE(wait, current);
int ret = 0;
adr += chip->start;
spin_lock(chip->mutex);
-@@ -1613,6 +1711,9 @@
+@@ -1613,6 +1711,9 @@ static int __xipram do_erase_oneblock(st
chip->state = FL_READY;
put_chip(map, chip, adr);
spin_unlock(chip->mutex);
+MODULE_DESCRIPTION("MTD chip driver for ROM chips");
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
-@@ -614,5 +614,30 @@
+@@ -614,5 +614,30 @@ config MTD_PLATRAM
This selection automatically selects the map_ram driver.
+};
--- a/drivers/mtd/mtdchar.c
+++ b/drivers/mtd/mtdchar.c
-@@ -59,6 +59,77 @@
+@@ -59,6 +59,77 @@ struct mtd_file_info {
enum mtd_file_modes mode;
};
static loff_t mtd_lseek (struct file *file, loff_t offset, int orig)
{
struct mtd_file_info *mfi = file->private_data;
-@@ -162,13 +233,21 @@
+@@ -162,13 +233,21 @@ static ssize_t mtd_read(struct file *fil
int len;
char *kbuf;
/* FIXME: Use kiovec in 2.5 to lock down the user's buffers
and pass them directly to the MTD functions */
-@@ -178,8 +257,12 @@
+@@ -178,8 +257,12 @@ static ssize_t mtd_read(struct file *fil
else
kbuf=kmalloc(count, GFP_KERNEL);
while (count) {
-@@ -224,6 +307,9 @@
+@@ -224,6 +307,9 @@ static ssize_t mtd_read(struct file *fil
*ppos += retlen;
if (copy_to_user(buf, kbuf, retlen)) {
kfree(kbuf);
return -EFAULT;
}
else
-@@ -235,13 +321,19 @@
+@@ -235,13 +321,19 @@ static ssize_t mtd_read(struct file *fil
count = 0;
}
else {
return total_retlen;
} /* mtd_read */
-@@ -255,24 +347,40 @@
+@@ -255,24 +347,40 @@ static ssize_t mtd_write(struct file *fi
int ret=0;
int len;
while (count) {
-@@ -283,6 +391,9 @@
+@@ -283,6 +391,9 @@ static ssize_t mtd_write(struct file *fi
if (copy_from_user(kbuf, buf, len)) {
kfree(kbuf);
return -EFAULT;
}
-@@ -323,11 +434,17 @@
+@@ -323,11 +434,17 @@ static ssize_t mtd_write(struct file *fi
}
else {
kfree(kbuf);
return total_retlen;
} /* mtd_write */
-@@ -381,36 +498,67 @@
+@@ -381,36 +498,67 @@ static int mtd_ioctl(struct inode *inode
u_long size;
struct mtd_info_user info;
break;
}
-@@ -433,7 +581,12 @@
+@@ -433,7 +581,12 @@ static int mtd_ioctl(struct inode *inode
struct erase_info *erase;
if(!(file->f_mode & 2))
erase=kzalloc(sizeof(struct erase_info),GFP_KERNEL);
if (!erase)
-@@ -447,6 +600,9 @@
+@@ -447,6 +600,9 @@ static int mtd_ioctl(struct inode *inode
if (copy_from_user(&erase->addr, argp,
sizeof(struct erase_info_user))) {
kfree(erase);
return -EFAULT;
}
erase->mtd = mtd;
-@@ -484,14 +640,26 @@
+@@ -484,14 +640,26 @@ static int mtd_ioctl(struct inode *inode
struct mtd_oob_buf buf;
struct mtd_oob_ops ops;
if (!mtd->write_oob)
ret = -EOPNOTSUPP;
-@@ -499,8 +667,12 @@
+@@ -499,8 +667,12 @@ static int mtd_ioctl(struct inode *inode
ret = access_ok(VERIFY_READ, buf.ptr,
buf.length) ? 0 : EFAULT;
ops.ooblen = buf.length;
ops.ooboffs = buf.start & (mtd->oobsize - 1);
-@@ -536,19 +708,35 @@
+@@ -536,19 +708,35 @@ static int mtd_ioctl(struct inode *inode
struct mtd_oob_buf buf;
struct mtd_oob_ops ops;
ops.ooblen = buf.length;
ops.ooboffs = buf.start & (mtd->oobsize - 1);
-@@ -580,7 +768,12 @@
+@@ -580,7 +768,12 @@ static int mtd_ioctl(struct inode *inode
struct erase_info_user info;
if (copy_from_user(&info, argp, sizeof(info)))
if (!mtd->lock)
ret = -EOPNOTSUPP;
-@@ -594,7 +787,12 @@
+@@ -594,7 +787,12 @@ static int mtd_ioctl(struct inode *inode
struct erase_info_user info;
if (copy_from_user(&info, argp, sizeof(info)))
if (!mtd->unlock)
ret = -EOPNOTSUPP;
-@@ -629,11 +827,21 @@
+@@ -629,11 +827,21 @@ static int mtd_ioctl(struct inode *inode
loff_t offs;
if (copy_from_user(&offs, argp, sizeof(loff_t)))
break;
}
-@@ -642,11 +850,21 @@
+@@ -642,11 +850,21 @@ static int mtd_ioctl(struct inode *inode
loff_t offs;
if (copy_from_user(&offs, argp, sizeof(loff_t)))
break;
}
-@@ -654,8 +872,12 @@
+@@ -654,8 +872,12 @@ static int mtd_ioctl(struct inode *inode
case OTPSELECT:
{
int mode;
mfi->mode = MTD_MODE_NORMAL;
-@@ -670,7 +892,12 @@
+@@ -670,7 +892,12 @@ static int mtd_ioctl(struct inode *inode
{
struct otp_info *buf = kmalloc(4096, GFP_KERNEL);
if (!buf)
ret = -EOPNOTSUPP;
switch (mfi->mode) {
case MTD_MODE_OTP_FACTORY:
-@@ -701,12 +928,24 @@
+@@ -701,12 +928,24 @@ static int mtd_ioctl(struct inode *inode
{
struct otp_info info;
ret = mtd->lock_user_prot_reg(mtd, info.start, info.length);
break;
}
-@@ -742,8 +981,12 @@
+@@ -742,8 +981,12 @@ static int mtd_ioctl(struct inode *inode
break;
case MTD_MODE_RAW:
mfi->mode = arg;
case MTD_MODE_NORMAL:
-@@ -766,6 +1009,10 @@
+@@ -766,6 +1009,10 @@ static int mtd_ioctl(struct inode *inode
ret = -ENOTTY;
}
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
-@@ -44,6 +44,13 @@
+@@ -44,6 +44,13 @@ config MTD_NAND_AUTCPU12
This enables the driver for the autronix autcpu12 board to
access the SmartMediaCard.
+#endif
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
-@@ -71,3 +71,7 @@
+@@ -71,3 +71,7 @@ obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
#include <linux/compiler.h>
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
-@@ -70,6 +70,16 @@
+@@ -70,6 +70,16 @@ obj-$(CONFIG_R3964) += n_r3964.o
obj-$(CONFIG_APPLICOM) += applicom.o
obj-$(CONFIG_SONYPI) += sonypi.o
obj-$(CONFIG_RTC) += rtc.o
obj-$(CONFIG_EFI_RTC) += efirtc.o
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
-@@ -280,6 +280,56 @@
+@@ -280,6 +280,56 @@ config SERIAL_8250_RM9K
comment "Non-8250 serial port support"
depends on ARM_AMBA && (BROKEN || !ARCH_VERSATILE)
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
-@@ -62,5 +62,7 @@
+@@ -62,5 +62,7 @@ obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_se
obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
--- a/arch/arm/mach-sl2312/sl3516_device.c
+++ b/arch/arm/mach-sl2312/sl3516_device.c
-@@ -76,9 +76,30 @@
+@@ -76,9 +76,30 @@ static struct platform_device sata0_devi
.resource = sl3516_sata0_resources,
};
static int __init sl3516_init(void)
--- a/drivers/char/watchdog/Kconfig
+++ b/drivers/char/watchdog/Kconfig
-@@ -171,6 +171,17 @@
+@@ -171,6 +171,17 @@ config EP93XX_WATCHDOG
To compile this driver as a module, choose M here: the
module will be called ep93xx_wdt.
depends on ARCH_OMAP16XX || ARCH_OMAP24XX
--- a/drivers/char/watchdog/Makefile
+++ b/drivers/char/watchdog/Makefile
-@@ -36,6 +36,7 @@
+@@ -36,6 +36,7 @@ obj-$(CONFIG_S3C2410_WATCHDOG) += s3c241
obj-$(CONFIG_SA1100_WATCHDOG) += sa1100_wdt.o
obj-$(CONFIG_MPCORE_WATCHDOG) += mpcore_wdt.o
obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
+
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
-@@ -1064,5 +1064,12 @@
+@@ -1071,5 +1071,12 @@ config DEVPORT
source "drivers/s390/char/Kconfig"
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
-@@ -115,6 +115,7 @@
+@@ -116,6 +116,7 @@ obj-$(CONFIG_IPMI_HANDLER) += ipmi/
obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o
obj-$(CONFIG_TCG_TPM) += tpm/
projects / openwrt / staging / hauke.git / commitdiff