#define fsl_writel(val, addr) writel(val, addr)
#endif /* CONFIG_PPC32 */
-/* Routines to access transceiver ULPI registers */
-u8 view_ulpi(u8 addr)
-{
- u32 temp;
-
- temp = 0x40000000 | (addr << 16);
- fsl_writel(temp, &usb_dr_regs->ulpiview);
- udelay(1000);
- while (temp & 0x40)
- temp = fsl_readl(&usb_dr_regs->ulpiview);
- return (le32_to_cpu(temp) & 0x0000ff00) >> 8;
-}
-
int write_ulpi(u8 addr, u8 data)
{
u32 temp;
fsl_otg_del_timer(fsm, timer);
}
-/*
- * Reduce timer count by 1, and find timeout conditions.
- * Called by fsl_otg 1ms timer interrupt
- */
-int fsl_otg_tick_timer(void)
-{
- struct fsl_otg_timer *tmp_timer, *del_tmp;
- int expired = 0;
-
- list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
- tmp_timer->count--;
- /* check if timer expires */
- if (!tmp_timer->count) {
- list_del(&tmp_timer->list);
- tmp_timer->function(tmp_timer->data);
- expired = 1;
- }
- }
-
- return expired;
-}
-
/* Reset controller, not reset the bus */
void otg_reset_controller(void)
{