drm/amdgpu/gfx: minor code cleanup

Drop needless function wrapper.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 1d796eac421b9bde0de2089615649f593800ce36..4eb784dee5158f82c13fc0f29028dfc425a14c55 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -3095,21 +3095,6 @@ static int gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev)
        return 0;
 }
 
-/**
- * gfx_v7_0_cp_compute_start - start the compute queues
- *
- * @adev: amdgpu_device pointer
- *
- * Enable the compute queues.
- * Returns 0 for success, error for failure.
- */
-static int gfx_v7_0_cp_compute_start(struct amdgpu_device *adev)
-{
-       gfx_v7_0_cp_compute_enable(adev, true);
-
-       return 0;
-}
-
 /**
  * gfx_v7_0_cp_compute_fini - stop the compute queues
  *
@@ -3300,9 +3285,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
        u32 *buf;
        struct bonaire_mqd *mqd;
 
-       r = gfx_v7_0_cp_compute_start(adev);
-       if (r)
-               return r;
+       gfx_v7_0_cp_compute_enable(adev, true);
 
        /* fix up chicken bits */
        tmp = RREG32(mmCP_CPF_DEBUG);

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 0d9ef524cf71d46f03176bc912e150fa96fef863..3d4bed64ab8826ddd6a652cc185492d2ef646cd0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -3226,13 +3226,6 @@ static void gfx_v8_0_cp_compute_enable(struct amdgpu_device *adev, bool enable)
        udelay(50);
 }
 
-static int gfx_v8_0_cp_compute_start(struct amdgpu_device *adev)
-{
-       gfx_v8_0_cp_compute_enable(adev, true);
-
-       return 0;
-}
-
 static int gfx_v8_0_cp_compute_load_microcode(struct amdgpu_device *adev)
 {
        const struct gfx_firmware_header_v1_0 *mec_hdr;
@@ -3802,9 +3795,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
                WREG32(mmCP_PQ_STATUS, tmp);
        }
 
-       r = gfx_v8_0_cp_compute_start(adev);
-       if (r)
-               return r;
+       gfx_v8_0_cp_compute_enable(adev, true);
 
        for (i = 0; i < adev->gfx.num_compute_rings; i++) {
                struct amdgpu_ring *ring = &adev->gfx.compute_ring[i];