Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 0ca63e7ce0a7a2e3219deb40fa4b0671443ae02d..a4c62c72aa898f4db5c3109557db285f32737c6a 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1050,14 +1050,28 @@ choice
        prompt "CPU type"
        default CPU_R4X00
 
-config CPU_MIPS32
-       bool "MIPS32"
+config CPU_MIPS32_R1
+       bool "MIPS32 Release 1"
        select CPU_SUPPORTS_32BIT_KERNEL
+       select CPU_HAS_PREFETCH
+       help
+         Choose this option to build a kernel for release 1 or later of the
+         MIPS32 architecture.  Most modern embedded systems with a 32-bit
+         MIPS processor are based on a MIPS32 processor.  If you know the
+         specific type of processor in your system, choose those that one
+         otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
 
-config CPU_MIPS64
-       bool "MIPS64"
+config CPU_MIPS64_R1
+       bool "MIPS64 Release 1"
        select CPU_SUPPORTS_32BIT_KERNEL
        select CPU_SUPPORTS_64BIT_KERNEL
+       select CPU_HAS_PREFETCH
+       help
+         Choose this option to build a kernel for release 1 or later of the
+         MIPS64 architecture.  Many modern embedded systems with a 64-bit
+         MIPS processor are based on a MIPS64 processor.  If you know the
+         specific type of processor in your system, choose those that one
+         otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
 
 config CPU_R3000
        bool "R3000"
@@ -1253,7 +1267,7 @@ config SB1_PASS_2_1_WORKAROUNDS
 
 config 64BIT_PHYS_ADDR
        bool "Support for 64-bit physical address space"
-       depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT
+       depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT
 
 config CPU_ADVANCED
        bool "Override CPU Options"
@@ -1276,7 +1290,7 @@ config CPU_HAS_LLSC
 
 config CPU_HAS_LLDSCD
        bool "lld/scd Instructions available" if CPU_ADVANCED
-       default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32
+       default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1
        help
          Say Y here if your CPU has the lld and scd instructions, the 64-bit
          equivalents of ll and sc.  Say Y here for better performance, N if

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index bbf902796390a2ea602ed6a3f215eff93f6bcd61..56e1d42a5796f3e8cc4ea90bac2d164d9e04b9e2 100644 (file)
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -182,11 +182,11 @@ cflags-$(CONFIG_CPU_TX49XX)       += \
                        $(call set_gccflags,r4600,mips3,r4600,mips3,mips2)  \
                        -Wa,--trap
 
-cflags-$(CONFIG_CPU_MIPS32)    += \
+cflags-$(CONFIG_CPU_MIPS32_R1) += \
                        $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
                        -Wa,--trap
 
-cflags-$(CONFIG_CPU_MIPS64)    += \
+cflags-$(CONFIG_CPU_MIPS64_R1) += \
                        $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
                        -Wa,--trap
 

diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index d54964d52c838925771ba61866206a86b72758b1..0867417032f238fbb96d3287e829ba82b9393e19 100644 (file)
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -28,8 +28,8 @@ obj-$(CONFIG_CPU_RM9000)      += r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_NEVADA)       += r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_R10000)       += r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_SB1)          += r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_MIPS32)       += r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_MIPS64)       += r4k_fpu.o r4k_switch.o
+obj-$(CONFIG_CPU_MIPS32_R1)    += r4k_fpu.o r4k_switch.o
+obj-$(CONFIG_CPU_MIPS64_R1)    += r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_R6000)                += r6000_fpu.o r4k_switch.o
 
 obj-$(CONFIG_SMP)              += smp.o

diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index d2afbd19a9c8a0c013b4170008d55a18d701e61c..27361f44defe7424e747667caa6cbd5841adf42a 100644 (file)
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -165,7 +165,7 @@ LEAF(_init_fpu)
 1:
 #endif
 
-#ifdef CONFIG_CPU_MIPS32
+#ifdef CONFIG_CPU_MIPS32_R1
        mtc1    t1, $f0
        mtc1    t1, $f1
        mtc1    t1, $f2

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 46636a2fe98240bab1adc22fb9a6b0f7e6316f29..b2fa607eeeb8dae94b402b7ff7bf6852e01c506c 100644 (file)
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -864,7 +864,7 @@ asmlinkage void cache_parity_error(void)
               reg_val & (1<<22) ? "E0 " : "");
        printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1));
 
-#if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64)
+#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1)
        if (reg_val & (1<<22))
                printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0());
 

diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile
index ad285786e74b341ea9a9e30192e9dbf625f1a96b..8119996736ae9a8b681281c1110ad5c80d3575e5 100644 (file)
--- a/arch/mips/lib-32/Makefile
+++ b/arch/mips/lib-32/Makefile
@@ -4,8 +4,8 @@
 
 lib-y  += csum_partial.o memset.o watch.o
 
-obj-$(CONFIG_CPU_MIPS32)       += dump_tlb.o
-obj-$(CONFIG_CPU_MIPS64)       += dump_tlb.o
+obj-$(CONFIG_CPU_MIPS32_R1)    += dump_tlb.o
+obj-$(CONFIG_CPU_MIPS64_R1)    += dump_tlb.o
 obj-$(CONFIG_CPU_NEVADA)       += dump_tlb.o
 obj-$(CONFIG_CPU_R10000)       += dump_tlb.o
 obj-$(CONFIG_CPU_R3000)                += r3k_dump_tlb.o

diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile
index ad285786e74b341ea9a9e30192e9dbf625f1a96b..8119996736ae9a8b681281c1110ad5c80d3575e5 100644 (file)
--- a/arch/mips/lib-64/Makefile
+++ b/arch/mips/lib-64/Makefile
@@ -4,8 +4,8 @@
 
 lib-y  += csum_partial.o memset.o watch.o
 
-obj-$(CONFIG_CPU_MIPS32)       += dump_tlb.o
-obj-$(CONFIG_CPU_MIPS64)       += dump_tlb.o
+obj-$(CONFIG_CPU_MIPS32_R1)    += dump_tlb.o
+obj-$(CONFIG_CPU_MIPS64_R1)    += dump_tlb.o
 obj-$(CONFIG_CPU_NEVADA)       += dump_tlb.o
 obj-$(CONFIG_CPU_R10000)       += dump_tlb.o
 obj-$(CONFIG_CPU_R3000)                += r3k_dump_tlb.o

diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index b56a0abdc3d4216efa3919737fc0d8da6474b04c..74fea868af33fd75a8ef6c81bf4d603de2d94ecf 100644 (file)
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -9,8 +9,8 @@ obj-$(CONFIG_32BIT)             += ioremap.o pgtable-32.o
 obj-$(CONFIG_64BIT)            += pgtable-64.o
 obj-$(CONFIG_HIGHMEM)          += highmem.o
 
-obj-$(CONFIG_CPU_MIPS32)       += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
-obj-$(CONFIG_CPU_MIPS64)       += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_MIPS32_R1)    += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_MIPS64_R1)    += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
 obj-$(CONFIG_CPU_NEVADA)       += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
 obj-$(CONFIG_CPU_R10000)       += c-r4k.o cex-gen.o pg-r4k.o tlb-andes.o
 obj-$(CONFIG_CPU_R3000)                += c-r3k.o tlb-r3k.o pg-r4k.o

diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index eaecb8631973dfe7a33425a1d113e690000fe071..172293b5839090db53f8399004e28497e70ff9ed 100644 (file)
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -118,8 +118,8 @@ void __init cpu_cache_init(void)
 #if defined(CONFIG_CPU_R4X00)  || defined(CONFIG_CPU_VR41XX) || \
     defined(CONFIG_CPU_R4300)  || defined(CONFIG_CPU_R5000)  || \
     defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432)  || \
-    defined(CONFIG_CPU_R5500)  || defined(CONFIG_CPU_MIPS32) || \
-    defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \
+    defined(CONFIG_CPU_R5500)  || defined(CONFIG_CPU_MIPS32_R1) || \
+    defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \
     defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000)
                ld_mmu_r4xx0();
 #endif

diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 316c8a3d6b53705b2a40413449af7b8a2989e541..8297970f0bb1de64cc2731c2a14cc61971020950 100644 (file)
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -263,7 +263,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
        idx = read_c0_index();
        ptep = pte_offset_map(pmdp, address);
 
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
        write_c0_entrylo0(ptep->pte_high);
        ptep++;
        write_c0_entrylo1(ptep->pte_high);

diff --git a/arch/mips/mm/tlb-sb1.c b/arch/mips/mm/tlb-sb1.c
index bba7130e75476e3c913bda1139659cd515872b42..f55fbbe473a53cf4066a8cf160912d7edf2597b9 100644 (file)
--- a/arch/mips/mm/tlb-sb1.c
+++ b/arch/mips/mm/tlb-sb1.c
@@ -320,7 +320,7 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
        idx = read_c0_index();
        ptep = pte_offset_map(pmdp, address);
 
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
        write_c0_entrylo0(ptep->pte_high);
        ptep++;
        write_c0_entrylo1(ptep->pte_high);

diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile
index 354261d37d62e5e09bfc136f117e9394ef32a833..17b411b2206318d6675b92e32bf8e6e4935740a5 100644 (file)
--- a/arch/mips/oprofile/Makefile
+++ b/arch/mips/oprofile/Makefile
@@ -10,6 +10,6 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
 
 oprofile-y                             := $(DRIVER_OBJS) common.o
 
-oprofile-$(CONFIG_CPU_MIPS32)          += op_model_mipsxx.o
-oprofile-$(CONFIG_CPU_MIPS64)          += op_model_mipsxx.o
+oprofile-$(CONFIG_CPU_MIPS32_R1)               += op_model_mipsxx.o
+oprofile-$(CONFIG_CPU_MIPS64_R1)               += op_model_mipsxx.o
 oprofile-$(CONFIG_CPU_RM9000)          += op_model_rm9000.o

diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index c806eef41e7f8189e03808d8660bea61f9594298..a54cdd417956b42f767eec7b46fa0df9ba37efde 100644 (file)
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -131,7 +131,7 @@
     || defined (CONFIG_CPU_R5000)                                      \
     || defined (CONFIG_CPU_NEVADA)                                     \
     || defined (CONFIG_CPU_TX49XX)                                     \
-    || defined (CONFIG_CPU_MIPS64)
+    || defined (CONFIG_CPU_MIPS64_R1)
 #define KUSIZE         _LLCONST_(0x0000010000000000)   /* 2^^40 */
 #define KUSIZE_64      _LLCONST_(0x0000010000000000)   /* 2^^40 */
 #define K0SIZE         _LLCONST_(0x0000001000000000)   /* 2^^36 */

diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h
index 6f51be571bf054ad8bbb078ddd55a776df4a132f..7a1189fdf1aaf3c95e3b196b07e7654ea8de3689 100644 (file)
--- a/include/asm-mips/mach-mips/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h
@@ -14,7 +14,7 @@
 /*
  * CPU feature overrides for MIPS boards
  */
-#ifdef CONFIG_CPU_MIPS32
+#ifdef CONFIG_CPU_MIPS32_R1
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
 #define cpu_has_4ktlb          1
@@ -39,7 +39,7 @@
 /* #define cpu_has_subset_pcaches ? */
 #endif
 
-#ifdef CONFIG_CPU_MIPS64
+#ifdef CONFIG_CPU_MIPS64_R1
 #define cpu_has_tlb            1
 #define cpu_has_4kex           1
 #define cpu_has_4ktlb          1

diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index ee25a779bf4984f84d4ac7ed4b418299a3354c28..0076a537cf0c8469b2f48accd5407d675d509821 100644 (file)
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -76,7 +76,7 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
  * These are used to make use of C type-checking..
  */
 #ifdef CONFIG_64BIT_PHYS_ADDR
-  #ifdef CONFIG_CPU_MIPS32
+  #ifdef CONFIG_CPU_MIPS32_R1
     typedef struct { unsigned long pte_low, pte_high; } pte_t;
     #define pte_val(x)    ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
   #else

diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 9b4d39d9f2f003af9d65073654c97c36221206f7..217afc375a841fc6d827628f95392b4c142ab829 100644 (file)
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -116,7 +116,7 @@ static inline void pmd_clear(pmd_t *pmdp)
        pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
 }
 
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
 #define pte_page(x)            pfn_to_page(pte_pfn(x))
 #define pte_pfn(x)             ((unsigned long)((x).pte_high >> 6))
 static inline pte_t
@@ -139,7 +139,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
 #define pte_pfn(x)             ((unsigned long)((x).pte >> PAGE_SHIFT))
 #define pfn_pte(pfn, prot)     __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 #endif
-#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */
+#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) */
 
 #define __pgd_offset(address)  pgd_index(address)
 #define __pud_offset(address)  (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
@@ -202,7 +202,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
  */
 #define PTE_FILE_MAX_BITS      27
 
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
        /* fixme */
 #define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f))
 #define pgoff_to_pte(off) \

diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h
index 3aad751ccd5fd5add24df49546c6086390b8b5de..01e76e932e3f7e5af198bb01a4d3a93735a89902 100644 (file)
--- a/include/asm-mips/pgtable-bits.h
+++ b/include/asm-mips/pgtable-bits.h
@@ -33,7 +33,7 @@
  * unpredictable things.  The code (when it is written) to deal with
  * this problem will be in the update_mmu_cache() code for the r4k.
  */
-#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR)
+#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR)
 
 #define _PAGE_PRESENT               (1<<6)  /* implemented in software */
 #define _PAGE_READ                  (1<<7)  /* implemented in software */
@@ -123,7 +123,7 @@
 
 #endif
 #endif
-#endif /* defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) */
+#endif /* defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) */
 
 #define __READABLE     (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
 #define __WRITEABLE    (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
@@ -140,7 +140,7 @@
 #define PAGE_CACHABLE_DEFAULT  _CACHE_CACHABLE_COW
 #endif
 
-#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR)
+#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR)
 #define CONF_CM_DEFAULT                (PAGE_CACHABLE_DEFAULT >> 3)
 #else
 #define CONF_CM_DEFAULT                (PAGE_CACHABLE_DEFAULT >> 9)

diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 754ec6c5a8f7da2e99e29f8b24f5fc0c62921d9b..9f75baf11e25276a12e683d70ea58cd9d6c773a3 100644 (file)
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -82,7 +82,7 @@ extern void paging_init(void);
 #define pte_none(pte)          (!(pte_val(pte) & ~_PAGE_GLOBAL))
 #define pte_present(pte)       (pte_val(pte) & _PAGE_PRESENT)
 
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
 static inline void set_pte(pte_t *ptep, pte_t pte)
 {
        ptep->pte_high = pte.pte_high;
@@ -170,7 +170,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
  * Undefined behaviour if not..
  */
 static inline int pte_user(pte_t pte)  { BUG(); return 0; }
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
 static inline int pte_read(pte_t pte)  { return (pte).pte_low & _PAGE_READ; }
 static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; }
 static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; }
@@ -329,7 +329,7 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot)
  */
 #define mk_pte(page, pgprot)   pfn_pte(page_to_pfn(page), (pgprot))
 
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 {
        pte.pte_low &= _PAGE_CHG_MASK;