drm/i915: Make aliasing a 2nd class VM
authorBen Widawsky <benjamin.widawsky@intel.com>
Wed, 7 May 2014 05:21:36 +0000 (22:21 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 7 May 2014 08:01:41 +0000 (10:01 +0200)
There is a good debate to be had about how best to fit the aliasing
PPGTT into the code. However, as it stands right now, getting aliasing
PPGTT bindings is a hack, and done through implicit arguments. To make
this absolutely clear, WARN and return an error if a driver writer tries
to do something they shouldn't.

I have no issue with an eventual revert of this patch. It makes sense
for what we have today.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem.c

index e1fa919017e2e6dfe84a924a40828f19a5d52f45..8fd18246a1580ec23a99a91345741b0a38d8dd2d 100644 (file)
@@ -3852,9 +3852,13 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
                    uint32_t alignment,
                    unsigned flags)
 {
+       struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
        struct i915_vma *vma;
        int ret;
 
+       if (WARN_ON(vm == &dev_priv->mm.aliasing_ppgtt->base))
+               return -ENODEV;
+
        if (WARN_ON(flags & (PIN_GLOBAL | PIN_MAPPABLE) && !i915_is_ggtt(vm)))
                return -EINVAL;