ramips: add missing cpu-feature-override.h files
authorGabor Juhos <juhosg@openwrt.org>
Sun, 7 Apr 2013 17:05:04 +0000 (17:05 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Sun, 7 Apr 2013 17:05:04 +0000 (17:05 +0000)
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36259

target/linux/ramips/patches-3.8/0128-MIPS-ralink-add-cpu-feature-overrides.h-for-RT288x-S.patch [new file with mode: 0644]
target/linux/ramips/patches-3.8/0129-MIPS-ralink-add-cpu-feature-overrides.h-for-RT3x5x-R.patch [new file with mode: 0644]
target/linux/ramips/patches-3.8/0130-MIPS-ralink-add-cpu-feature-overrides.h-for-RT3662-3.patch [new file with mode: 0644]

diff --git a/target/linux/ramips/patches-3.8/0128-MIPS-ralink-add-cpu-feature-overrides.h-for-RT288x-S.patch b/target/linux/ramips/patches-3.8/0128-MIPS-ralink-add-cpu-feature-overrides.h-for-RT288x-S.patch
new file mode 100644 (file)
index 0000000..f9ed59b
--- /dev/null
@@ -0,0 +1,82 @@
+From 9830273b0c7f2e58a9226cc38bb0c4363e1fd8a2 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Sun, 7 Apr 2013 17:00:40 +0200
+Subject: [PATCH 1/3] MIPS: ralink: add cpu-feature-overrides.h for RT288x
+ SoCs
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ .../asm/mach-ralink/rt288x/cpu-feature-overrides.h |   56 ++++++++++++++++++++
+ arch/mips/ralink/Platform                          |    1 +
+ 2 files changed, 57 insertions(+)
+ create mode 100644 arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
+
+--- /dev/null
++++ b/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
+@@ -0,0 +1,56 @@
++/*
++ * Ralink RT288x specific CPU feature overrides
++ *
++ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * This file was derived from: include/asm-mips/cpu-features.h
++ *    Copyright (C) 2003, 2004 Ralf Baechle
++ *    Copyright (C) 2004 Maciej W. Rozycki
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++#ifndef _RT288X_CPU_FEATURE_OVERRIDES_H
++#define _RT288X_CPU_FEATURE_OVERRIDES_H
++
++#define cpu_has_tlb           1
++#define cpu_has_4kex          1
++#define cpu_has_3k_cache      0
++#define cpu_has_4k_cache      1
++#define cpu_has_tx39_cache    0
++#define cpu_has_sb1_cache     0
++#define cpu_has_fpu           0
++#define cpu_has_32fpr         0
++#define cpu_has_counter               1
++#define cpu_has_watch         1
++#define cpu_has_divec         1
++
++#define cpu_has_prefetch      1
++#define cpu_has_ejtag         1
++#define cpu_has_llsc          1
++
++#define cpu_has_mips16                1
++#define cpu_has_mdmx          0
++#define cpu_has_mips3d                0
++#define cpu_has_smartmips     0
++
++#define cpu_has_mips32r1      1
++#define cpu_has_mips32r2      1
++#define cpu_has_mips64r1      0
++#define cpu_has_mips64r2      0
++
++#define cpu_has_dsp           0
++#define cpu_has_mipsmt                0
++
++#define cpu_has_64bits                0
++#define cpu_has_64bit_zero_reg        0
++#define cpu_has_64bit_gp_regs 0
++#define cpu_has_64bit_addresses       0
++
++#define cpu_dcache_line_size()        16
++#define cpu_icache_line_size()        16
++
++#endif /* _RT288X_CPU_FEATURE_OVERRIDES_H */
+--- a/arch/mips/ralink/Platform
++++ b/arch/mips/ralink/Platform
+@@ -8,6 +8,7 @@ cflags-$(CONFIG_RALINK)                += -I$(srctree)
+ # Ralink RT288x
+ #
+ load-$(CONFIG_SOC_RT288X)     += 0xffffffff88000000
++cflags-$(CONFIG_SOC_RT288X)   += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt288x
+ #
+ # Ralink RT305x
diff --git a/target/linux/ramips/patches-3.8/0129-MIPS-ralink-add-cpu-feature-overrides.h-for-RT3x5x-R.patch b/target/linux/ramips/patches-3.8/0129-MIPS-ralink-add-cpu-feature-overrides.h-for-RT3x5x-R.patch
new file mode 100644 (file)
index 0000000..52f7320
--- /dev/null
@@ -0,0 +1,82 @@
+From 0eccf6e501337213d1de75dcf8f158d194ae0f77 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Sun, 7 Apr 2013 17:02:27 +0200
+Subject: [PATCH 2/3] MIPS: ralink: add cpu-feature-overrides.h for
+ RT3x5x/RT5350 SoCs
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ .../asm/mach-ralink/rt305x/cpu-feature-overrides.h |   56 ++++++++++++++++++++
+ arch/mips/ralink/Platform                          |    1 +
+ 2 files changed, 57 insertions(+)
+ create mode 100644 arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
+
+--- /dev/null
++++ b/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
+@@ -0,0 +1,56 @@
++/*
++ * Ralink RT305x specific CPU feature overrides
++ *
++ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ * This file was derived from: include/asm-mips/cpu-features.h
++ *    Copyright (C) 2003, 2004 Ralf Baechle
++ *    Copyright (C) 2004 Maciej W. Rozycki
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++#ifndef _RT305X_CPU_FEATURE_OVERRIDES_H
++#define _RT305X_CPU_FEATURE_OVERRIDES_H
++
++#define cpu_has_tlb           1
++#define cpu_has_4kex          1
++#define cpu_has_3k_cache      0
++#define cpu_has_4k_cache      1
++#define cpu_has_tx39_cache    0
++#define cpu_has_sb1_cache     0
++#define cpu_has_fpu           0
++#define cpu_has_32fpr         0
++#define cpu_has_counter               1
++#define cpu_has_watch         1
++#define cpu_has_divec         1
++
++#define cpu_has_prefetch      1
++#define cpu_has_ejtag         1
++#define cpu_has_llsc          1
++
++#define cpu_has_mips16                1
++#define cpu_has_mdmx          0
++#define cpu_has_mips3d                0
++#define cpu_has_smartmips     0
++
++#define cpu_has_mips32r1      1
++#define cpu_has_mips32r2      1
++#define cpu_has_mips64r1      0
++#define cpu_has_mips64r2      0
++
++#define cpu_has_dsp           1
++#define cpu_has_mipsmt                0
++
++#define cpu_has_64bits                0
++#define cpu_has_64bit_zero_reg        0
++#define cpu_has_64bit_gp_regs 0
++#define cpu_has_64bit_addresses       0
++
++#define cpu_dcache_line_size()        32
++#define cpu_icache_line_size()        32
++
++#endif /* _RT305X_CPU_FEATURE_OVERRIDES_H */
+--- a/arch/mips/ralink/Platform
++++ b/arch/mips/ralink/Platform
+@@ -14,6 +14,7 @@ cflags-$(CONFIG_SOC_RT288X)  += -I$(srctr
+ # Ralink RT305x
+ #
+ load-$(CONFIG_SOC_RT305X)     += 0xffffffff80000000
++cflags-$(CONFIG_SOC_RT305X)   += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt305x
+ #
+ # Ralink RT3883
diff --git a/target/linux/ramips/patches-3.8/0130-MIPS-ralink-add-cpu-feature-overrides.h-for-RT3662-3.patch b/target/linux/ramips/patches-3.8/0130-MIPS-ralink-add-cpu-feature-overrides.h-for-RT3662-3.patch
new file mode 100644 (file)
index 0000000..5d92e36
--- /dev/null
@@ -0,0 +1,81 @@
+From 4cca623b74420aacf656b968fde29aace96ae3db Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Sun, 7 Apr 2013 16:57:30 +0200
+Subject: [PATCH 3/3] MIPS: ralink: add cpu-feature-overrides.h for
+ RT3662/3883 SoCs
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ .../asm/mach-ralink/rt3883/cpu-feature-overrides.h |   55 ++++++++++++++++++++
+ arch/mips/ralink/Platform                          |    1 +
+ 2 files changed, 56 insertions(+)
+ create mode 100644 arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
+
+--- /dev/null
++++ b/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
+@@ -0,0 +1,55 @@
++/*
++ * Ralink RT3662/RT3883 specific CPU feature overrides
++ *
++ * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This file was derived from: include/asm-mips/cpu-features.h
++ *    Copyright (C) 2003, 2004 Ralf Baechle
++ *    Copyright (C) 2004 Maciej W. Rozycki
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++#ifndef _RT3883_CPU_FEATURE_OVERRIDES_H
++#define _RT3883_CPU_FEATURE_OVERRIDES_H
++
++#define cpu_has_tlb           1
++#define cpu_has_4kex          1
++#define cpu_has_3k_cache      0
++#define cpu_has_4k_cache      1
++#define cpu_has_tx39_cache    0
++#define cpu_has_sb1_cache     0
++#define cpu_has_fpu           0
++#define cpu_has_32fpr         0
++#define cpu_has_counter               1
++#define cpu_has_watch         1
++#define cpu_has_divec         1
++
++#define cpu_has_prefetch      1
++#define cpu_has_ejtag         1
++#define cpu_has_llsc          1
++
++#define cpu_has_mips16                1
++#define cpu_has_mdmx          0
++#define cpu_has_mips3d                0
++#define cpu_has_smartmips     0
++
++#define cpu_has_mips32r1      1
++#define cpu_has_mips32r2      1
++#define cpu_has_mips64r1      0
++#define cpu_has_mips64r2      0
++
++#define cpu_has_dsp           1
++#define cpu_has_mipsmt                0
++
++#define cpu_has_64bits                0
++#define cpu_has_64bit_zero_reg        0
++#define cpu_has_64bit_gp_regs 0
++#define cpu_has_64bit_addresses       0
++
++#define cpu_dcache_line_size()        32
++#define cpu_icache_line_size()        32
++
++#endif /* _RT3883_CPU_FEATURE_OVERRIDES_H */
+--- a/arch/mips/ralink/Platform
++++ b/arch/mips/ralink/Platform
+@@ -20,6 +20,7 @@ cflags-$(CONFIG_SOC_RT305X)  += -I$(srctr
+ # Ralink RT3883
+ #
+ load-$(CONFIG_SOC_RT3883)     += 0xffffffff80000000
++cflags-$(CONFIG_SOC_RT3883)   += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt3883
+ #
+ # Ralink MT7620