ramips: phy: at803x: support RGMII-to-SerDes and SFP support
authorDENG Qingfang <dengqf6@mail2.sysu.edu.cn>
Tue, 10 Mar 2020 17:30:02 +0000 (01:30 +0800)
committerAlexander Couzens <lynxis@fe80.eu>
Sat, 25 Apr 2020 21:45:16 +0000 (23:45 +0200)
Signed-off-by: DENG Qingfang <dengqf6@mail2.sysu.edu.cn>
Signed-off-by: René van Dorst <opensource@vdorst.com>
target/linux/ramips/patches-5.4/991-at803x.patch [new file with mode: 0644]

diff --git a/target/linux/ramips/patches-5.4/991-at803x.patch b/target/linux/ramips/patches-5.4/991-at803x.patch
new file mode 100644 (file)
index 0000000..60afe2a
--- /dev/null
@@ -0,0 +1,141 @@
+From 60ae82b0ea56c279be384b99cd2a42ae5ba7c5c7 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
+Date: Mon, 4 Nov 2019 22:22:17 +0100
+Subject: [PATCH] net: phy: at803x: add support for SFP module in
+ RGMII-to-x-base mode
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: RenĂ© van Dorst <opensource@vdorst.com>
+---
+ drivers/net/phy/at803x.c | 74 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 74 insertions(+)
+
+diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
+index 481cf48c9b9e4..a6536ecf15db4 100644
+--- a/drivers/net/phy/at803x.c
++++ b/drivers/net/phy/at803x.c
+@@ -19,6 +19,7 @@
+ #include <linux/etherdevice.h>
+ #include <linux/of_gpio.h>
+ #include <linux/gpio/consumer.h>
++#include <linux/sfp.h>
+ #define AT803X_SPECIFIC_STATUS                        0x11
+ #define AT803X_SS_SPEED_MASK                  (3 << 14)
+@@ -57,9 +58,18 @@
+ #define AT803X_MODE_CFG_MASK                  0x0F
+ #define AT803X_MODE_CFG_SGMII                 0x01
++#define AT803X_MODE_CFG_BX1000_RGMII_50               0x02
++#define AT803X_MODE_CFG_BX1000_RGMII_75               0x03
++#define AT803X_MODE_FIBER                     0x01
++#define AT803X_MODE_COPPER                    0x00
+ #define AT803X_PSSR                   0x11    /*PHY-Specific Status Register*/
+ #define AT803X_PSSR_MR_AN_COMPLETE    0x0200
++#define        PSSR_LINK                      BIT(10)
++#define        PSSR_SYNC_STATUS               BIT(8)
++#define        PSSR_DUPLEX                    BIT(13)
++#define        PSSR_SPEED_1000                BIT(15)
++#define        PSSR_SPEED_100                 BIT(14)
+ #define AT803X_DEBUG_REG_0                    0x00
+ #define AT803X_DEBUG_RX_CLK_DLY_EN            BIT(15)
+@@ -475,10 +485,56 @@ static int at803x_parse_dt(struct phy_device *phydev)
+       return 0;
+ }
++static int at803x_mode(struct phy_device *phydev)
++{
++      int mode;
++
++      mode = phy_read(phydev, AT803X_REG_CHIP_CONFIG) & AT803X_MODE_CFG_MASK;
++
++      if (mode == AT803X_MODE_CFG_BX1000_RGMII_50 ||
++          mode == AT803X_MODE_CFG_BX1000_RGMII_75)
++              return AT803X_MODE_FIBER;
++      return AT803X_MODE_COPPER;
++}
++
++static int at803x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
++{
++      struct phy_device *phydev = upstream;
++      __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
++      phy_interface_t iface;
++
++      sfp_parse_support(phydev->sfp_bus, id, support);
++      iface = sfp_select_interface(phydev->sfp_bus, support);
++
++      if (iface != PHY_INTERFACE_MODE_SGMII &&
++          iface != PHY_INTERFACE_MODE_1000BASEX) {
++              dev_info(&phydev->mdio.dev, "incompatible SFP module inserted;"
++                       "Only SGMII/1000BASEX are supported!\n");
++              return -EINVAL;
++      }
++
++      dev_info(&phydev->mdio.dev, "SFP interface %s", phy_modes(iface));
++
++      return 0;
++}
++
++static const struct sfp_upstream_ops at803x_sfp_ops = {
++      .attach = phy_sfp_attach,
++      .detach = phy_sfp_detach,
++      .module_insert = at803x_sfp_insert,
++};
++
+ static int at803x_probe(struct phy_device *phydev)
+ {
+       struct device *dev = &phydev->mdio.dev;
+       struct at803x_priv *priv;
++      int ret;
++
++      if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
++              ret = phy_sfp_probe(phydev, &at803x_sfp_ops);
++              if (ret < 0)
++                      return ret;
++      }
+       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+       if (!priv)
+@@ -658,6 +714,10 @@ static int at803x_read_status(struct phy_device *phydev)
+ {
+       int ss, err, old_link = phydev->link;
++      /* Handle (Fiber) SGMII to RGMII mode */
++      if (at803x_mode(phydev) == AT803X_MODE_FIBER)
++              return genphy_c37_read_status(phydev);
++
+       /* Update the link, but return if there was an error */
+       err = genphy_update_link(phydev);
+       if (err)
+@@ -712,6 +772,19 @@ static int at803x_read_status(struct phy_device *phydev)
+       return 0;
+ }
++static int at803x_config_aneg(struct phy_device *phydev)
++{
++      /* Handle (Fiber) SerDes to RGMII mode */
++      if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
++              pr_warn("%s: fiber\n", __func__);
++              return genphy_c37_config_aneg(phydev);
++      }
++
++      pr_warn("%s: enter\n", __func__);
++
++      return genphy_config_aneg(phydev);
++}
++
+ static struct phy_driver at803x_driver[] = {
+ {
+       /* Qualcomm Atheros AR8035 */
+@@ -758,6 +831,7 @@ static struct phy_driver at803x_driver[] = {
+       .suspend                = at803x_suspend,
+       .resume                 = at803x_resume,
+       /* PHY_GBIT_FEATURES */
++      .config_aneg            = at803x_config_aneg,
+       .read_status            = at803x_read_status,
+       .aneg_done              = at803x_aneg_done,
+       .ack_interrupt          = &at803x_ack_interrupt,