u32 msg_ext;
irqreturn_t ret = IRQ_NONE;
- /* here we handle IPC interrupts only */
- if (!(sdev->irq_status & HDA_DSP_ADSPIS_IPC))
- return ret;
-
hipcida = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDA);
hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCCTL);
hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCTDR);
u32 msg;
u32 msg_ext;
- /* here we handle IPC interrupts only */
- if (!(sdev->irq_status & HDA_DSP_ADSPIS_IPC))
- return IRQ_NONE;
-
/* read IPC status */
hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
HDA_DSP_REG_HIPCIE);
{
struct snd_sof_dev *sdev = context;
int ret = IRQ_NONE;
+ u32 irq_status;
spin_lock(&sdev->hw_lock);
/* store status */
- sdev->irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
- HDA_DSP_REG_ADSPIS);
+ irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
+ dev_vdbg(sdev->dev, "irq handler: irq_status:0x%x\n", irq_status);
/* invalid message ? */
- if (sdev->irq_status == 0xffffffff)
+ if (irq_status == 0xffffffff)
goto out;
/* IPC message ? */
- if (sdev->irq_status & HDA_DSP_ADSPIS_IPC) {
+ if (irq_status & HDA_DSP_ADSPIS_IPC) {
/* disable IPC interrupt */
snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR,
HDA_DSP_REG_ADSPIC,
struct snd_sof_mailbox host_box; /* Host initiated IPC */
struct snd_sof_mailbox stream_box; /* Stream position update */
struct snd_sof_ipc_msg *msg;
- u64 irq_status;
int ipc_irq;
u32 next_comp_id; /* monotonic - reset during S3 */