# CONFIG_64BIT is not set
# CONFIG_64BIT_PHYS_ADDR is not set
CONFIG_ADM5120_GPIO=y
+CONFIG_ADM5120_HARDWARE_SWAB=y
CONFIG_ADM5120_NR_UARTS=2
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
--- /dev/null
+if MIPS_ADM5120
+
+menu "ADM5120 Implementation Options"
+
+config PCI_ADM5120
+ bool "Enable PCI support"
+ select PCI
+ default y
+
+config ADM5120_HARDWARE_SWAB
+ bool "Enable hardware accelerated byte-swapping"
+ default y
+
+endmenu
+
+endif
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
+#include <asm/byteorder.h>
#include <asm/mach-adm5120/adm5120_defs.h>
#include <asm/mach-adm5120/adm5120_switch.h>
u32 size, maxsize;
volatile u8 *p,*r;
u8 t;
-
+
memctrl = SWITCH_READ(SWITCH_REG_MEMCTRL);
switch (memctrl & MEMCTRL_SDRS_MASK) {
case MEMCTRL_SDRS_4M:
maxsize = 64 << 20;
break;
}
-
+
/* FIXME: need to disable buffers for both SDRAM bank? */
mem_dbg("checking for %ldMB chip\n",maxsize >> 20);
p = (volatile u8 *)KSEG1ADDR(0);
t = *p;
for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
-#if 1
+#if 1
r = (p+size);
*p = 0x55;
mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, *r);
mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, p[size]);
if (p[size] != 0x55)
continue;
-
+
p[0] = 0xAA;
mem_dbg("2nd pattern at 0x%lx is 0x%02x\n", size, p[size]);
if (p[size] != 0xAA)
if (size == (32 << 20))
/* if bank size is 32MB, 2nd bank is not supported */
goto out;
-
+
if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
/* if 2nd bank is not enabled, we are done */
goto out;
-
+
/*
- * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
+ * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
* are missing.
*/
mem_dbg("checking second bank\n");
*p = 0x55;
if (*p != 0x55)
goto out;
-
+
*p = 0xAA;
if (*p != 0xAA)
goto out;
-
+
*p = t;
if (maxsize != size) {
/* adjusting MECTRL register */
printk("Memory size : %ldMB\n", adm5120_memsize >> 20);
}
+void __init adm5120_swab_test(void)
+{
+#if CONFIG_ADM5120_HARDWARE_SWAB
+ u32 t1,t2;
+
+ t1 = 0x1234;
+ t2 = swab16(t1);
+ printk("hardware swab16 test %s, data:0x%04X, result:0x%04X\n",
+ (t2 == 0x3412) ? "passed" :"failed", t1, t2);
+
+ t1 = 0x12345678;
+ t2 = swab32(t1);
+ printk("hardware swab32 test %s, data:0x%08X, result:0x%08X\n",
+ (t2 == 0x78563412) ? "passed" :"failed", t1, t2);
+
+#endif /* CONFIG_ADM5120_HARDWARE_SWAB */
+}
+
void __init adm5120_info_init(void)
{
+
adm5120_detect_cpuinfo();
adm5120_detect_memsize();
adm5120_detect_board();
adm5120_info_show();
+ adm5120_swab_test();
}
===================================================================
--- linux-2.6.21.1.orig/arch/mips/Kconfig
+++ linux-2.6.21.1/arch/mips/Kconfig
-@@ -16,6 +16,21 @@ choice
+@@ -16,6 +16,17 @@ choice
prompt "System type"
default SGI_IP22
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select GENERIC_GPIO
-+
-+config PCI_ADM5120
-+ bool "Add PCI control support for ADM5120"
-+ depends on MIPS_ADM5120 && PCI
+
config MIPS_MTX1
bool "4G Systems MTX-1 board"
select DMA_NONCOHERENT
+@@ -766,6 +775,7 @@
+
+ endchoice
+
++source "arch/mips/adm5120/Kconfig"
+ source "arch/mips/ddb5xxx/Kconfig"
+ source "arch/mips/gt64120/ev64120/Kconfig"
+ source "arch/mips/jazz/Kconfig"
Index: linux-2.6.21.1/arch/mips/Makefile
===================================================================
--- linux-2.6.21.1.orig/arch/mips/Makefile
--- /dev/null
+--- linux-2.6.19.2/include/asm-mips/byteorder.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.new/include/asm-mips/byteorder.h 2007-05-16 21:14:47.000000000 +0200
+@@ -58,6 +58,35 @@
+
+ #endif /* CONFIG_CPU_MIPSR2 */
+
++#ifdef CONFIG_ADM5120_HARDWARE_SWAB
++
++static __inline__ __attribute_const__ __u16 ___adm5120__swab16(__u16 x)
++{
++ __asm__ (
++ " sw %2, 0xC8(%1) \n"
++ " lhu %0, 0xCC(%1) \n"
++ : "=r" (x)
++ : "r" (0xB2000000), "r" (x));
++
++ return x;
++}
++
++static __inline__ __attribute_const__ __u32 ___adm5120__swab32(__u32 x)
++{
++ __asm__ (
++ " sw %2, 0xC8(%1) \n"
++ " lw %0, 0xCC(%1) \n"
++ : "=r" (x)
++ : "r" (0xB2000000), "r" (x));
++
++ return x;
++}
++
++#define __arch__swab16(x) ___adm5120__swab16(x)
++#define __arch__swab32(x) ___adm5120__swab32(x)
++
++#endif /* CONFIG_ADM5120_HARDWARE_SWAB */
++
+ #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+ # define __BYTEORDER_HAS_U64__
+ # define __SWAB_64_THRU_32__
# CONFIG_64BIT is not set
# CONFIG_64BIT_PHYS_ADDR is not set
CONFIG_ADM5120_GPIO=y
+CONFIG_ADM5120_HARDWARE_SWAB=y
CONFIG_ADM5120_NR_UARTS=2
# CONFIG_ATM_DRIVERS is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set