OMAPDSS: Remove passive matrix LCD support (part 1)
authorArchit Taneja <archit@ti.com>
Thu, 21 Jun 2012 04:03:55 +0000 (09:33 +0530)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Fri, 29 Jun 2012 07:10:03 +0000 (10:10 +0300)
Remove clock constraints related to passive matrix displays.

There is a constraint (pcd_min should be 3) for passive matrix displays. Remove
this constraint in clock divider calculations as we won't support passive
matrix displays any more.

This cleans up the functions which calculate the clock dividers with DSI's PLL
or DSS_FCLK as the clock source.

Signed-off-by: Archit Taneja <archit@ti.com>
drivers/video/omap2/dss/dispc.c
drivers/video/omap2/dss/dpi.c
drivers/video/omap2/dss/dsi.c
drivers/video/omap2/dss/dss.c
drivers/video/omap2/dss/dss.h
drivers/video/omap2/dss/sdi.c

index e48d1c10a3cf3ad38ebcd7f0fa5cb38d433a0b6b..6e25624b3faf57c8dfb05d396185b047bc1f94a9 100644 (file)
@@ -3167,7 +3167,7 @@ void dispc_mgr_set_pol_freq(enum omap_channel channel,
 }
 
 /* with fck as input clock rate, find dispc dividers that produce req_pck */
-void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
+void dispc_find_clk_divs(unsigned long req_pck, unsigned long fck,
                struct dispc_clock_info *cinfo)
 {
        u16 pcd_min, pcd_max;
@@ -3178,9 +3178,6 @@ void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
        pcd_min = dss_feat_get_param_min(FEAT_PARAM_DSS_PCD);
        pcd_max = dss_feat_get_param_max(FEAT_PARAM_DSS_PCD);
 
-       if (!is_tft)
-               pcd_min = 3;
-
        best_pck = 0;
        best_ld = 0;
        best_pd = 0;
index 8c2056c9537bd1162d08dd0c6d63a2437b926c45..09dd2435df11a6b64970b040a0062089603d7bb6 100644 (file)
@@ -64,7 +64,7 @@ static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
                return false;
 }
 
-static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
+static int dpi_set_dsi_clk(struct omap_dss_device *dssdev,
                unsigned long pck_req, unsigned long *fck, int *lck_div,
                int *pck_div)
 {
@@ -72,8 +72,8 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
        struct dispc_clock_info dispc_cinfo;
        int r;
 
-       r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, pck_req,
-                       &dsi_cinfo, &dispc_cinfo);
+       r = dsi_pll_calc_clock_div_pck(dpi.dsidev, pck_req, &dsi_cinfo,
+                       &dispc_cinfo);
        if (r)
                return r;
 
@@ -96,7 +96,7 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
        return 0;
 }
 
-static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
+static int dpi_set_dispc_clk(struct omap_dss_device *dssdev,
                unsigned long pck_req, unsigned long *fck, int *lck_div,
                int *pck_div)
 {
@@ -104,7 +104,7 @@ static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
        struct dispc_clock_info dispc_cinfo;
        int r;
 
-       r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
+       r = dss_calc_clock_div(pck_req, &dss_cinfo, &dispc_cinfo);
        if (r)
                return r;
 
@@ -129,20 +129,17 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
        int lck_div = 0, pck_div = 0;
        unsigned long fck = 0;
        unsigned long pck;
-       bool is_tft;
        int r = 0;
 
        dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
                        dssdev->panel.acbi, dssdev->panel.acb);
 
-       is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
-
        if (dpi_use_dsi_pll(dssdev))
-               r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
-                               &fck, &lck_div, &pck_div);
+               r = dpi_set_dsi_clk(dssdev, t->pixel_clock * 1000, &fck,
+                               &lck_div, &pck_div);
        else
-               r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
-                               &fck, &lck_div, &pck_div);
+               r = dpi_set_dispc_clk(dssdev, t->pixel_clock * 1000, &fck,
+                               &lck_div, &pck_div);
        if (r)
                return r;
 
@@ -292,7 +289,6 @@ EXPORT_SYMBOL(dpi_set_timings);
 int dpi_check_timings(struct omap_dss_device *dssdev,
                        struct omap_video_timings *timings)
 {
-       bool is_tft;
        int r;
        int lck_div, pck_div;
        unsigned long fck;
@@ -305,11 +301,9 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
        if (timings->pixel_clock == 0)
                return -EINVAL;
 
-       is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
-
        if (dpi_use_dsi_pll(dssdev)) {
                struct dsi_clock_info dsi_cinfo;
-               r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft,
+               r = dsi_pll_calc_clock_div_pck(dpi.dsidev,
                                timings->pixel_clock * 1000,
                                &dsi_cinfo, &dispc_cinfo);
 
@@ -319,7 +313,7 @@ int dpi_check_timings(struct omap_dss_device *dssdev,
                fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
        } else {
                struct dss_clock_info dss_cinfo;
-               r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
+               r = dss_calc_clock_div(timings->pixel_clock * 1000,
                                &dss_cinfo, &dispc_cinfo);
 
                if (r)
index df65b93c0659d2a3b367e0da85d30d311124ed69..aa3b81088a23b6c491d92baa6b2a56ff40998764 100644 (file)
@@ -1316,7 +1316,7 @@ static int dsi_calc_clock_rates(struct platform_device *dsidev,
        return 0;
 }
 
-int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft,
+int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
                unsigned long req_pck, struct dsi_clock_info *dsi_cinfo,
                struct dispc_clock_info *dispc_cinfo)
 {
@@ -1335,8 +1335,8 @@ int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft,
                        dsi->cache_cinfo.clkin == dss_sys_clk) {
                DSSDBG("DSI clock info found from cache\n");
                *dsi_cinfo = dsi->cache_cinfo;
-               dispc_find_clk_divs(is_tft, req_pck,
-                       dsi_cinfo->dsi_pll_hsdiv_dispc_clk, dispc_cinfo);
+               dispc_find_clk_divs(req_pck, dsi_cinfo->dsi_pll_hsdiv_dispc_clk,
+                       dispc_cinfo);
                return 0;
        }
 
@@ -1402,7 +1402,7 @@ retry:
 
                                match = 1;
 
-                               dispc_find_clk_divs(is_tft, req_pck,
+                               dispc_find_clk_divs(req_pck,
                                                cur.dsi_pll_hsdiv_dispc_clk,
                                                &cur_dispc);
 
index fc0c3ce802e1a566001c28b1b30245b2f366bdfd..04b4586113e34928e1784e22c844da287d5750ed 100644 (file)
@@ -506,8 +506,7 @@ unsigned long dss_get_dpll4_rate(void)
                return 0;
 }
 
-int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
-               struct dss_clock_info *dss_cinfo,
+int dss_calc_clock_div(unsigned long req_pck, struct dss_clock_info *dss_cinfo,
                struct dispc_clock_info *dispc_cinfo)
 {
        unsigned long prate;
@@ -555,7 +554,7 @@ retry:
                fck = clk_get_rate(dss.dss_clk);
                fck_div = 1;
 
-               dispc_find_clk_divs(is_tft, req_pck, fck, &cur_dispc);
+               dispc_find_clk_divs(req_pck, fck, &cur_dispc);
                match = 1;
 
                best_dss.fck = fck;
@@ -585,7 +584,7 @@ retry:
 
                        match = 1;
 
-                       dispc_find_clk_divs(is_tft, req_pck, fck, &cur_dispc);
+                       dispc_find_clk_divs(req_pck, fck, &cur_dispc);
 
                        if (abs(cur_dispc.pck - req_pck) <
                                        abs(best_dispc.pck - req_pck)) {
index df131fc689526cb4443ee4a6fe070307eabbf3f4..88e1c12195e543bb9601f31719170d1bd56ced2a 100644 (file)
@@ -274,8 +274,7 @@ unsigned long dss_get_dpll4_rate(void);
 int dss_calc_clock_rates(struct dss_clock_info *cinfo);
 int dss_set_clock_div(struct dss_clock_info *cinfo);
 int dss_get_clock_div(struct dss_clock_info *cinfo);
-int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
-               struct dss_clock_info *dss_cinfo,
+int dss_calc_clock_div(unsigned long req_pck, struct dss_clock_info *dss_cinfo,
                struct dispc_clock_info *dispc_cinfo);
 
 /* SDI */
@@ -302,7 +301,7 @@ u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
 unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev);
 int dsi_pll_set_clock_div(struct platform_device *dsidev,
                struct dsi_clock_info *cinfo);
-int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft,
+int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
                unsigned long req_pck, struct dsi_clock_info *cinfo,
                struct dispc_clock_info *dispc_cinfo);
 int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
@@ -336,7 +335,7 @@ static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
        return -ENODEV;
 }
 static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
-               bool is_tft, unsigned long req_pck,
+               unsigned long req_pck,
                struct dsi_clock_info *dsi_cinfo,
                struct dispc_clock_info *dispc_cinfo)
 {
@@ -393,7 +392,7 @@ void dispc_set_loadmode(enum omap_dss_load_mode mode);
 bool dispc_mgr_timings_ok(enum omap_channel channel,
                const struct omap_video_timings *timings);
 unsigned long dispc_fclk_rate(void);
-void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
+void dispc_find_clk_divs(unsigned long req_pck, unsigned long fck,
                struct dispc_clock_info *cinfo);
 int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
                struct dispc_clock_info *cinfo);
index 3a43dc2a9b46c992b22770b163a5e47611b7bb9e..d07ecc44603e9efd4c77408daf49fa157dfc14dc 100644 (file)
@@ -84,8 +84,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
        dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
                        dssdev->panel.acbi, dssdev->panel.acb);
 
-       r = dss_calc_clock_div(1, t->pixel_clock * 1000,
-                       &dss_cinfo, &dispc_cinfo);
+       r = dss_calc_clock_div(t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo);
        if (r)
                goto err_calc_clock_div;