drm/i915/icl: Don't update enabled dbuf slices struct until updated in hw
authorMahesh Kumar <mahesh1.kumar@intel.com>
Thu, 17 May 2018 13:26:26 +0000 (18:56 +0530)
committerPaulo Zanoni <paulo.r.zanoni@intel.com>
Mon, 4 Jun 2018 23:53:55 +0000 (16:53 -0700)
Do not update number of enabled dbuf slices in dev_priv struct until we
actually enable/disable dbuf slice in hw. This is leading to never
updating dbuf slices and resulting in DBuf slice mismatch warning.

Fixes: aa9664ffe863 ("drm/i915/icl: Enable 2nd DBuf slice only when needed")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180517132626.5885-1-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/intel_pm.c

index b85229e153c421c49ede59f5efd53af8318ed0fe..53aaaa3e6886d9eb472a1eb5b4f61955e12edc4a 100644 (file)
@@ -5150,7 +5150,6 @@ skl_copy_ddb_for_pipe(struct skl_ddb_values *dst,
               sizeof(dst->ddb.uv_plane[pipe]));
        memcpy(dst->ddb.plane[pipe], src->ddb.plane[pipe],
               sizeof(dst->ddb.plane[pipe]));
-       dst->ddb.enabled_slices = src->ddb.enabled_slices;
 }
 
 static void