drm/i915: Capture PPGTT info on error capture
authorBen Widawsky <benjamin.widawsky@intel.com>
Thu, 30 Jan 2014 08:19:40 +0000 (00:19 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 30 Jan 2014 12:01:02 +0000 (13:01 +0100)
v2: Rebased upon cleaned up error state
v3: Make sure hangcheck info remains last (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gpu_error.c

index 34ff995e6ea35d834f52e9d6236bf774c071d59a..1c8c77508238e43cc61ff837c6dd48ce128a0f4f 100644 (file)
@@ -361,6 +361,14 @@ struct drm_i915_error_state {
                        u32 seqno;
                        u32 tail;
                } *requests;
+
+               struct {
+                       u32 gfx_mode;
+                       union {
+                               u64 pdp[4];
+                               u32 pp_dir_base;
+                       };
+               } vm_info;
        } ring[I915_NUM_RINGS];
        struct drm_i915_error_buffer {
                u32 size;
@@ -377,6 +385,7 @@ struct drm_i915_error_state {
                s32 ring:4;
                u32 cache_level:3;
        } **active_bo, **pinned_bo;
+
        u32 *active_bo_count, *pinned_bo_count;
 };
 
index 70a7cd77afb29338f8db6f61ba8be41505b3a6d7..094995f6553cbe557655aca0eb1f644d8fc8c271 100644 (file)
@@ -270,6 +270,19 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
                                   ring->semaphore_seqno[2]);
                }
        }
+       if (USES_PPGTT(dev)) {
+               err_printf(m, "  GFX_MODE: 0x%08x\n", ring->vm_info.gfx_mode);
+
+               if (INTEL_INFO(dev)->gen >= 8) {
+                       int i;
+                       for (i = 0; i < 4; i++)
+                               err_printf(m, "  PDP%d: 0x%016llx\n",
+                                          i, ring->vm_info.pdp[i]);
+               } else {
+                       err_printf(m, "  PP_DIR_BASE: 0x%08x\n",
+                                  ring->vm_info.pp_dir_base);
+               }
+       }
        err_printf(m, "  seqno: 0x%08x\n", ring->seqno);
        err_printf(m, "  waiting: %s\n", yesno(ring->waiting));
        err_printf(m, "  ring->head: 0x%08x\n", ring->cpu_ring_head);
@@ -835,6 +848,30 @@ static void i915_record_ring_state(struct drm_device *dev,
 
        ering->hangcheck_score = ring->hangcheck.score;
        ering->hangcheck_action = ring->hangcheck.action;
+
+       if (USES_PPGTT(dev)) {
+               int i;
+
+               ering->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(ring));
+
+               switch (INTEL_INFO(dev)->gen) {
+               case 8:
+                       for (i = 0; i < 4; i++) {
+                               ering->vm_info.pdp[i] =
+                                       I915_READ(GEN8_RING_PDP_UDW(ring, i));
+                               ering->vm_info.pdp[i] <<= 32;
+                               ering->vm_info.pdp[i] |=
+                                       I915_READ(GEN8_RING_PDP_LDW(ring, i));
+                       }
+                       break;
+               case 7:
+                       ering->vm_info.pp_dir_base = RING_PP_DIR_BASE(ring);
+                       break;
+               case 6:
+                       ering->vm_info.pp_dir_base = RING_PP_DIR_BASE_READ(ring);
+                       break;
+               }
+       }
 }