.restart = mpc85xx_restart,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
};
return 0;
}
-
define_machine(mpc86xx_hpcn) {
.name = "MPC86xx HPCN",
.probe = mpc86xx_hpcn_probe,
.time_init = mpc86xx_time_init,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
};
return 0;
}
+void fsl_pcibios_fixup_bus(struct pci_bus *bus)
+{
+ struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
+ int i;
+
+ /* deal with bogus pci_bus when we don't have anything connected on PCIe */
+ if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) {
+ if (bus->parent) {
+ for (i = 0; i < 4; ++i)
+ bus->resource[i] = bus->parent->resource[i];
+ }
+ }
+}
+
int __init fsl_add_bridge(struct device_node *dev, int is_primary)
{
int len;
};
extern int fsl_add_bridge(struct device_node *dev, int is_primary);
+extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
#endif /* __POWERPC_FSL_PCI_H */
#endif /* __KERNEL__ */