NAND: remove NAND_MAX_CHIPS definitions
authorVladimir Zapolskiy <vz@mleia.com>
Sun, 20 Nov 2011 14:10:16 +0000 (16:10 +0200)
committerScott Wood <scottwood@freescale.com>
Thu, 26 Jan 2012 22:08:55 +0000 (16:08 -0600)
This change follows the change by Wolfgang Grandegger (commit 6c869637fef),
which allows to remove useless NAND_MAX_CHIPS definitions in board config
files.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
24 files changed:
include/configs/P1_P2_RDB.h
include/configs/SIMPC8313.h
include/configs/VCMA9.h
include/configs/aria.h
include/configs/bf526-ezbrd.h
include/configs/bf527-ad7160-eval.h
include/configs/bf527-ezkit.h
include/configs/bf548-ezkit.h
include/configs/cm-bf527.h
include/configs/cpu9260.h
include/configs/da830evm.h
include/configs/da850evm.h
include/configs/ea20.h
include/configs/hawkboard.h
include/configs/km/km_arm.h
include/configs/m28evk.h
include/configs/mecp5123.h
include/configs/mpc5121ads.h
include/configs/mv-common.h
include/configs/pdm360ng.h
include/configs/pm9261.h
include/configs/qi_lb60.h
include/configs/smdk2410.h
include/configs/tnetv107x_evm.h

index 00fa74d6f7b6261ae6548fe411474d9ffb8ca0da..cee788ab1310c4f070d7f4524f34e99c9670b275 100644 (file)
@@ -273,11 +273,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
 #endif
 
+#define CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE_LIST      {CONFIG_SYS_NAND_BASE}
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND                        1
 #define CONFIG_NAND_FSL_ELBC           1
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (16 * 1024)
 
index 77be3600f27b17db6eee8ad53b0aa3398186face..09760774fb59fef15b94a52fa4437061504b5de6 100644 (file)
 #endif
 #define CONFIG_SYS_FPGA_BASE           0xFF000000
 
+#define CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND                        1
 #define CONFIG_NAND_FSL_ELBC           1
 
 #define CONFIG_SYS_NAND_BR_PRELIM      (CONFIG_SYS_NAND_BASE \
index a370c150b23f072a85d4225a68131c40d9eb6598..5cc8ece7de6672d6142697c3c400bee434b6ae34 100644 (file)
 #define CONFIG_NAND_S3C2410
 #define CONFIG_SYS_S3C2410_NAND_HWECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_NAND_BASE           0x4E000000
 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
 #define CONFIG_S3C24XX_TACLS           1
index cf2e7d4323f2003131146fd34ad66e7449059989..c9f0076ee6a177f67f9e10ce0d5e64c7ac249ebe 100644 (file)
  */
 #define CONFIG_CMD_NAND                                        /* enable NAND support */
 #define CONFIG_JFFS2_NAND                              /* with JFFS2 on it */
-
-
 #define CONFIG_NAND_MPC5121_NFC
 #define CONFIG_SYS_NAND_BASE           0x40000000
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS                 CONFIG_SYS_MAX_NAND_DEVICE
 
 /*
  * Configuration parameters for MPC5121 NAND driver
index 1945c032ab5d78931b59088c8cd44bdc50c4ff35..003109329a2bb0dc67efb4273130ee4eba65e477 100644 (file)
@@ -70,7 +70,6 @@
 #define CONFIG_DRIVER_NAND_BFIN
 #define CONFIG_SYS_NAND_BASE           0 /* not actually used */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_CMD_NAND
 #endif
 
index 9c35f2d0b7808ba50debcbc52eef77b0897eac9a..fa05103e5aae3075c15fd3a8ff61bb4ce256b881 100644 (file)
@@ -69,7 +69,6 @@
 #define CONFIG_DRIVER_NAND_BFIN
 #define CONFIG_SYS_NAND_BASE           0 /* not actually used */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #endif
 
 
index 1256e815d50825e4ccc065c6d04c135eca5d6eba..d80eac22db65e562050615d861c7fa3bdefb512c 100644 (file)
@@ -69,7 +69,6 @@
 #define CONFIG_DRIVER_NAND_BFIN
 #define CONFIG_SYS_NAND_BASE           0 /* not actually used */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #endif
 
 
index 3eadcefb83e3dd28d20d1d3619796f67812fceab..89adfefee3797b8c129e8733d3ba9224cdfc35db 100644 (file)
 #define CONFIG_DRIVER_NAND_BFIN
 #define CONFIG_SYS_NAND_BASE           0 /* not actually used */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 
 
 /*
index 4f2b904d54ef6ffd0e7ea50d6f76f3254ccd7d74..b15a1eb7a2ee82333382d23a6bf3425811a10651 100644 (file)
@@ -68,7 +68,6 @@
 #define CONFIG_BFIN_NFC_CTL_VAL        0x0033
 #define CONFIG_SYS_NAND_BASE           0 /* not actually used */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_CMD_NAND
 #endif
 
index 8674a35d2238b1bf79e35df2601cbb47b4086b0c..8b6a6879892aff6a2ddae9e8b3ebfe0a35e3925c 100644 (file)
 
 /* NAND flash */
 #define CONFIG_NAND_ATMEL
-#define NAND_MAX_CHIPS                         1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1
index 6ac25d2b9c11e7781da0f819ce73d31855b0dfdd..e8c021262ac4b747363cc6a013df7d4f89316203 100644 (file)
 #define CONFIG_SYS_CLE_MASK            0x10
 #define CONFIG_SYS_ALE_MASK            0x8
 #define CONFIG_SYS_MAX_NAND_DEVICE     1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS                 1
 #endif
 
 #ifdef CONFIG_USE_NOR
index fcbbace1cae347e28addeaff6d0c09088ce4e0fb..220890dfd9750c6633360a802a4c60798f4fd072 100644 (file)
 #define CONFIG_SYS_ALE_MASK            0x8
 #undef CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS                 1
 #endif
 
 /*
index 74fec3f8b5d8e040655c39d84d4b7e8ae7f7f2b0..cc0f5b05cd63538eaebef8533b04d7f029dc15c1 100644 (file)
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 #define        CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_MAX_NAND_DEVICE     1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */
 #endif
 
index 65b3b78abecba32175ffd3e9d1af5551f1880221..fa214941afbf8f52438e0fc02483b522a1d6e7ed 100644 (file)
 /* Max number of NAND devices */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE_LIST      { 0x62000000, }
-#define NAND_MAX_CHIPS                 1
 /* Block 0--not used by bootcode */
 #define CONFIG_ENV_OFFSET              0x0
 
index 700124c0c43281881210e665579d607608de0ad9..9c8d222c2fe28bbd52f144f362b52cc3410329dd 100644 (file)
  * NAND Flash configuration
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS                 1
 
 #define BOOTFLASH_START                0x0
 
index b891b12fef81f38ce19122606efa67dc1fac667f..4efff0992b8e1c80fb859a0b44939f3d73b5f36a 100644 (file)
 #define        CONFIG_SYS_MAX_NAND_DEVICE      1
 #define        CONFIG_SYS_NAND_BASE            0x60000000
 #define        CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define        NAND_MAX_CHIPS                  8
 
 /* Environment is in NAND */
 #define        CONFIG_ENV_IS_IN_NAND
index ed9282b998a2b64796495dcfac5a20938cf6503f..f5765b0d4e18997137b6e96afb3c37ef80c84f18 100644 (file)
 #define CONFIG_CMD_NAND
 #define CONFIG_NAND_MPC5121_NFC
 #define CONFIG_SYS_NAND_BASE            0x40000000
-
 #define CONFIG_SYS_MAX_NAND_DEVICE      1
-#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
 
 /*
  * Configuration parameters for MPC5121 NAND driver
index c3d3afde0e0f94328dead73fa93fb7e25741d252..01df8b1273268d17e77397f7484e70e9414ad01b 100644 (file)
 #define CONFIG_SYS_NAND_BASE            0x40000000
 
 #define CONFIG_SYS_MAX_NAND_DEVICE      2
-#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_SELECT_DEVICE  /* driver supports mutipl. chips */
 
 /*
index 3f5fcc69a2d2b4d460d4142ab29a4f82a85d12a2..1a6379176b3b4c3590326abe6f0aa43b16bb420b 100644 (file)
  */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */
 #endif
 
index f0154e091e5883d8ed462f1622b03b70ffa49220..8afc3c03dbfaa9c437966832a0b70c50df4f758d 100644 (file)
 #define CONFIG_CMD_NAND                        /* enable NAND support */
 #define CONFIG_NAND_MPC5121_NFC
 #define CONFIG_SYS_NAND_BASE            0x40000000
-
 #define CONFIG_SYS_MAX_NAND_DEVICE      1
-#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_SELECT_DEVICE  /* driver supports mutipl. chips */
 
 /*
index 1e803169e6a28e47a74aeb30a558b9e081d8bfde..eba5616ddf9df6446692d7aad57b424da3ff46de 100644 (file)
 
 /* NAND flash */
 #define CONFIG_NAND_ATMEL
-#define NAND_MAX_CHIPS                         1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1
index f989595d0e10d85713128c83d7f0cc5a849f5d51..f2e605a9b8b48609c8f3ab90ab3f513b0d002226 100644 (file)
 #define CONFIG_SYS_NAND_OOBSIZE                128
 #define CONFIG_SYS_NAND_BASE           0xB8000000
 #define CONFIG_SYS_ONENAND_BASE                CONFIG_SYS_NAND_BASE
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1 /* nand driver supports mutipl.*/
 #define CONFIG_NAND_SPL_TEXT_BASE      0x80000000
index 77c0a08d4cc327aea9de9ed9cbfe21ea0328eec1..73159846ef895801c34ccfe46f9c8a1e5baa539f 100644 (file)
 #define CONFIG_NAND_S3C2410
 #define CONFIG_SYS_S3C2410_NAND_HWECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_NAND_BASE           0x4E000000
 #endif
 
index 4bced0c9994edfebf6cbeb38eb64b924db29f2c2..7c3f33427c4ca0b47dced4297fd7c444fd80ea90 100644 (file)
@@ -90,7 +90,6 @@
 #define CONFIG_CMD_MTDPARTS
 #define CONFIG_MTD_DEVICE
 #define CONFIG_JFFS2_NAND
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_ENV_OFFSET              0x180000
 
 /*