Add option for defining platform DRAM2 base
authorSami Mujawar <sami.mujawar@arm.com>
Thu, 9 May 2019 12:35:02 +0000 (13:35 +0100)
committerSami Mujawar <sami.mujawar@arm.com>
Wed, 15 May 2019 10:42:39 +0000 (11:42 +0100)
The default DRAM2 base address for Arm platforms
is 0x880000000. However, on some platforms the
firmware may want to move the start address to
a different value.

To support this introduce PLAT_ARM_DRAM2_BASE that
defaults to 0x880000000; but can be overridden by
a platform (e.g. in platform_def.h).

Change-Id: I0d81195e06070bc98f376444b48ada2db1666e28
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
include/plat/arm/board/common/board_css_def.h
include/plat/arm/common/arm_def.h
plat/arm/board/fvp/include/platform_def.h
plat/arm/board/fvp_ve/include/platform_def.h

index 452afbcc8464d4d736a1a00a8bd78a3305f95bcb..f982b57b48bcf816309f339361612c2bb8b748ba 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -54,7 +54,7 @@
  * Required platform porting definitions common to all ARM CSS-based
  * development platforms
  */
-
+#define PLAT_ARM_DRAM2_BASE                    ULL(0x880000000)
 #define PLAT_ARM_DRAM2_SIZE                    ULL(0x180000000)
 
 /* UART related constants */
index 62623c1bf0340967b172c6099acd4a763f1dba72..69a9959ad6e057355d0e29348f2079b7d69b6670 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 #define ARM_DRAM1_END                  (ARM_DRAM1_BASE +               \
                                         ARM_DRAM1_SIZE - 1)
 
-#define ARM_DRAM2_BASE                 UL(0x880000000)
+#define ARM_DRAM2_BASE                 PLAT_ARM_DRAM2_BASE
 #define ARM_DRAM2_SIZE                 PLAT_ARM_DRAM2_SIZE
 #define ARM_DRAM2_END                  (ARM_DRAM2_BASE +               \
                                         ARM_DRAM2_SIZE - 1)
index 6856a286ff914c521febb542e172167eef005bf7..2313ab0c265dba3e14e4134a6593e41134684244 100644 (file)
@@ -48,6 +48,7 @@
 /* No SCP in FVP */
 #define PLAT_ARM_SCP_TZC_DRAM1_SIZE    UL(0x0)
 
+#define PLAT_ARM_DRAM2_BASE            ULL(0x880000000)
 #define PLAT_ARM_DRAM2_SIZE            UL(0x80000000)
 
 /*
index 1870442f00cc70f6376247d72c3850e93b45445e..1b21c79d12dec8b338d847232fa50e73223536d3 100644 (file)
@@ -25,7 +25,7 @@
 #define ARM_DRAM1_END                  (ARM_DRAM1_BASE +               \
                                         ARM_DRAM1_SIZE - 1)
 
-#define ARM_DRAM2_BASE                 UL(0x880000000)
+#define ARM_DRAM2_BASE                 PLAT_ARM_DRAM2_BASE
 #define ARM_DRAM2_SIZE                 PLAT_ARM_DRAM2_SIZE
 #define ARM_DRAM2_END                  (ARM_DRAM2_BASE +               \
                                         ARM_DRAM2_SIZE - 1)
 #define PLAT_ARM_TRUSTED_ROM_BASE      0x00000000
 #define PLAT_ARM_TRUSTED_ROM_SIZE      0x04000000      /* 64 MB */
 
+#define PLAT_ARM_DRAM2_BASE            ULL(0x880000000)
 #define PLAT_ARM_DRAM2_SIZE            ULL(0x80000000)
 
 /*