arm64: use alternative auto-nop
authorMark Rutland <mark.rutland@arm.com>
Wed, 7 Sep 2016 10:07:09 +0000 (11:07 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 12 Sep 2016 09:46:07 +0000 (10:46 +0100)
Make use of the new alternative_if and alternative_else_nop_endif and
get rid of our homebew NOP sleds, making the code simpler to read.

Note that for cpu_do_switch_mm the ret has been moved out of the
alternative sequence, and in the default case there will be three
additional NOPs executed.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/kernel/entry.S
arch/arm64/lib/copy_page.S
arch/arm64/mm/proc.S

index 6880dcc3b465a01f7cb578fbafec6d6f29479521..223d54a4d66b44acdc19e02243ea3d238cf56603 100644 (file)
        ldr     x23, [sp, #S_SP]                // load return stack pointer
        msr     sp_el0, x23
 #ifdef CONFIG_ARM64_ERRATUM_845719
-alternative_if_not ARM64_WORKAROUND_845719
-       nop
-       nop
-#ifdef CONFIG_PID_IN_CONTEXTIDR
-       nop
-#endif
-alternative_else
+alternative_if ARM64_WORKAROUND_845719
        tbz     x22, #4, 1f
 #ifdef CONFIG_PID_IN_CONTEXTIDR
        mrs     x29, contextidr_el1
@@ -165,7 +159,7 @@ alternative_else
        msr contextidr_el1, xzr
 #endif
 1:
-alternative_endif
+alternative_else_nop_endif
 #endif
        .endif
        msr     elr_el1, x21                    // set up the return data
index 4c1e700840b6ced5a0b2f868bfb4f37dddc8abc0..c3cd65e3181414bcaf3ec5b50937f95bf895570b 100644 (file)
  *     x1 - src
  */
 ENTRY(copy_page)
-alternative_if_not ARM64_HAS_NO_HW_PREFETCH
-       nop
-       nop
-alternative_else
+alternative_if ARM64_HAS_NO_HW_PREFETCH
        # Prefetch two cache lines ahead.
        prfm    pldl1strm, [x1, #128]
        prfm    pldl1strm, [x1, #256]
-alternative_endif
+alternative_else_nop_endif
 
        ldp     x2, x3, [x1]
        ldp     x4, x5, [x1, #16]
@@ -52,11 +49,9 @@ alternative_endif
 1:
        subs    x18, x18, #128
 
-alternative_if_not ARM64_HAS_NO_HW_PREFETCH
-       nop
-alternative_else
+alternative_if ARM64_HAS_NO_HW_PREFETCH
        prfm    pldl1strm, [x1, #384]
-alternative_endif
+alternative_else_nop_endif
 
        stnp    x2, x3, [x0]
        ldp     x2, x3, [x1]
index 5eb35964ab8e980cf666d1ca9105be2d57efd983..1b11dcd7e8512e46ab82e6e3d1dee1fcd7c3f795 100644 (file)
@@ -127,17 +127,12 @@ ENTRY(cpu_do_switch_mm)
        bfi     x0, x1, #48, #16                // set the ASID
        msr     ttbr0_el1, x0                   // set TTBR0
        isb
-alternative_if_not ARM64_WORKAROUND_CAVIUM_27456
-       ret
-       nop
-       nop
-       nop
-alternative_else
+alternative_if ARM64_WORKAROUND_CAVIUM_27456
        ic      iallu
        dsb     nsh
        isb
+alternative_else_nop_endif
        ret
-alternative_endif
 ENDPROC(cpu_do_switch_mm)
 
        .pushsection ".idmap.text", "ax"