drm/i915: Restore physical HWS_PGA after resume

By always setting up the HWS register for both physical and virtual
address variations during render ring we can reduce the number of
different special cases that get set up at varying different times
during module load.

Fixes regression from

commit c630119f43471a8ece356b01dabf07f944f453b3
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Oct 17 11:32:57 2012 +0200

    drm/i915: don't save/restore HWS_PGA reg for kms

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 1eea5be43617df03fc7ab97e9a6c942db45937a8..14396605fd29a2457ca51ae5b269d18c2bd40fe1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -103,32 +103,6 @@ static void i915_write_hws_pga(struct drm_device *dev)
        I915_WRITE(HWS_PGA, addr);
 }
 
-/**
- * Sets up the hardware status page for devices that need a physical address
- * in the register.
- */
-static int i915_init_phys_hws(struct drm_device *dev)
-{
-       drm_i915_private_t *dev_priv = dev->dev_private;
-
-       /* Program Hardware Status Page */
-       dev_priv->status_page_dmah =
-               drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE);
-
-       if (!dev_priv->status_page_dmah) {
-               DRM_ERROR("Can not allocate hardware status page\n");
-               return -ENOMEM;
-       }
-
-       memset_io((void __force __iomem *)dev_priv->status_page_dmah->vaddr,
-                 0, PAGE_SIZE);
-
-       i915_write_hws_pga(dev);
-
-       DRM_DEBUG_DRIVER("Enabled hardware status page\n");
-       return 0;
-}
-
 /**
  * Frees the hardware status page, whether it's a physical address or a virtual
  * address set up by the X Server.
@@ -1588,13 +1562,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
        i915_gem_load(dev);
 
-       /* Init HWS */
-       if (!I915_NEED_GFX_HWS(dev)) {
-               ret = i915_init_phys_hws(dev);
-               if (ret)
-                       goto out_gem_unload;
-       }
-
        /* On the 945G/GM, the chipset reports the MSI capability on the
         * integrated graphics even though the support isn't actually there
         * according to the published specs.  It doesn't appear to function

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index a035ac223fb0dbe5f165003b659c64488c79e592..1aa76892a830076df97df2102aa0316c8ee961f2 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1079,6 +1079,29 @@ err:
        return ret;
 }
 
+static int init_phys_hws_pga(struct intel_ring_buffer *ring)
+{
+       struct drm_i915_private *dev_priv = ring->dev->dev_private;
+       u32 addr;
+
+       if (!dev_priv->status_page_dmah) {
+               dev_priv->status_page_dmah =
+                       drm_pci_alloc(ring->dev, PAGE_SIZE, PAGE_SIZE);
+               if (!dev_priv->status_page_dmah)
+                       return -ENOMEM;
+       }
+
+       addr = dev_priv->status_page_dmah->busaddr;
+       if (INTEL_INFO(ring->dev)->gen >= 4)
+               addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0;
+       I915_WRITE(HWS_PGA, addr);
+
+       ring->status_page.page_addr = dev_priv->status_page_dmah->vaddr;
+       memset(ring->status_page.page_addr, 0, PAGE_SIZE);
+
+       return 0;
+}
+
 static int intel_init_ring_buffer(struct drm_device *dev,
                                  struct intel_ring_buffer *ring)
 {
@@ -1097,6 +1120,11 @@ static int intel_init_ring_buffer(struct drm_device *dev,
                ret = init_status_page(ring);
                if (ret)
                        return ret;
+       } else {
+               BUG_ON(ring->id != RCS);
+               ret = init_phys_hws_pga(ring);
+               if (ret)
+                       return ret;
        }
 
        obj = i915_gem_alloc_object(dev, ring->size);
@@ -1545,12 +1573,6 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
        ring->init = init_render_ring;
        ring->cleanup = render_ring_cleanup;
 
-
-       if (!I915_NEED_GFX_HWS(dev)) {
-               ring->status_page.page_addr = dev_priv->status_page_dmah->vaddr;
-               memset(ring->status_page.page_addr, 0, PAGE_SIZE);
-       }
-
        return intel_init_ring_buffer(dev, ring);
 }
 
@@ -1558,6 +1580,7 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
 {
        drm_i915_private_t *dev_priv = dev->dev_private;
        struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
+       int ret;
 
        ring->name = "render ring";
        ring->id = RCS;
@@ -1595,9 +1618,6 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
        ring->init = init_render_ring;
        ring->cleanup = render_ring_cleanup;
 
-       if (!I915_NEED_GFX_HWS(dev))
-               ring->status_page.page_addr = dev_priv->status_page_dmah->vaddr;
-
        ring->dev = dev;
        INIT_LIST_HEAD(&ring->active_list);
        INIT_LIST_HEAD(&ring->request_list);
@@ -1614,6 +1634,12 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
                return -ENOMEM;
        }
 
+       if (!I915_NEED_GFX_HWS(dev)) {
+               ret = init_phys_hws_pga(ring);
+               if (ret)
+                       return ret;
+       }
+
        return 0;
 }
 
@@ -1662,7 +1688,6 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
        }
        ring->init = init_ring_common;
 
-
        return intel_init_ring_buffer(dev, ring);
 }