drm/amdgpu: enable gfx clock gating for Arcturus
authorLe Ma <le.ma@amd.com>
Wed, 7 Aug 2019 06:52:38 +0000 (14:52 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 12 Aug 2019 17:47:48 +0000 (12:47 -0500)
Init gfx MGCG/LS and CGCG/LS flag.

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15.c

index 5116d0bf9e4a653f7ab20f8eec9b3c2c2f386945..0379f4290ea15f33d622a64c2107a382e84b4732 100644 (file)
@@ -1119,7 +1119,10 @@ static int soc15_common_early_init(void *handle)
                break;
        case CHIP_ARCTURUS:
                adev->asic_funcs = &vega20_asic_funcs;
-               adev->cg_flags = 0;
+               adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
+                       AMD_CG_SUPPORT_GFX_MGLS |
+                       AMD_CG_SUPPORT_GFX_CGCG |
+                       AMD_CG_SUPPORT_GFX_CGLS;
                adev->pg_flags = 0;
                adev->external_rev_id = adev->rev_id + 0x32;
                break;