ar71xx: add preliminary support for the Atheros AR933x SoCs
authorGabor Juhos <juhosg@openwrt.org>
Tue, 31 May 2011 22:53:26 +0000 (22:53 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Tue, 31 May 2011 22:53:26 +0000 (22:53 +0000)
SVN-Revision: 27054

target/linux/ar71xx/config-2.6.37
target/linux/ar71xx/config-2.6.38
target/linux/ar71xx/files/arch/mips/ar71xx/Kconfig
target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h

index c9dfcffc772779410b4b67e754c351470f17c1f6..2aaaaf097dd7f6aa5d82d818236028f39790793b 100644 (file)
@@ -178,6 +178,7 @@ CONFIG_SLUB=y
 CONFIG_SOC_AR71XX=y
 CONFIG_SOC_AR724X=y
 CONFIG_SOC_AR913X=y
+# CONFIG_SOC_AR933X is not set
 CONFIG_SOC_AR934X=y
 CONFIG_SPI=y
 CONFIG_SPI_AP83=y
index 1e4a9ff1ee254a53fe64279dd25c905d4d6fdf28..876582682fe3a6bc122173516b6c611c8327fd3c 100644 (file)
@@ -178,6 +178,7 @@ CONFIG_SLUB=y
 CONFIG_SOC_AR71XX=y
 CONFIG_SOC_AR724X=y
 CONFIG_SOC_AR913X=y
+# CONFIG_SOC_AR933X is not set
 CONFIG_SOC_AR934X=y
 CONFIG_SPI=y
 CONFIG_SPI_AP83=y
index abc8346ff9b874907d7a3147690d9f6a071d142d..d2ee303e30965dcb9fac5f15a96a034f64b7aa10 100644 (file)
@@ -393,4 +393,8 @@ config AR71XX_NVRAM
 config AR71XX_PCI_ATH9K_FIXUP
        def_bool n
 
+config SOC_AR933X
+       bool
+       select USB_ARCH_HAS_EHCI
+
 endif
index 7fd730c154be0494f5ba737c9b5082c04893b19a..d70347041ac5853c2b5814c5f8aae11ba215e1a2 100644 (file)
@@ -143,10 +143,16 @@ static void __init ar71xx_detect_sys_type(void)
                }
                break;
 
-       case REV_ID_MAJOR_AR9341:
-               ar71xx_soc = AR71XX_SOC_AR9341;
-               chip = "9341";
-               rev = id & AR934X_REV_ID_REVISION_MASK;
+       case REV_ID_MAJOR_AR9330:
+               ar71xx_soc = AR71XX_SOC_AR9330;
+               chip = "9330";
+               rev = id & AR933X_REV_ID_REVISION_MASK;
+               break;
+
+       case REV_ID_MAJOR_AR9331:
+               ar71xx_soc = AR71XX_SOC_AR9331;
+               chip = "9331";
+               rev = id & AR933X_REV_ID_REVISION_MASK;
                break;
 
        case REV_ID_MAJOR_AR9342:
index 48c4a739d6b4f443e646b9e2449c687e0e47387f..9dc15fea3d69db002049539d7ab052a126150e04 100644 (file)
@@ -127,6 +127,8 @@ enum ar71xx_soc_type {
        AR71XX_SOC_AR7242,
        AR71XX_SOC_AR9130,
        AR71XX_SOC_AR9132,
+       AR71XX_SOC_AR9330,
+       AR71XX_SOC_AR9331,
        AR71XX_SOC_AR9341,
        AR71XX_SOC_AR9342,
        AR71XX_SOC_AR9344,
@@ -641,6 +643,8 @@ void ar71xx_ddr_flush(u32 reg);
 #define REV_ID_MAJOR_AR7240    0x00c0
 #define REV_ID_MAJOR_AR7241    0x0100
 #define REV_ID_MAJOR_AR7242    0x1100
+#define REV_ID_MAJOR_AR9330    0x0110
+#define REV_ID_MAJOR_AR9331    0x1110
 #define REV_ID_MAJOR_AR9341    0x0120
 #define REV_ID_MAJOR_AR9342    0x1120
 #define REV_ID_MAJOR_AR9344    0x2120
@@ -660,6 +664,8 @@ void ar71xx_ddr_flush(u32 reg);
 
 #define AR724X_REV_ID_REVISION_MASK    0x3
 
+#define AR933X_REV_ID_REVISION_MASK    0xf
+
 #define AR934X_REV_ID_REVISION_MASK    0xf
 
 extern void __iomem *ar71xx_reset_base;