irqchip/stm32: Don't set rising configuration registers at init
authorFabien Dessenne <fabien.dessenne@st.com>
Thu, 7 Mar 2019 18:40:36 +0000 (19:40 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Thu, 21 Mar 2019 11:08:26 +0000 (11:08 +0000)
The rising configuration status register (rtsr) is not banked.
As it is shared with the co-processor, it should not be written at probe
time, else the co-processor configuration will be lost.

Fixes: f9fc1745501e ("irqchip/stm32: Add host and driver data structures")
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
drivers/irqchip/irq-stm32-exti.c

index dab37fbfab825b3cf5a1e061d7d2f9ce057c8595..6b19bffbad78ee7f0405833b6a4988b853632ebd 100644 (file)
@@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
        const struct stm32_exti_bank *stm32_bank;
        struct stm32_exti_chip_data *chip_data;
        void __iomem *base = h_data->base;
-       u32 irqs_mask;
 
        stm32_bank = h_data->drv_data->exti_banks[bank_idx];
        chip_data = &h_data->chips_data[bank_idx];
@@ -725,10 +724,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
 
        raw_spin_lock_init(&chip_data->rlock);
 
-       /* Determine number of irqs supported */
-       writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
-       irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
-
        /*
         * This IP has no reset, so after hot reboot we should
         * clear registers to avoid residue