Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Soc updates, take 2, from Olof Johansson:
 "This is the second batch of SoC updates for the 3.8 merge window,
  containing parts that had dependencies on earlier branches such that
  we couldn't include them with the first branch.

  These are general updates for Samsung Exynos, Renesas/shmobile and a
  topic branch that adds SMP support to Altera's socfpga platform."

Fix up conflicts mostly as per Olof.

* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: EXYNOS: Clock settings for SATA and SATA PHY
  ARM: EXYNOS: Add ARM down clock support
  ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
  ARM: EXYNOS: Add aliases for i2c controller
  ARM: EXYNOS: Setup legacy i2c controller interrupts
  sh: clkfwk: fixup unsed variable warning
  Revert "ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_mode"
  Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode"
  Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode"
  ARM: highbank: use common debug_ll_io_init
  ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global
  ARM: shmobile: sh7372: remove fsidivx clock
  ARM: socfpga: mark secondary_trampoline as cpuinit
  socfpga: map uart into virtual address space so that early_printk() works
  ARM: socfpga: fix build break for allyesconfig
  ARM: socfpga: Enable SMP for socfpga
  ARM: EXYNOS: Add dp clock support for EXYNOS5
  ARM: SAMSUNG: call clk_get_rate for debugfs rate files
  ARM: SAMSUNG: add clock_tree debugfs file in clock

diff --cc arch/arm/boot/dts/exynos5250.dtsi
index 36d8246ea50eaef5e5cae9c719b8ade854a17bd1,04d93ecd14844864802bca4e69cb6ef8c6b54988..2e3b6efaf1a2632062fd93a8ca7d0eec792a9c0c
--- 1/arch/arm/boot/dts/exynos5250.dtsi
--- 2/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@@ -31,10 -31,15 +31,19 @@@
                gsc1 = &gsc_1;
                gsc2 = &gsc_2;
                gsc3 = &gsc_3;
 +              mshc0 = &dwmmc_0;
 +              mshc1 = &dwmmc_1;
 +              mshc2 = &dwmmc_2;
 +              mshc3 = &dwmmc_3;
+               i2c0 = &i2c_0;
+               i2c1 = &i2c_1;
+               i2c2 = &i2c_2;
+               i2c3 = &i2c_3;
+               i2c4 = &i2c_4;
+               i2c5 = &i2c_5;
+               i2c6 = &i2c_6;
+               i2c7 = &i2c_7;
+               i2c8 = &i2c_8;
        };
  
        gic:interrupt-controller@10481000 {
@@@ -108,18 -101,7 +117,18 @@@
                interrupts = <0 54 0>;
        };
  
-       i2c@12C60000 {
 +      sata@122F0000 {
 +              compatible = "samsung,exynos5-sata-ahci";
 +              reg = <0x122F0000 0x1ff>;
 +              interrupts = <0 115 0>;
 +      };
 +
 +      sata-phy@12170000 {
 +              compatible = "samsung,exynos5-sata-phy";
 +              reg = <0x12170000 0x1ff>;
 +      };
 +
+       i2c_0: i2c@12C60000 {
                compatible = "samsung,s3c2440-i2c";
                reg = <0x12C60000 0x100>;
                interrupts = <0 56 0>;

diff --cc arch/arm/mach-exynos/clock-exynos5.c
Simple merge

diff --cc arch/arm/mach-exynos/cpuidle.c
Simple merge

diff --cc arch/arm/mach-exynos/include/mach/regs-pmu.h
index 84428e72cf5e771fd6e42fd066879bfb36395272,684625ad3f396196df7e8031c817a1dcd7daeebf..3f30aa1ae3547897410d64471cdd20eca2372b95
--- 1/arch/arm/mach-exynos/include/mach/regs-pmu.h
--- 2/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@@ -231,6 -231,9 +232,8 @@@
  
  /* For EXYNOS5 */
  
 -#define EXYNOS5_USB_CFG                                               S5P_PMUREG(0x0230)
+ #define EXYNOS5_SYS_I2C_CFG                                   S5P_SYSREG(0x0234)
+ 
  #define EXYNOS5_AUTO_WDTRESET_DISABLE                         S5P_PMUREG(0x0408)
  #define EXYNOS5_MASK_WDTRESET_REQUEST                         S5P_PMUREG(0x040C)
  

diff --cc arch/arm/mach-exynos/mach-exynos5-dt.c
index 929de766d4906cdb8856da45baf47301528fb3ae,f906f599a141b414e045a6664d90f3eb5bcca2c4..f038c8cadca484e1831cd3277394bd8565ab88c1
--- 1/arch/arm/mach-exynos/mach-exynos5-dt.c
--- 2/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@@ -10,10 -10,8 +10,10 @@@
  */
  
  #include <linux/of_platform.h>
 +#include <linux/of_fdt.h>
  #include <linux/serial_core.h>
- #include <linux/of_fdt.h>
 +#include <linux/memblock.h>
+ #include <linux/io.h>
  
  #include <asm/mach/arch.h>
  #include <asm/hardware/gic.h>
@@@ -106,35 -85,42 +107,57 @@@ static const struct of_dev_auxdata exyn
        {},
  };
  
 -static void __init exynos5250_dt_map_io(void)
 +static const struct of_dev_auxdata exynos5440_auxdata_lookup[] __initconst = {
 +      OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5440_PA_UART0,
 +                              "exynos4210-uart.0", NULL),
 +      {},
 +};
 +
 +static void __init exynos5_dt_map_io(void)
  {
 +      unsigned long root = of_get_flat_dt_root();
 +
        exynos_init_io(NULL, 0);
 -      s3c24xx_init_clocks(24000000);
 +
 +      if (of_flat_dt_is_compatible(root, "samsung,exynos5250"))
 +              s3c24xx_init_clocks(24000000);
  }
  
 -static void __init exynos5250_dt_machine_init(void)
 +static void __init exynos5_dt_machine_init(void)
  {
 -      of_platform_populate(NULL, of_default_bus_match_table,
 -                              exynos5250_auxdata_lookup, NULL);
+       struct device_node *i2c_np;
+       const char *i2c_compat = "samsung,s3c2440-i2c";
+       unsigned int tmp;
+ 
+       /*
+        * Exynos5's legacy i2c controller and new high speed i2c
+        * controller have muxed interrupt sources. By default the
+        * interrupts for 4-channel HS-I2C controller are enabled.
+        * If node for first four channels of legacy i2c controller
+        * are available then re-configure the interrupts via the
+        * system register.
+        */
+       for_each_compatible_node(i2c_np, NULL, i2c_compat) {
+               if (of_device_is_available(i2c_np)) {
+                       if (of_alias_get_id(i2c_np, "i2c") < 4) {
+                               tmp = readl(EXYNOS5_SYS_I2C_CFG);
+                               writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
+                                               EXYNOS5_SYS_I2C_CFG);
+                       }
+               }
+       }
+ 
 +      if (of_machine_is_compatible("samsung,exynos5250"))
 +              of_platform_populate(NULL, of_default_bus_match_table,
 +                                   exynos5250_auxdata_lookup, NULL);
 +      else if (of_machine_is_compatible("samsung,exynos5440"))
 +              of_platform_populate(NULL, of_default_bus_match_table,
 +                                   exynos5440_auxdata_lookup, NULL);
  }
  
 -static char const *exynos5250_dt_compat[] __initdata = {
 +static char const *exynos5_dt_compat[] __initdata = {
        "samsung,exynos5250",
 +      "samsung,exynos5440",
        NULL
  };
  

diff --cc arch/arm/mach-exynos/pm.c
Simple merge