- ssb_write32(dev, 0x400, tmp);
- tmp = ssb_read32(dev, 0x400);
- printk("USB20H fcr: 0x%0x\n", tmp);
--
++ /* Work around for 5354 failures */
++ if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
++ /* Change syn01 reg */
++ tmp = 0x00fe00fe;
++ ssb_write32(dev, 0x894, tmp);
+
- /* Change Shim control reg */
- tmp = ssb_read32(dev, 0x304);
- tmp &= ~0x100;
- ssb_write32(dev, 0x304, tmp);
- tmp = ssb_read32(dev, 0x304);
- printk("USB20H shim: 0x%0x\n", tmp);
-+ /* Work around for 5354 failures */
-+ if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
-+ /* Change syn01 reg */
-+ tmp = 0x00fe00fe;
-+ ssb_write32(dev, 0x894, tmp);
-+
+ /* Change syn03 reg */
+ tmp = ssb_read32(dev, 0x89c);
+ tmp |= 0x1;
#include <asm/io.h>
extern void build_clear_page(void);
-@@ -78,13 +79,16 @@ static inline void clear_user_page(void
+@@ -78,13 +79,16 @@ static inline void clear_user_page(void
flush_data_cache_page((unsigned long)addr);
}
#include <net/checksum.h>
#include <net/ip.h>
-@@ -466,8 +467,9 @@ static void _tw32_flush(struct tg3 *tp,
+@@ -466,8 +467,9 @@ static void _tw32_flush(struct tg3 *tp,
static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val)
{
tp->write32_mbox(tp, off, val);
{
u32 frame_val;
unsigned int loops;
-@@ -842,7 +849,7 @@ static int tg3_writephy(struct tg3 *tp,
+@@ -842,7 +849,7 @@ static int tg3_writephy(struct tg3 *tp,
udelay(80);
}
MI_COM_PHY_ADDR_MASK);
frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
MI_COM_REG_ADDR_MASK);
-@@ -875,6 +882,11 @@ static int tg3_writephy(struct tg3 *tp,
+@@ -875,6 +882,11 @@ static int tg3_writephy(struct tg3 *tp,
return ret;
}
tw32(GRC_MODE, tp->grc_mode);
if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
-@@ -7089,9 +7127,12 @@ static int tg3_halt_cpu(struct tg3 *tp,
+@@ -7089,9 +7127,12 @@ static int tg3_halt_cpu(struct tg3 *tp,
return -ENODEV;
}
fw_data = (void *)tp->fw->data;
/* Firmware blob starts with version numbers, followed by
-@@ -7213,6 +7259,11 @@ static int tg3_load_tso_firmware(struct
+@@ -7213,6 +7259,11 @@ static int tg3_load_tso_firmware(struct
unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
int err, i;
tw32_f(GRC_EEPROM_ADDR,
(EEPROM_ADDR_FSM_RESET |
(EEPROM_DEFAULT_CLOCK_PERIOD <<
-@@ -11936,6 +12003,9 @@ static int tg3_nvram_write_block(struct
+@@ -11936,6 +12003,9 @@ static int tg3_nvram_write_block(struct
{
int ret;
--- a/drivers/net/b44.c
+++ b/drivers/net/b44.c
-@@ -815,7 +815,7 @@ static int b44_rx(struct b44 *bp, int bu
+@@ -848,7 +848,7 @@ static int b44_rx(struct b44 *bp, int bu
struct sk_buff *copy_skb;
b44_recycle_rx(bp, cons, bp->rx_prod);
dev_printk(KERN_INFO, &socket->dev->dev,
"ISA IRQ mask 0x%04x, PCI irq %d\n",
socket->socket.irq_mask, socket->cb_irq);
-@@ -1243,6 +1250,15 @@ static int __devinit yenta_probe(struct
+@@ -1243,6 +1250,15 @@ static int __devinit yenta_probe(struct
dev_printk(KERN_INFO, &dev->dev,
"Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
-@@ -385,6 +385,34 @@ static int ssb_device_uevent(struct devi
+@@ -384,6 +384,34 @@ static int ssb_device_uevent(struct devi
ssb_dev->id.revision);
}
static struct bus_type ssb_bustype = {
.name = "ssb",
.match = ssb_bus_match,
-@@ -394,6 +422,7 @@ static struct bus_type ssb_bustype = {
+@@ -393,6 +421,7 @@ static struct bus_type ssb_bustype = {
.suspend = ssb_device_suspend,
.resume = ssb_device_resume,
.uevent = ssb_device_uevent,