drm/amdgpu/gfx8: move CP_PQ_STATUS after doorbell range setting (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 13 Apr 2017 18:35:02 +0000 (14:35 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 May 2017 21:39:57 +0000 (17:39 -0400)
I'm not sure if the order matters, but it seems like it makes
more sense to set this after the range is programmed.

v2: rebase (Alex)

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

index a9cc3d79845b62097b4141c446327ff491428e30..8a9202d50bb8747de507ba04cb2d080b7eca0f6a 100644 (file)
@@ -4961,9 +4961,6 @@ static int gfx_v8_0_kiq_init_register(struct amdgpu_ring *ring)
        /* activate the queue */
        WREG32(mmCP_HQD_ACTIVE, mqd->cp_hqd_active);
 
-       if (ring->use_doorbell)
-               WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1);
-
        return 0;
 }
 
@@ -5040,6 +5037,8 @@ static void gfx_v8_0_set_mec_doorbell_range(struct amdgpu_device *adev)
                WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2);
                WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2);
        }
+       /* enable doorbells */
+       WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1);
 }
 
 static int gfx_v8_0_kiq_resume(struct amdgpu_device *adev)